It seems like watchdog is not able to provide the hard reset.
When you restart the system , it is equivalent to POWER OFF and then POWER
ON.
In this case, at power up or after hard reset DSP looks @ BOOT PINS and
decides where to boot from , otherwise these boot pins act as GPIO (or other
functions as in DSP datasheet). If it does not get hard reset it will not
REBOOT properly.
Regards,
Onkar Patki,
Design Engineer.
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Fax:: 91 20 25386930
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Email: [email protected]
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----- Original Message -----
From: <[email protected]>
To: <[email protected]>
Sent: Tuesday, May 19, 2009 10:30 PM
Subject: Davinci-linux-open-source Digest, Vol 41, Issue 119
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Today's Topics:
1. Re: Danvinci watchdog + Intel flash problem (Kevin Hilman)
2. about usb unstable issue. (Jeff)
----------------------------------------------------------------------
Message: 1
Date: Tue, 19 May 2009 08:04:30 -0700
From: Kevin Hilman <[email protected]>
Subject: Re: Danvinci watchdog + Intel flash problem
To: "Alberto Navatta" <[email protected]>
Cc: [email protected]
Message-ID: <[email protected]>
Content-Type: text/plain; charset=us-ascii
"Alberto Navatta" <[email protected]> writes:
We?re trying to use the Davinci (dm6446) hardware watchdog in a
custom board configured to boot from flash (u-boot 1.1.3 on an Intel
PC28F128P30).
We have seen that during soft reboot (e.g. reboot ?f command issued
from the shell) the function ?cfi_intelext_reset? is called before
machine reboot is triggered by means of the davinci watchdog
(davinci_watchdog_reset function call), and this works fine.
Instead, if we configure the watchdog to reboot the board on timer
expire (e.g. configuring and triggering watchdog timer with the
davinci_wdt device), the board seems to perform the maximum reset as
expected but it never restarts.
My understanding of this behavior is that the cfi_intelext_reset
function performs a reset of the intel flash device so that the
flash is found in the right state (array mode, to be used during
boot), so, in the first case after the watchdog triggered reset the
flash is readable by the CPU and boot process is performed
successfully, while in the second one I suppose the flash chip is in
an undetermined state and, after the reset, the boot process fails.
Does anyone know a reasonable way to override this problem and to
have a clean hardware watchdog triggered reset/reboot of the board?
I mean we can have a timer based soft watchdog (e.g. softdog) that
calls the flash reset function (cfi?) before to trigger the machine
reset, but this requires some kind of software processing still
available on the board (interrupt handlers, etc.): our environment
is very critical and we cannot rely on any software portion to take
care of software/kernel error conditions, we need to do it in
hardware (possibly without adding an external hardware watchdog to
the board).
This sounds to me like a u-boot problem. The bootloader should make
sure the flash is in a usable state before booting.
The point of a watchdog is to be able to do a hard reset in case
things go wrong. In these situations, you may not be able to do any
additional function calls etc. and just need to hard reset.
It's the job of the bootloader to be able to reboot in this situation.
Kevin
------------------------------
Message: 2
Date: Tue, 19 May 2009 23:17:50 +0800
From: "Jeff" <[email protected]>
Subject: about usb unstable issue.
To: "Davinci-Linux-Source"
<[email protected]>
Message-ID: <[email protected]>
Content-Type: text/plain; charset="us-ascii"
All,
I used the newest kernel downloaded from GIT. I connected a hub with two
USB
disks on DM355. When I tried to copy a large file with size ~500MB from
USB
disk 1 to USB disk 2, I found some errors during copying process as below:
" musb_host.c : musb_h_tx_flush_fifo : Could not flush host TX fifo: csr:
2300
musb_host.c : musb_h_tx_flush_fifo : Could not flush host TX fifo: csr:
2300
musb_host.c : musb_h_tx_flush_fifo : Could not flush host TX fifo: csr:
2300
musb_host.c: 1557 RX1 dma busy, csr 2300
"
Please give me some clues. Thanks very much.
BR,
Jeff
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