On Fri, Apr 03, 2009 at 06:54:52, Medisetty, Naresh wrote: > > From: Naresh Medisetty <[email protected]> > > Enables module clock for DM646x EDMA channel controller and transfer > controller. > > Channel mapping logic is introduced in dm646x EDMA. This implies that > there is > no fixed association for a channel number to a parameter entry number. > In other > words, using the DMA channel mapping registers (DCHMAPn), a PaRAM entry > can be > mapped to any channel. While in the case of dm644x and dm355 there is a > fixed > mapping between the EDMA channel and Param entry number. > > Signed-off-by: Naresh Medisetty <[email protected]> > --- > Dave, I have not fixed your comments regarding > 1) naming the event queues wrt priority. > 2) Implementing single tc err handler for all the Transfer controllers > 3) Getting the TC err interrupt numbers from platform resources. > 4) Getting rid of the n_* fields in struct edma_soc_info with the help > of > EDMA_CCCFG register > > The aim of this patch is to get the DM646x EDMA support going. > Subsequent > patches should address other concerns you have raised. >
Kevin, As mentioned above, we have acknowledged the comments received on first version of this patch. The main aim of this patch is to add EDMA support for DM646x. The above enhancements will be added later, will add it to the to-do list. In this case, can you please merge this patch into the DaVinci tree? Regards, Chaithrika _______________________________________________ Davinci-linux-open-source mailing list [email protected] http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
