Patch Updates the existing header files with DM365 specific entries and adds a new DM365 specific header file
Signed-off-by: Sandeep Paulraj <[email protected]> --- arch/arm/mach-davinci/include/mach/dm365.h | 31 ++++++++++ arch/arm/mach-davinci/include/mach/irqs.h | 89 ++++++++++++++++++++++++++++ arch/arm/mach-davinci/include/mach/mux.h | 81 +++++++++++++++++++++++++ arch/arm/mach-davinci/include/mach/psc.h | 50 ++++++++++++++++ 4 files changed, 251 insertions(+), 0 deletions(-) create mode 100644 arch/arm/mach-davinci/include/mach/dm365.h diff --git a/arch/arm/mach-davinci/include/mach/dm365.h b/arch/arm/mach-davinci/include/mach/dm365.h new file mode 100644 index 0000000..ea82c46 --- /dev/null +++ b/arch/arm/mach-davinci/include/mach/dm365.h @@ -0,0 +1,31 @@ +/* + * Chip specific MACROS for DM365 SoC + * + * Copyright (C) 2009 Texas Instruments Incorporated + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#ifndef __ASM_ARCH_DM365_H +#define __ASM_ARCH_DM665_H + +#include <linux/platform_device.h> +#include <mach/hardware.h> +#include <mach/emac.h> + +#define DM365_EMAC_BASE (0x01C80000) +#define DM365_EMAC_CNTRL_OFFSET (0x0000) +#define DM365_EMAC_CNTRL_MOD_OFFSET (0x1000) +#define DM365_EMAC_CNTRL_RAM_OFFSET (0x2000) +#define DM365_EMAC_MDIO_OFFSET (0x4000) +#define DM365_EMAC_CNTRL_RAM_SIZE (0x2000) + +void __init dm365_init(void); + +#endif /* __ASM_ARCH_DM365_H */ diff --git a/arch/arm/mach-davinci/include/mach/irqs.h b/arch/arm/mach-davinci/include/mach/irqs.h index bc5d6aa..bcf1abc 100644 --- a/arch/arm/mach-davinci/include/mach/irqs.h +++ b/arch/arm/mach-davinci/include/mach/irqs.h @@ -206,4 +206,93 @@ #define IRQ_DM355_GPIOBNK5 59 #define IRQ_DM355_GPIOBNK6 60 +/* DaVinci DM365-specific Interrupts */ +#define IRQ_DM365_VPSSINT0 0 +#define IRQ_DM365_VPSSINT1 1 +#define IRQ_DM365_VPSSINT2 2 +#define IRQ_DM365_VPSSINT3 3 +#define IRQ_DM365_VPSSINT4 4 +#define IRQ_DM365_VPSSINT5 5 +#define IRQ_DM365_VPSSINT6 6 +#define IRQ_DM365_INSFINT 7 +#define IRQ_DM365_IMXINT1 8 +#define IRQ_DM365_IMXINT0 10 +#define IRQ_DM365_KLD_ARMINT 10 +#define IRQ_DM365_INSFINT 7 +#define IRQ_DM365_IMXINT1 8 +#define IRQ_DM365_IMXINT0 10 +#define IRQ_DM365_KLD_ARMINT 10 +#define IRQ_DM365_IMCOPINT 11 +#define IRQ_DM365_USBINT 12 +#define IRQ_DM365_RTOINT 13 +#define IRQ_DM365_TINT5 14 +#define IRQ_DM365_TINT6 15 +#define IRQ_DM365_CCINT0 16 +#define IRQ_DM365_CCERRINT 17 +#define IRQ_DM365_TCERRINT0 18 +#define IRQ_DM365_SPINT2_0 19 +#define IRQ_DM365_PSCINT 20 +#define IRQ_DM365_TVINT 20 +#define IRQ_DM365_SPINT4_0 21 +#define IRQ_DM365_TINT7 22 +#define IRQ_DM365_SDIOINT0 23 +#define IRQ_DM365_MBXINT 24 +#define IRQ_DM365_VCINT 24 +#define IRQ_DM365_MBRINT 25 +#define IRQ_DM365_MMCINT0 26 +#define IRQ_DM365_MMCINT1 27 +#define IRQ_DM365_TINT9 28 +#define IRQ_DM365_TINT4_TINT34 28 +#define IRQ_DM365_DDRINT 29 +#define IRQ_DM365_RTCINT 29 +#define IRQ_DM365_AEMIFINT 30 +#define IRQ_DM365_HPIINT 30 +#define IRQ_DM365_SDIOINT1 31 +#define IRQ_DM365_TINT0 32 +#define IRQ_DM365_TINT0_TINT12 32 +#define IRQ_DM365_TINT1 33 +#define IRQ_DM365_TINT0_TINT34 33 +#define IRQ_DM365_TINT2 34 +#define IRQ_DM365_TINT1_TINT12 34 +#define IRQ_DM365_TINT3 35 +#define IRQ_DM365_TINT1_TINT34 35 +#define IRQ_DM365_PWMINT0 36 +#define IRQ_DM365_PWMINT1 37 +#define IRQ_DM365_PWMINT2 38 +#define IRQ_DM365_TINT8 38 +#define IRQ_DM365_TINT4_TINT12 38 +#define IRQ_DM365_IICINT 39 +#define IRQ_DM365_UARTINT0 40 +#define IRQ_DM365_UARTINT1 41 +#define IRQ_DM365_SPIINT0_0 42 +#define IRQ_DM365_SPINT3_0 43 +#define IRQ_DM365_GPIO0 44 +#define IRQ_DM365_GPIO1 45 +#define IRQ_DM365_GPIO2 46 +#define IRQ_DM365_GPIO3 47 +#define IRQ_DM365_GPIO4 48 +#define IRQ_DM365_GPIO5 49 +#define IRQ_DM365_GPIO6 50 +#define IRQ_DM365_GPIO7 51 +#define IRQ_DM365_EMAC_RXTHRESH 52 +#define IRQ_DM365_EMAC_RXPULSE 53 +#define IRQ_DM365_GPIO10 54 +#define IRQ_DM365_EMAC_TXPULSE 54 +#define IRQ_DM365_GPIO11 55 +#define IRQ_DM365_EMAC_MISCPULSE 55 +#define IRQ_DM365_GPIO12 56 +#define IRQ_DM365_PWRGIO0 56 +#define IRQ_DM365_GPIO13 57 +#define IRQ_DM365_PWRGIO1 57 +#define IRQ_DM365_GPIO14 58 +#define IRQ_DM365_PWRGIO2 58 +#define IRQ_DM365_GPIO15 59 +#define IRQ_DM365_ADCINT 59 +#define IRQ_DM365_KEYINT 60 +#define IRQ_DM365_COMMTX 61 +#define IRQ_DM365_TCERRINT2 61 +#define IRQ_DM365_COMMRX 62 +#define IRQ_DM365_TCERRINT3 62 +#define IRQ_DM365_EMUINT 63 + #endif /* __ASM_ARCH_IRQS_H */ diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h index 4516839..3b47f01 100644 --- a/arch/arm/mach-davinci/include/mach/mux.h +++ b/arch/arm/mach-davinci/include/mach/mux.h @@ -165,6 +165,87 @@ enum davinci_dm355_index { DM355_VIN_CINH_EN, }; +enum davinci_dm365_index { + /* MMC/SD 0 */ + DM365_MMCSD0, + + /* MMC/SD 1 */ + DM365_SD1_CLK, + DM365_SD1_CMD, + DM365_SD1_DATA3, + DM365_SD1_DATA2, + DM365_SD1_DATA1, + DM365_SD1_DATA0, + + /* I2C */ + DM365_I2C_SDA, + DM365_I2C_SCL, + + /* AEMIF */ + DM365_AEMIF_AR, + DM365_AEMIF_A3, + DM365_AEMIF_A7, + DM365_AEMIF_D15_8, + DM365_AEMIF_CE0, + + /* ASP0 function */ + DM365_MCBSP0_BDX, + DM365_MCBSP0_X, + DM365_MCBSP0_BFSX, + DM365_MCBSP0_BDR, + DM365_MCBSP0_R, + DM365_MCBSP0_BFSR, + + /* SPI0 */ + DM365_SPI0_SCLK, + DM365_SPI0_SDI, + DM365_SPI0_SDO, + DM365_SPI0_SDENA0, + DM365_SPI0_SDENA1, + + /* UART */ + DM365_UART0_RXD, + DM365_UART0_TXD, + DM365_UART1_RXD, + DM365_UART1_TXD, + DM365_UART1_RTS, + DM365_UART1_CTS, + + /* EMAC */ + DM365_EMAC_TX_EN, + DM365_EMAC_TX_CLK, + DM365_EMAC_COL, + DM365_EMAC_TXD3, + DM365_EMAC_TXD2, + DM365_EMAC_TXD1, + DM365_EMAC_TXD0, + DM365_EMAC_RXD3, + DM365_EMAC_RXD2, + DM365_EMAC_RXD1, + DM365_EMAC_RXD0, + DM365_EMAC_RX_CLK, + DM365_EMAC_RX_DV, + DM365_EMAC_RX_ER, + DM365_EMAC_CRS, + DM365_EMAC_MDIO, + DM365_EMAC_MDCLK, + + /* IRQ muxing */ + DM365_INT_EDMA_CC, + DM365_INT_EDMA_TC0_ERR, + DM365_INT_EDMA_TC1_ERR, + DM365_INT_PRTCSS, + DM365_INT_EMAC_RXTHRESH, + DM365_INT_EMAC_RXPULSE, + DM365_INT_EMAC_TXPULSE, + DM365_INT_EMAC_MISCPULSE, + + /* EDMA event muxing */ + DM365_EVT2_ASP_TX, + DM365_EVT3_ASP_RX, + DM365_EVT26_MMC0_RX, +}; + #ifdef CONFIG_DAVINCI_MUX /* setup pin muxing */ extern int davinci_cfg_reg(unsigned long reg_cfg); diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h index ab8a258..df9b352 100644 --- a/arch/arm/mach-davinci/include/mach/psc.h +++ b/arch/arm/mach-davinci/include/mach/psc.h @@ -81,6 +81,56 @@ #define DM355_LPSC_RTO 12 #define DM355_LPSC_VPSS_DAC 41 +/* DM365 */ +#define DM365_LPSC_TPCC 0 +#define DM365_LPSC_TPTC0 1 +#define DM365_LPSC_TPTC1 2 +#define DM365_LPSC_TPTC2 3 +#define DM365_LPSC_TPTC3 4 +#define DM365_LPSC_TIMER3 5 +#define DM365_LPSC_SPI1 6 +#define DM365_LPSC_MMC_SD1 7 +#define DM365_LPSC_McBSP1 8 +#define DM365_LPSC_PWM3 10 +#define DM365_LPSC_SPI2 11 +#define DM365_LPSC_RTO 12 +#define DM365_LPSC_DDR_EMIF 13 +#define DM365_LPSC_AEMIF 14 +#define DM365_LPSC_MMC_SD 15 +#define DM365_LPSC_MMC_SD0 15 +#define DM365_LPSC_MEMSTICK 16 +#define DM365_LPSC_TIMER4 17 +#define DM365_LPSC_I2C 18 +#define DM365_LPSC_UART0 19 +#define DM365_LPSC_UART1 20 +#define DM365_LPSC_UHPI 21 +#define DM365_LPSC_SPI0 22 +#define DM365_LPSC_PWM0 23 +#define DM365_LPSC_PWM1 24 +#define DM365_LPSC_PWM2 25 +#define DM365_LPSC_GPIO 26 +#define DM365_LPSC_TIMER0 27 +#define DM365_LPSC_TIMER1 28 +#define DM365_LPSC_TIMER2 29 +#define DM365_LPSC_SYSTEM_SUBSYS 30 +#define DM365_LPSC_SCR0 33 +#define DM365_LPSC_SCR1 34 +#define DM365_LPSC_EMU 35 +#define DM365_LPSC_CHIPDFT 36 +#define DM365_LPSC_PBIST 37 +#define DM365_LPSC_SPI3 38 +#define DM365_LPSC_SPI4 39 +#define DM365_LPSC_EMAC 40 +#define DM365_LPSC_RTC 41 +#define DM365_LPSC_KEYSCAN 42 +#define DM365_LPSC_ADCIF 43 +#define DM365_LPSC_VOICE_CODEC 44 +#define DM365_LPSC_DAC_CLKRES 45 +#define DM365_LPSC_DAC_CLK 46 +#define DM365_LPSC_VPSSMSTR 47 +#define DM365_LPSC_IMCOP 50 +#define DM365_LPSC_KALEIDO 51 + /* * LPSC Assignments */ -- 1.6.0.4 _______________________________________________ Davinci-linux-open-source mailing list [email protected] http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
