On Saturday 20 June 2009, [email protected] wrote:
> --- a/arch/arm/mach-davinci/board-dm365-evm.c
> +++ b/arch/arm/mach-davinci/board-dm365-evm.c
> @@ -93,6 +93,20 @@ static void dm365evm_emac_configure(void)
> davinci_cfg_reg(DM365_INT_EMAC_MISCPULSE);
> }
>
> +static void dm365evm_edma_configure(void)
> +{
> + /*
> + * EDMA interrupts are multiplexed
> + * Details are available at the DM365 ARM
> + * Subsystem Users Guide(sprufg5.pdf) pages 133 - 134
> + */
> + davinci_cfg_reg(DM365_INT_EDMA_CC);
> + davinci_cfg_reg(DM365_INT_EDMA_TC0_ERR);
> + davinci_cfg_reg(DM365_INT_EDMA_TC1_ERR);
> + davinci_cfg_reg(DM365_INT_EDMA_TC2_ERR);
> + davinci_cfg_reg(DM365_INT_EDMA_TC3_ERR);
The TC_ERR handlers are still NOPs, so I suspect they're
not worth enabling for now. EDMA_CC is needed for all
boards ... I suggest just doing this muxing in dm365.c
with some mask as a parameter saying what to enable.
(That is, if the TC_ERR stuff is even needed.)
> +}
> +
> static void __init evm_init_i2c(void)
> {
> davinci_init_i2c(&i2c_pdata);
> @@ -116,6 +130,7 @@ static __init void dm365_evm_init(void)
> davinci_serial_init(&uart_config);
>
> dm365evm_emac_configure();
> + dm365evm_edma_configure();
>
> soc_info->emac_pdata->phy_mask = DM365_EVM_PHY_MASK;
> soc_info->emac_pdata->mdio_max_freq = DM365_EVM_MDIO_FREQUENCY;
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