All,

I just setup a DM355 to do this with an AIC31. All the standard sample
rates work fine w/ hw:0.

Setup:
ASP0, set all clock pins to inputs. (FSR, FSX, CLKX, CLKR)
Use AIC3X as master for frame clock and bit clock(internal PLL). The AIC
PLL can generate almost any sample rate you want.

MCLK should be between 512KHz and 20MHz and fed into MCLK of the AIC31.
We are using a TCXO.

There are other clocking options if you so choose (for the EVMs, etc).

You need to make sure your Platform Devices for the MCBSP driver uses
SND_SOC_DAIFMT_CBS_CFS and 
The codec init for the AIC31 uses SND_SOC_DAIFMT_CBM_CFM.

Normally I would offer to fix it in the dev tree, but I don't have time
or a setup for the EVMs right now.

-JZ

------------------------------

Message: 3
Date: Tue, 30 Jun 2009 19:44:52 -0500
From: Steve Chen <[email protected]>
Subject: Re: [PATCH V2] RFC: ARM: DaVinci: ASoc use iram to buffer
        sound
To: David Brownell <[email protected]>
Cc: [email protected]
Message-ID: <1246409092.3342.166.ca...@linux-1lbu>
Content-Type: text/plain

On Tue, 2009-06-30 at 15:54 -0700, David Brownell wrote:
> On Tuesday 30 June 2009, Steve Chen wrote:
> > Can you try
> >  > aplay -D hw:0,1 r441_c2.wav
> > 
> > If you see something like
> > 
> > Warning: rate is not accurate (requested = 44100Hz, got = 48000Hz)
> >          please, try the plug plugin 
> > 
> > That means McBSP/AIC33 are not setup to handle sample rate of 44.1K
> > directly.  The sample rates are covered by software.  The problem is
> > likely in the area of rate conversion.
> 
> And ... seeking someone who has a bit of spare time,
> a DM6446 EVM, and interest in solving it:  that EVM
> can switch audio clocking at runtime, among six different
> sample rates (of which those are two).
> 
> So it would be interesting to get that working.  :)
> 

Looking at the code, I think support for various sample rates for boards
that uses aix3x are in place.  The values to correctly divide down the
clock are calculated in aic3x_hw_params.  I think it is a matter of
making AIC3X the clock master, advertise the rates, and test...  simple
right :-)


> 
>  
> > If you don't see the warning, McBSP/AIC33 is setup to handle 44.1K
> > directly.  You man want to check with clock settings (make sure
AIC33 is
> > setup as the master).
> 
> 




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