Hello.

Hemant Pedanekar wrote:

This patch depends on "Add clock info and update mux setup for ATA" patch
submitted earlier.

An I2C driver is added for controlling the CPLD register 0, which drives
ATA_RSTn and ATA_PWD.

Signed-off-by: Hemant Pedanekar <[email protected]>

[...]

diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c 
b/arch/arm/mach-davinci/board-dm646x-evm.c
index 575c6ca..99382d8 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -44,6 +44,7 @@
 #include <mach/common.h>
 #include <mach/psc.h>
 #include <mach/serial.h>
+#include <mach/mux.h>
 #include <mach/i2c.h>
 #include <mach/mmc.h>
 #include <mach/emac.h>
@@ -52,10 +53,88 @@
 #define DM646X_EVM_PHY_MASK            (0x2)
 #define DM646X_EVM_MDIO_FREQUENCY      (2200000) /* PHY bus frequency */
+#define DAVINCI_CFC_ATA_BASE 0x01C66000
+
 static struct davinci_uart_config uart_config __initdata = {
        .enabled_uarts = (1 << 0),
 };
+static struct resource ide_resources[] = {
+       {
+               .start          = DAVINCI_CFC_ATA_BASE,
+               .end            = DAVINCI_CFC_ATA_BASE + 0x7ff,
+               .flags          = IORESOURCE_MEM,
+       },
+       {
+               .start          = IRQ_DM646X_IDE,
+               .end            = IRQ_DM646X_IDE,
+               .flags          = IORESOURCE_IRQ,
+       },
+};
+
+static u64 ide_dma_mask = DMA_BIT_MASK(32);
+
+static struct platform_device ide_dev = {
+       .name           = "palm_bk3710",
+       .id             = -1,
+       .resource       = ide_resources,
+       .num_resources  = ARRAY_SIZE(ide_resources),
+       .dev = {
+               .dma_mask               = &ide_dma_mask,
+               .coherent_dma_mask      = DMA_BIT_MASK(32),
+       },
+};

IDE is not board specific device -- why in the world are you adding it to the board file? Ah, I see: it's done that way in board-dm646x-evm.c... but I don't think it's correct. Kevin?

+/* CPLD Register 0: used for I/O Control */
+static struct i2c_client *cpld_reg0_client;
+
+static int cpld_reg0_probe(struct i2c_client *client,
+               const struct i2c_device_id *id)
+{
+       char data;
+       struct i2c_msg msg[2] = {
+               {
+                       .addr = client->addr,
+                       .flags = I2C_M_RD,
+                       .len = 1,
+                       .buf = &data,
+               },
+               {
+                       .addr = client->addr,
+                       .flags = 0,
+                       .len = 1,
+                       .buf = (void __force *)&data,

   Why cast in this case and no cast in the previous case?

+               },
+       };
+
+       cpld_reg0_client = client;
+
+       /* Control on-board CPLD to enable ATA */
+       i2c_transfer(cpld_reg0_client->adapter, msg, 1);
+       data &= ~3;
+       i2c_transfer(cpld_reg0_client->adapter, msg + 1, 1);

Ah, this controls ATA SEL and PWD signals... you could at least comment about this.

@@ -265,6 +348,20 @@ static void __init davinci_map_io(void)
        dm646x_init();
 }
+#if defined(CONFIG_IDE) || \
+    defined(CONFIG_IDE_MODULE)
+#define HAS_ATA 1
+#else
+#define HAS_ATA 0
+#endif
+
+#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
+    defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
+#define HAS_ATA 1
+#else
+#define HAS_ATA 0

   This would redefine already defined HAS_ATA.

MBR, Sergei

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