Hi all; We have a stubborn SPI problem with the DMM355. The TI Advisory SPRZ264D dated October 2008 mentions that there is a problem with the CSHOLD, specifically SPI Master Mode:" Extra Step Required to Use CSHOLD". We have followed the workaround for 8 or 16 bit writes but we still have problems with an extra byte being written when the CSHOLD is set to 0. The errata states that 'Write SPIDAT1.CSHOLD=0 using 8 or 16 bit write. (do not write to SPIDAT1[15:0]). How do we avoid writing data to this register? The SPI driver is the one written by Joshua Hintze. We have tried reading the contents, toggling CSHOLD and writing it all back but this gives us a phantom byte. The classical approach of changing CSHOLD on the last byte gives us a very destructive glitch.
We have thought of changing the driver to the original which seems to provide for byte access to registers but this would be more work than we have time for at the moment. Anyone any ideas? Regards -- --Adrian Edmonds -- --Adrian Edmonds Ramat Yishay Home +972-(0)4-9930379 Mobile +972-54-680-0580 _______________________________________________ Davinci-linux-open-source mailing list [email protected] http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
