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I want to use VPFE as data transfer interface between an FPGA and
DM6437 DSP. The VPFE is configured for 16 bit raw mode at 71MHz. HSYNC
and VSYNC will be supplied by FPGA. I want to understand how the 16bit
data will be stored in SDRAM. Will it be stored linearly ? A diagram
explaning SDRAM data format will be more helpful. Thanks, --
Joyab Bhabharawala eInfochips | The Solutions People Tel. No. +91 26563705 (Ext. 116) www.einfochips.com --
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