Sudhakar Rajashekhara <[email protected]> writes:
> This patch adds platform data for the 8MB NOR flash
> found on da850/omap-l138 EVM. Both NOR and NAND can
> co-exist on da850/omap-l138 as they are using different
> chip selects.
>
> Signed-off-by: Sudhakar Rajashekhara <[email protected]>
Mostly ok, see below.
> ---
> This patch has been tested on DA850/OMAP-L138 EVM.
>
> This patch depends on the following patches which
> I have submitted to davinci git:
> [PATCH] davinci: Add MMC/SD support for da850/omap-l138
> [PATCH] davinci: Configure MDIO pins for EMAC
> [PATCH] davinci: Add NAND flash support for DA850/OMAP-L138
Same as previous...
> arch/arm/mach-davinci/board-da850-evm.c | 62
> ++++++++++++++++++++++++++++
> arch/arm/mach-davinci/da850.c | 51 +++++++++++++++++++++++
> arch/arm/mach-davinci/include/mach/da8xx.h | 2 +
> arch/arm/mach-davinci/include/mach/mux.h | 35 ++++++++++++++++
> 4 files changed, 150 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-davinci/board-da850-evm.c
> b/arch/arm/mach-davinci/board-da850-evm.c
> index da37a63..39ed364 100644
> --- a/arch/arm/mach-davinci/board-da850-evm.c
> +++ b/arch/arm/mach-davinci/board-da850-evm.c
> @@ -22,6 +22,7 @@
> #include <linux/mtd/mtd.h>
> #include <linux/mtd/nand.h>
> #include <linux/mtd/partitions.h>
> +#include <linux/mtd/physmap.h>
>
> #include <asm/mach-types.h>
> #include <asm/mach/arch.h>
> @@ -35,6 +36,41 @@
> #define DA850_EVM_PHY_MASK 0x1
> #define DA850_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
>
> +#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
> +static struct mtd_partition da850_evm_norflash_partition[] = {
> + {
> + .name = "NOR filesystem",
> + .offset = 0,
> + .size = MTDPART_SIZ_FULL,
> + .mask_flags = 0,
> + },
> +};
> +
> +static struct physmap_flash_data da850_evm_norflash_data = {
> + .width = 2,
> + .parts = da850_evm_norflash_partition,
> + .nr_parts = ARRAY_SIZE(da850_evm_norflash_partition),
> +};
> +
> +static struct resource da850_evm_norflash_resource[] = {
> + {
> + .start = DA8XX_AEMIF_CS2_BASE,
> + .end = DA8XX_AEMIF_CS2_BASE + SZ_32M - 1,
> + .flags = IORESOURCE_MEM,
> + },
> +};
> +
> +static struct platform_device da850_evm_norflash_device = {
> + .name = "physmap-flash",
> + .id = 0,
> + .dev = {
> + .platform_data = &da850_evm_norflash_data,
> + },
> + .num_resources = 1,
> + .resource = da850_evm_norflash_resource,
> +};
> +#endif
> +
> #if defined(CONFIG_MTD_NAND_DAVINCI) ||
> defined(CONFIG_MTD_NAND_DAVINCI_MODULE)
> /* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash
> * (128K blocks). It may be used instead of the (default) SPI flash
> @@ -118,6 +154,9 @@ static struct platform_device *da850_evm_devices[]
> __initdata = {
> #if defined(CONFIG_MTD_NAND_DAVINCI) ||
> defined(CONFIG_MTD_NAND_DAVINCI_MODULE)
> &da850_evm_nandflash_device,
> #endif
> +#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
> + &da850_evm_norflash_device,
> +#endif
> };
>
> #if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE)
> @@ -163,6 +202,20 @@ static struct davinci_mmc_config da850_mmc_config = {
> };
> #endif
>
> +#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
> +static void __init da850_evm_init_nor(void)
> +{
> + void __iomem *aemif_addr;
> +
> + aemif_addr = ioremap(DA8XX_AEMIF_CTL_BASE, SZ_32K - 1);
> +
> + /* Configure data bus width of CS2 to 16 bit */
> + __raw_writel(1, aemif_addr + 0x10);
> +
> + iounmap(aemif_addr);
> +}
> +#endif
Probably don't need #ifdef here as it is __init.
> static __init void da850_evm_init(void)
> {
> struct davinci_soc_info *soc_info = &davinci_soc_info;
> @@ -175,6 +228,15 @@ static __init void da850_evm_init(void)
> ret);
> #endif
>
> +#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
> + ret = da8xx_pinmux_setup(da850_nor_pins);
> + if (ret)
> + pr_warning("da850_evm_init: nor mux setup failed: %d\n",
> + ret);
> +
> + da850_evm_init_nor();
> +#endif
> +
> platform_add_devices(da850_evm_devices,
> ARRAY_SIZE(da850_evm_devices));
>
> diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
> index e0fd7fe..a4fa1d7 100644
> --- a/arch/arm/mach-davinci/da850.c
> +++ b/arch/arm/mach-davinci/da850.c
> @@ -410,6 +410,41 @@ static const struct mux_config da850_pins[] = {
> MUX_CFG(DA850, NEMA_CS_4, 7, 8, 15, 1, false)
> MUX_CFG(DA850, NEMA_WE, 7, 16, 15, 1, false)
> MUX_CFG(DA850, NEMA_OE, 7, 20, 15, 1, false)
> + MUX_CFG(DA850, EMA_A_0, 12, 28, 15, 1, false)
> + MUX_CFG(DA850, EMA_A_3, 12, 16, 15, 1, false)
> + MUX_CFG(DA850, EMA_A_4, 12, 12, 15, 1, false)
> + MUX_CFG(DA850, EMA_A_5, 12, 8, 15, 1, false)
> + MUX_CFG(DA850, EMA_A_6, 12, 4, 15, 1, false)
> + MUX_CFG(DA850, EMA_A_7, 12, 0, 15, 1, false)
> + MUX_CFG(DA850, EMA_A_8, 11, 28, 15, 1, false)
> + MUX_CFG(DA850, EMA_A_9, 11, 24, 15, 1, false)
> + MUX_CFG(DA850, EMA_A_10, 11, 20, 15, 1, false)
> + MUX_CFG(DA850, EMA_A_11, 11, 16, 15, 1, false)
> + MUX_CFG(DA850, EMA_A_12, 11, 12, 15, 1, false)
> + MUX_CFG(DA850, EMA_A_13, 11, 8, 15, 1, false)
> + MUX_CFG(DA850, EMA_A_14, 11, 4, 15, 1, false)
> + MUX_CFG(DA850, EMA_A_15, 11, 0, 15, 1, false)
> + MUX_CFG(DA850, EMA_A_16, 10, 28, 15, 1, false)
> + MUX_CFG(DA850, EMA_A_17, 10, 24, 15, 1, false)
> + MUX_CFG(DA850, EMA_A_18, 10, 20, 15, 1, false)
> + MUX_CFG(DA850, EMA_A_19, 10, 16, 15, 1, false)
> + MUX_CFG(DA850, EMA_A_20, 10, 12, 15, 1, false)
> + MUX_CFG(DA850, EMA_A_21, 10, 8, 15, 1, false)
> + MUX_CFG(DA850, EMA_A_22, 10, 4, 15, 1, false)
> + MUX_CFG(DA850, EMA_A_23, 10, 0, 15, 1, false)
> + MUX_CFG(DA850, EMA_D_8, 8, 28, 15, 1, false)
> + MUX_CFG(DA850, EMA_D_9, 8, 24, 15, 1, false)
> + MUX_CFG(DA850, EMA_D_10, 8, 20, 15, 1, false)
> + MUX_CFG(DA850, EMA_D_11, 8, 16, 15, 1, false)
> + MUX_CFG(DA850, EMA_D_12, 8, 12, 15, 1, false)
> + MUX_CFG(DA850, EMA_D_13, 8, 8, 15, 1, false)
> + MUX_CFG(DA850, EMA_D_14, 8, 4, 15, 1, false)
> + MUX_CFG(DA850, EMA_D_15, 8, 0, 15, 1, false)
> + MUX_CFG(DA850, EMA_BA_1, 5, 24, 15, 1, false)
> + MUX_CFG(DA850, EMA_BA_0, 5, 28, 15, 1, false)
> + MUX_CFG(DA850, EMA_CLK, 6, 0, 15, 1, false)
> + MUX_CFG(DA850, EMA_WAIT_1, 6, 24, 15, 1, false)
> + MUX_CFG(DA850, NEMA_CS_2, 7, 0, 15, 1, false)
> #endif
> };
>
> @@ -461,6 +496,22 @@ const short da850_nand_pins[] __initdata = {
> -1
> };
>
> +const short da850_nor_pins[] __initdata = {
> + DA850_EMA_BA_0, DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1,
> + DA850_NEMA_CS_2, DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0,
> + DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4,
> + DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8,
> + DA850_EMA_D_9, DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12,
> + DA850_EMA_D_13, DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0,
> + DA850_EMA_A_1, DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4,
> + DA850_EMA_A_5, DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8,
> + DA850_EMA_A_9, DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12,
> + DA850_EMA_A_13, DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16,
> + DA850_EMA_A_17, DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20,
> + DA850_EMA_A_21, DA850_EMA_A_22, DA850_EMA_A_23,
> + -1
> +};
> +
> /* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
> static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = {
> [IRQ_DA8XX_COMMTX] = 7,
> diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h
> b/arch/arm/mach-davinci/include/mach/da8xx.h
> index aa08afe..3fccca9 100644
> --- a/arch/arm/mach-davinci/include/mach/da8xx.h
> +++ b/arch/arm/mach-davinci/include/mach/da8xx.h
> @@ -38,6 +38,7 @@
> #define DA8XX_GPIO_BASE 0x01e26000
> #define DA8XX_PSC1_BASE 0x01e27000
> #define DA8XX_MMCSD0_BASE 0x01c40000
> +#define DA8XX_AEMIF_CS2_BASE 0x60000000
> #define DA8XX_AEMIF_CS3_BASE 0x62000000
> #define DA8XX_AEMIF_CTL_BASE 0x68000000
>
> @@ -107,6 +108,7 @@ extern const short da850_i2c1_pins[];
> extern const short da850_cpgmac_pins[];
> extern const short da850_mmcsd0_pins[];
> extern const short da850_nand_pins[];
> +extern const short da850_nor_pins[];
>
> int da8xx_pinmux_setup(const short pins[]);
>
> diff --git a/arch/arm/mach-davinci/include/mach/mux.h
> b/arch/arm/mach-davinci/include/mach/mux.h
> index 6b82a31..c5be645 100644
> --- a/arch/arm/mach-davinci/include/mach/mux.h
> +++ b/arch/arm/mach-davinci/include/mach/mux.h
> @@ -773,6 +773,41 @@ enum davinci_da850_index {
> DA850_NEMA_CS_4,
> DA850_NEMA_WE,
> DA850_NEMA_OE,
> + DA850_EMA_D_15,
> + DA850_EMA_D_14,
> + DA850_EMA_D_13,
> + DA850_EMA_D_12,
> + DA850_EMA_D_11,
> + DA850_EMA_D_10,
> + DA850_EMA_D_9,
> + DA850_EMA_D_8,
> + DA850_EMA_A_0,
> + DA850_EMA_A_3,
> + DA850_EMA_A_4,
> + DA850_EMA_A_5,
> + DA850_EMA_A_6,
> + DA850_EMA_A_7,
> + DA850_EMA_A_8,
> + DA850_EMA_A_9,
> + DA850_EMA_A_10,
> + DA850_EMA_A_11,
> + DA850_EMA_A_12,
> + DA850_EMA_A_13,
> + DA850_EMA_A_14,
> + DA850_EMA_A_15,
> + DA850_EMA_A_16,
> + DA850_EMA_A_17,
> + DA850_EMA_A_18,
> + DA850_EMA_A_19,
> + DA850_EMA_A_20,
> + DA850_EMA_A_21,
> + DA850_EMA_A_22,
> + DA850_EMA_A_23,
> + DA850_EMA_BA_0,
> + DA850_EMA_BA_1,
> + DA850_EMA_CLK,
> + DA850_EMA_WAIT_1,
> + DA850_NEMA_CS_2,
> };
>
> #ifdef CONFIG_DAVINCI_MUX
> --
> 1.5.6
>
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