Sudhakar Rajashekhara <[email protected]> writes:
> DA850/OMAP-L138 has 144 pins configurable as GPIO, but
> currently this has been configured as 128. This patch
> corrects it.
>
> Also, this patch adds the base address for GPIO pins
> greater than 128.
>
> Signed-off-by: Sudhakar Rajashekhara <[email protected]>
Looks fine, thanks. Pusing today.
Kevin
> ---
> arch/arm/mach-davinci/da850.c | 2 +-
> arch/arm/mach-davinci/include/mach/gpio.h | 2 ++
> arch/arm/mach-davinci/include/mach/irqs.h | 4 ++--
> 3 files changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
> index 22205a3..c5efc51 100644
> --- a/arch/arm/mach-davinci/da850.c
> +++ b/arch/arm/mach-davinci/da850.c
> @@ -623,7 +623,7 @@ static struct davinci_soc_info davinci_soc_info_da850 = {
> .intc_irq_num = DA850_N_CP_INTC_IRQ,
> .timer_info = &da850_timer_info,
> .gpio_base = IO_ADDRESS(DA8XX_GPIO_BASE),
> - .gpio_num = 128,
> + .gpio_num = 144,
> .gpio_irq = IRQ_DA8XX_GPIO0,
> .serial_dev = &da8xx_serial_device,
> .emac_pdata = &da8xx_emac_pdata,
> diff --git a/arch/arm/mach-davinci/include/mach/gpio.h
> b/arch/arm/mach-davinci/include/mach/gpio.h
> index ebcc29b..4f032b3 100644
> --- a/arch/arm/mach-davinci/include/mach/gpio.h
> +++ b/arch/arm/mach-davinci/include/mach/gpio.h
> @@ -78,6 +78,8 @@ __gpio_to_controller(unsigned gpio)
> ptr = base + 0x60;
> else if (gpio < 32 * 4)
> ptr = base + 0x88;
> + else if (gpio < 32 * 5)
> + ptr = base + 0xb0;
> else
> ptr = NULL;
> return ptr;
> diff --git a/arch/arm/mach-davinci/include/mach/irqs.h
> b/arch/arm/mach-davinci/include/mach/irqs.h
> index 6047c2d..7f755cc 100644
> --- a/arch/arm/mach-davinci/include/mach/irqs.h
> +++ b/arch/arm/mach-davinci/include/mach/irqs.h
> @@ -397,8 +397,8 @@
>
> #define DA850_N_CP_INTC_IRQ 101
>
> -/* da830/da850 currently has the most gpio pins (128) */
> -#define DAVINCI_N_GPIO 128
> +/* da850 currently has the most gpio pins (144) */
> +#define DAVINCI_N_GPIO 144
> /* da850 currently has the most irqs so use DA850_N_CP_INTC_IRQ */
> #define NR_IRQS (DA850_N_CP_INTC_IRQ +
> DAVINCI_N_GPIO)
>
> --
> 1.5.6
>
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