Hello.

Chaithrika U S wrote:

DA850/OMAP-L138 EVM has a RMII ethernet PHY on the UI
daughter card. The PHY is enabled by proper programming of the
IO Expander (TCA6416) ports. Also for RMII PHY to work, the MDIO
clock of MII PHY has to be disabled since both the PHYs have the
same address. This is done via the GPIO2[6] pin.

This patch adds support for RMII PHY. It also provides a menuconfig
option to choose the required PHY interface.

Signed-off-by: Chaithrika U S <[email protected]>

[...]

diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index 40866c6..08bdeb3 100644
--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
@@ -145,6 +145,18 @@ config DAVINCI_RESET_CLOCKS
          probably do not want this option enabled until your
          device drivers work properly.
+config DA850_RMII
+       bool "Use RMII Ethernet PHY on DA850/OMAP-L138 EVM"
+       depends on MACH_DAVINCI_DA850_EVM
+       help
+         Say Y if you want to use the RMII PHY on the DA850/OMAP-L138 EVM.
+         This PHY is found on the UI daughter card that is supplied with
+         the EVM.

   Could you call it DA850_UI_RMII then?

+         NOTE: Please take care while choosing this option, MII PHY will
+         not be functional if RMII mode is selected. This also affects
+         the operation of video devices as they are pin multiplexed with
+         RMII pins.

   "Affects" as in "they stop working"? :-)

diff --git a/arch/arm/mach-davinci/board-da850-evm.c 
b/arch/arm/mach-davinci/board-da850-evm.c
index fbc7aae..f7845bb 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
[...]
@@ -264,11 +268,103 @@ static void __init da850_evm_init_nor(void)
 #define HAS_MMC 0
 #endif
+static int gpio_exp_setup(struct i2c_client *client, unsigned gpio,
+                                               unsigned ngpio, void *c)
+{
+       struct davinci_soc_info *soc_info = &davinci_soc_info;
+       int sel_a, sel_b, sel_c;
+
+       sel_a = gpio + 7;
+       sel_b = gpio + 6;
+       sel_c = gpio + 5;
+
+       /* deselect all fucntionalities */
+       gpio_request(sel_a, "sel_a");

   Doesn't gpio_request() return result (error or 0)?

+       gpio_direction_output(sel_a, 1);
+
+       gpio_request(sel_b, "sel_b");
+       gpio_direction_output(sel_b, 1);
+
+       gpio_request(sel_c, "sel_c");
+       gpio_direction_output(sel_c, 1);
+
+       if (soc_info->emac_pdata->rmii_en) {
+               /* enable RMII */
+               gpio_direction_output(sel_a, 0);

Why not gpio_set_value() now? And why not check soc_info->emac_pdata->rmii_en before this point, when you first call gpio_direction_output()?

+               gpio_direction_output(sel_b, 1);
+               gpio_direction_output(sel_c, 1);

   Why, if you don't chenge the values?

+static void __init da850_evm_config_emac(u8 rmii_en)
+{
+       void __iomem *cfg_chip3_base;
+       int ret;
+       u32 val;
+
+       cfg_chip3_base = DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP3_REG);
+
+       /* configure the CFGCHIP3 register for RMII or MII */
+       val = readl(cfg_chip3_base);
+       if (rmii_en)
+               val |= BIT(8);
+       else
+               val &= ~BIT(8);
+
+       writel(val, cfg_chip3_base);

Should be __raw_readl() and __raw_writel() as that's what was davinci_{readl|writel}() trasnlated into...

WBR, Sergei

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