From: Steve Chen
> 
> On Wed, 2009-09-30 at 09:54 +0100, Thompson, Nick (GE EntSol,
> Intelligent Platforms) wrote:
> > > From: Steve Chen
> > >
> > > I heard rumors sometime ago that TI plan to fix the writeback
cache
> > > issue (among other issues in errata) in their next silicon rev.
> > Perhaps
> > > we can try disable cache write-through to see if the kernel boots.
> > >
> > > Steve
> > >
> >
> > Given Mark Grosen reply, it seems my device is only rev 1.1 and
> > disabling write through D-cache results in "ran out of data" in the
> > "Uncompressing Linux" step of piggy.
> >
> > I don't have rev 2.0 silicon to test the same on though.
> >
> 
> Nick,
> 
> Thanks for trying out.  We'll have to wait for the errata for rev 2.0
to
> see what has changed.  By the way, following is a link to rev 1.0 and
> rev 1.1 errata if you are curious.
> 
> http://focus.ti.com.cn/cn/lit/er/sprz290/sprz290.pdf
> 
> Regards,
> 
> Steve

I have been given PDFs of the errata information including 2.0 fixes by
TI. I haven't been given any instructions or indications that it is
proprietary information - I'm told it is on the TI web site. Do you want
me to share it on the list?

The cache issue has been fixed BTW.

There are also four new (to me) errata against 1.0, 1.1 and 2.0
revisions - one of which is fixed in 2.0.

Nick.

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