I have a DM6467 that resides on a PCI bus, and the 6467 is not currently doing bus-mastering (slave mode only).
I have written the drivers for both the host (x86 box running linux kernel 2.6.31) and the ARM (monta vista 2.6.18), and am interested in getting the highest performance possible when transferring data from card to host via PCI -- this transaction is a PCI read that is mastered by the host. Right now the procedure my driver uses to configure the card and read data is as follows: 1) during init, maps the BAR containing the data into kernel space via request_region() followed by ioremap(); 2) for transfer of data I am simply calling copy_to_user(), asking it to read a large block of data (many KB) and copy it to user space. The BAR in question is DDR_B, which is 8 MB in size, and prefetchable. The transfer works fine, except that it is slow as MUD -- when I scope the PCI bus signals, I see that the read is not doing a burst transfer; instead, only 4 bytes of data are being transferred at a time. I know that the 6467 is capable of bursting, as is the bridge that sits between the CPU and the 6467 (the Intel 82801 PCI bridge)...so I am confused as to why a burst read isn't "just happening". Can anyone give me advice as to how to get these slave-mode burst reads working? Thanks! Steve _______________________________________________ Davinci-linux-open-source mailing list [email protected] http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
