On Thu, 2010-01-21 at 05:19 -0800, rohan tabish wrote: > Thanks steve for your reply i hav another question for you > > We have made our own custom board and hav attached the NAND over EMIF > also FIFO's attached.I load the DSP code from the JTAG it runs fine.it > does a kind of a DMA.But when i load the DSP code via linux and > release the DSP i get following message print and the system gets halt > can you please tell what is the cause of such an error > > > > mtd->read(0x44 bytes from 0x8a498bc) returned ECC error > Node CRC ffffffff != calculated CRC f09e7845 for node at 08a498bc > read_cache_page() returned error: -5 > Error garbage collecting node at 08a498bc! > jffs2_flush_wbuf(): Write failed with -5 > Recovery of wbuf failed due to a second write error > jffs2_flush_wbuf(): Write failed with -5 > Recovery of wbuf failed due to a second write error >
Rohan, I appears that the data read from NAND is corrupted. I can think of 2 scenarios that may cause that. 1. Interference from DSP (possible but not likely). 2. Interference from another kernel thread. This is just a guess based on previous experience on another device hang off of EMIF on another SoC (DM9000 on DM355). DM9000 is an Ethernet controller used on DM355. DMA does not work for DM9000 and all data (both receive and transmit) are actually done within ISR. The reason is that all register access require two steps. 1. Write the offset of the register that needs to be accessed in an EMIF control register. 2. Read/write data from an EMIF data register. Of course, if the register offset ever gets changed in the control register while DMA is in progress, the data will get corrupted. Since I don't know anything about your custom board, this is only my best guess. Regards, Steve _______________________________________________ Davinci-linux-open-source mailing list [email protected] http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
