On Tue, May 11, 2010 at 6:36 PM, DISTEC Kloiber Thomas <[email protected]> wrote: > Hi Arie, > I just wanted to let you know, that you exactly hit the mark with your > assumption regarding the priority registers below. > Thank you very much! > Some details for the list: > Due to a silicon bug in DM6443 rev 1.3 the default value 0x00040444 was used > for register MSTPRI0 (see silicon errata for details). This register is > responsible for "Switched Central Resource (SCR) Bus Priorities". This > register was not initialized in our firmware at all. The default value just > worked fine. > In silicon rev 2.1 this bug has been fixed and thus the default value has > changed to 0x00050111. For us this value caused the problem I described below. > Now I'm setting the register to 0x00040444 in u-boot explicitly and > everything works fine for silicon rev 2.1 as well. > Thanks again! > Kind regards > Thomas
Hi, I would suggest you to look in to errata. Hope audio buffers are in IRAM as suggested in it. Regards, Viral _______________________________________________ Davinci-linux-open-source mailing list [email protected] http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
