Christophe Aeschlimann wrote:
I was surprised to see that the PINMUX registers configuration (in da850.c) is SOC dependant (part of common initialisation).
Frankly speaking, I don't see where the pin lists are a part of common initialization. Unless you mean da850_pins[] -- that is SoC specific of course as the PinMux registers are situated in the SoC.
Yes I realised that after Caglar's answer. I first thought the da850_pins structure in da850.c was used to define the functionality of every PINMUX where it just defines a possible configuration.
I think the PINMUX configuration is definitely a board specific setting.
The pin lists there are just the default ones, readily overridable by the board code. With the annoyng exception of da850_nand_pins[] and da850_nor_pins[] which should have been in board-da850-evm.c really...
Do you agree with me ? Did I miss something and the PINMUX configuration can already be easily overloaded in the board specific configuration ?
Yes.
I was just surprised I had to add my own PINMUX possible configuration inside the da850_pins struct in da850.c
No wonder -- that table is just incomplete. TI was too lazy to enter every PinMux field there.
so I could have a board specific list of pins inside my board specific file. Or maybe there is another way to handle that ?
No, you describe how to enable the pins in da850_pins[], and you enable the pins you need in your board code.
Regards,
WBR, Sergei _______________________________________________ Davinci-linux-open-source mailing list [email protected] http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
