Stuart, Got your point. I understand that your concern is about the function clock itself. But I don't think that should cause the kind of errors you mentioned. Anyways, I would let the device experts to comment on this, but I thought on DM355-270 part, it was ok to use SD controller at 135MHz function clock.
The better place to get an answer for this would be the TI E2E forum. I would suggest you post your question there on DM3x processor forum. Regards, Anshuman -----Original Message----- From: Paul Stuart [mailto:[email protected]] Sent: Thursday, July 22, 2010 8:04 PM To: Saxena, Anshuman; '[email protected]' Subject: RE: Dm355-270 SD/MMC Module Freq tis true. The issue I raise though is that the DM355's SD/MMC module itself claims an internal upper frequency range of 100MHz. Check out Page 12 of: " MS320DM35x Digital Media System-on-Chip (DMSoC) Multimedia Card (MMC)/Secure Digital (SD) (SDIO) Card Controller Reference Guide" ( SPRUEE2C) Here's a snip from it "The MMC/SD controller has two clocks, the function clock and the memory clock (Figure 4). The function clock determines the operational frequency of the MMC/SD controller and is the input clock to the MMC/SD controller on the device. The MMC/SD controller is capable of operating with a function clock up to 100 MHz." Problem is, if you are running your part at 270 MHz, the input clock is 135 MHz. ________________________________________ From: Saxena, Anshuman [[email protected]] Sent: Thursday, July 22, 2010 12:30 AM To: Paul Stuart; '[email protected]' Subject: RE: Dm355-270 SD/MMC Module Freq Stuart, I was mentioning about the CLKRT register in MMC/SD controller. That can be programmed to send out a lower clock to SD card, to meet the specification of less than 50MHz for SDHC cards. Regards, Anshuman -----Original Message----- From: Paul Stuart [mailto:[email protected]] Sent: Thursday, July 22, 2010 10:16 AM To: Saxena, Anshuman; '[email protected]' Subject: RE: Dm355-270 SD/MMC Module Freq Unfortunately it is a fixed divide-by-four, so the module frequency is strictly coupled to the system clock. ________________________________________ From: Saxena, Anshuman [[email protected]] Sent: Wednesday, July 21, 2010 6:55 PM To: Paul Stuart; '[email protected]' Subject: Re: Dm355-270 SD/MMC Module Freq Hi, If I remember correctly, there is an internal divider in the MMC/SD module which can control the clock going into the module. I have to double check though. We had used DM355-270 version and had it working with slower SD cards at 25-30 MHz clock also. So I assume your use case should be covered. Regards, Anshuman ----- Original Message ----- From: davinci-linux-open-source-bounces+anshuman=ti....@linux.davincidsp.com <davinci-linux-open-source-bounces+anshuman=ti....@linux.davincidsp.com> To: [email protected] <[email protected]> Sent: Thu Jul 22 03:22:37 2010 Subject: Dm355-270 SD/MMC Module Freq Hi There, Does anyone know if the DM355-270 can run at full speed and have reliable SD/MMC module behavior? We are using the 270 MHz variety of the DM355, clocked up to 270MHz. Now, the SD/MMC module claims that it only supports a module clock speed up to 100MHz, but running at 270 MHz produces a module's clock of 135 MHz. Since the sysclk2 divider is a fixed, to even get close to spec (108MHz) one would need to clock the ARM down to 216MHz... and start asking why we paid more for the 270 MHz part :) I see mostly good behavior on SDHC cards when we are over clocking the module at 135MHz, but get cards every now and again that throw buffer IO errors on data read timeouts. Anyone vouch for 135 MHz module clock working with a variety of SDHC cards? Thanks, Paul _______________________________________________ Davinci-linux-open-source mailing list [email protected] http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source _______________________________________________ Davinci-linux-open-source mailing list [email protected] http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
