The CPGMAC pin list in da850.c was incorrectly split into two MII/RMII mode specific pin lists, while what pin group is used is a function of how the board is wired. Copy the pin lists to board-da850-evm.c, renaming them accordingly, and merge the two lists in da850.c into one, da850_cpgmac_pins[], representing the CPGMAC module as a whole...
Signed-off-by: Sergei Shtylyov <[email protected]> --- The patch is against the recent DaVinci tree. It has only been build-tested as I don't have DA850 EVM board... arch/arm/mach-davinci/board-da850-evm.c | 21 +++++++++++++++++++-- arch/arm/mach-davinci/da850.c | 12 +++--------- arch/arm/mach-davinci/include/mach/da8xx.h | 1 - 3 files changed, 22 insertions(+), 12 deletions(-) Index: linux-davinci/arch/arm/mach-davinci/board-da850-evm.c =================================================================== --- linux-davinci.orig/arch/arm/mach-davinci/board-da850-evm.c +++ linux-davinci/arch/arm/mach-davinci/board-da850-evm.c @@ -592,6 +592,23 @@ static const short da850_evm_lcdc_pins[] -1 }; +static const short da850_evm_mii_pins[] = { + DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3, + DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER, + DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3, + DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK, + DA850_MDIO_D, + -1 +}; + +static const short da850_evm_rmii_pins[] = { + DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN, + DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1, + DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK, + DA850_MDIO_D, + -1 +}; + static int __init da850_evm_config_emac(void) { void __iomem *cfg_chip3_base; @@ -609,12 +626,12 @@ static int __init da850_evm_config_emac( if (rmii_en) { val |= BIT(8); - ret = davinci_cfg_reg_list(da850_rmii_pins); + ret = davinci_cfg_reg_list(da850_evm_rmii_pins); pr_info("EMAC: RMII PHY configured, MII PHY will not be" " functional\n"); } else { val &= ~BIT(8); - ret = davinci_cfg_reg_list(da850_cpgmac_pins); + ret = davinci_cfg_reg_list(da850_evm_mii_pins); pr_info("EMAC: MII PHY configured, RMII PHY will not be" " functional\n"); } Index: linux-davinci/arch/arm/mach-davinci/da850.c =================================================================== --- linux-davinci.orig/arch/arm/mach-davinci/da850.c +++ linux-davinci/arch/arm/mach-davinci/da850.c @@ -572,15 +572,9 @@ const short da850_cpgmac_pins[] __initda DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER, DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3, DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK, - DA850_MDIO_D, - -1 -}; - -const short da850_rmii_pins[] __initdata = { - DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN, - DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1, - DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK, - DA850_MDIO_D, + DA850_MDIO_D, DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN, + DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1, DA850_RMII_RXER, + DA850_RMII_MHZ_50_CLK, -1 }; Index: linux-davinci/arch/arm/mach-davinci/include/mach/da8xx.h =================================================================== --- linux-davinci.orig/arch/arm/mach-davinci/include/mach/da8xx.h +++ linux-davinci/arch/arm/mach-davinci/include/mach/da8xx.h @@ -120,7 +120,6 @@ extern const short da850_uart2_pins[]; extern const short da850_i2c0_pins[]; extern const short da850_i2c1_pins[]; extern const short da850_cpgmac_pins[]; -extern const short da850_rmii_pins[]; extern const short da850_mcasp_pins[]; extern const short da850_lcdcntl_pins[]; extern const short da850_mmcsd0_pins[]; _______________________________________________ Davinci-linux-open-source mailing list [email protected] http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
