Signed-off-by: Wolfram Sang <[email protected]>
Cc: Sudhakar Rajashekhara <[email protected]>
Cc: Sneha Narnakaje <[email protected]>
Cc: Artem Bityutskiy <[email protected]>
---
Found while debugging a NAND issue with a dm365.
drivers/mtd/nand/davinci_nand.c | 5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
index 2ac7367..53f864a 100644
--- a/drivers/mtd/nand/davinci_nand.c
+++ b/drivers/mtd/nand/davinci_nand.c
@@ -369,8 +369,9 @@ compare:
* after setting the 4BITECC_ADD_CALC_START bit. So if you immediately
* begin trying to poll for the state, you may fall right out of your
* loop without any of the correction calculations having taken place.
- * The recommendation from the hardware team is to wait till ECC_STATE
- * reads less than 4, which means ECC HW has entered correction state.
+ * The recommendation from the hardware team is to initially delay as
+ * long as ECC_STATE reads less than 4. After that, ECC HW has entered
+ * correction state.
*/
do {
ecc_state = (davinci_nand_readl(info,
--
1.7.1
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