Hi, On Fri, Sep 17, 2010 at 08:32:11, Jon Povey wrote: > When setting up to transmit, a race exists between the ISR and > i2c_davinci_xfer_msg() trying to load the first byte and adjust counters. > This is mostly visible for transmits > 1 byte long. > > The hardware starts sending immediately that MDR is loaded. IMR trickery > doesn't work because if we start sending, finish the first byte and an > XRDY event occurs before we load IMR to unmask it, we never get an > interrupt, and we timeout. > > Move the MDR load after DXR,IMR loads to avoid this race without locking. > > Tested on DM355 connected to Techwell TW2836 and Wolfson WM8985 >
I remember I had some issues on OMAP-L138 with this fix, that's when I reverted to configuring ICMDR before writing to DXR (Please see here: https://patchwork.kernel.org/patch/75262/). I checked the BIOS I2C driver code for OMAP-L138 and there also we are configuring MDR before accessing DXR. Regards, Sudhakar _______________________________________________ Davinci-linux-open-source mailing list Davinci-linux-open-source@linux.davincidsp.com http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
