Hirosh Dabui <[email protected]> writes:
> Hello Kevin,
>
> here is the Changelog, i hope that will be enough.
This is a better changelog, but it needs to accompany the patch please.
Kevin
> Changelog: There was a bug in the register indexing for GPIOs numbers> 31 to
> get the relevant hardware registers of tnetv107x to control the GPIOs.
>
> In the structure tnetv107x_gpio_regs:
>
> struct tnetv107x_gpio_regs {
> u32 idver;
> u32 data_in[3];
> u32 data_out[3];
> u32 direction[3];
> u32 enable[3];
> };
>
>
> The GPIO hardware register addresses of tnetv107x are stored.
> The chip implements 3 registers of each entity to serve 96 GPIOs, each
> register provides a subset of 32 GPIOs.
>
> The driver provides these macros: gpio_reg_set_bit, gpio_reg_get_bit and
> gpio_reg_clear_bit.
>
> The bug implied the use of macros to access the relevant hardware register
> e.g. the driver code used the macro like this:
> 'gpio_reg_clear_bit(®->data_out, gpio)'
>
> But it has to be used like this:
> 'gpio_reg_clear_bit(reg->data_out, gpio)'.
>
> The different results are shown here:
> -&p->data_out + 1 (it will add the full array size of data_out i.e. 12 bytes)
> -p->data_out + 1 (it will increment only the size of data_out i.e. only 4
> bytes)
>
>
>
> br,
>
> Hirosh Dabui
> On 12/21/2010 05:50 PM, Kevin Hilman wrote:
>> Hirosh Dabui<[email protected]> writes:
>>
>> Please add a descriptive changelog here describing the problem being
>> fixed.
>>
>> Also, I'll need an Acked-by from Cyril before merging any tnetv107x
>> patches.
>>
>> Kevin
>>
>>
>>
>>> Signed-off-by: Hirosh Dabui<[email protected]>
>>> ---
>>> arch/arm/mach-davinci/gpio-tnetv107x.c | 18 +++++++++---------
>>> 1 files changed, 9 insertions(+), 9 deletions(-)
>>>
>>> diff --git a/arch/arm/mach-davinci/gpio-tnetv107x.c
>>> b/arch/arm/mach-davinci/gpio-tnetv107x.c
>>> index d102986..3fa3e28 100644
>>> --- a/arch/arm/mach-davinci/gpio-tnetv107x.c
>>> +++ b/arch/arm/mach-davinci/gpio-tnetv107x.c
>>> @@ -58,7 +58,7 @@ static int tnetv107x_gpio_request(struct gpio_chip *chip,
>>> unsigned offset)
>>>
>>> spin_lock_irqsave(&ctlr->lock, flags);
>>>
>>> - gpio_reg_set_bit(®s->enable, gpio);
>>> + gpio_reg_set_bit(regs->enable, gpio);
>>>
>>> spin_unlock_irqrestore(&ctlr->lock, flags);
>>>
>>> @@ -74,7 +74,7 @@ static void tnetv107x_gpio_free(struct gpio_chip *chip,
>>> unsigned offset)
>>>
>>> spin_lock_irqsave(&ctlr->lock, flags);
>>>
>>> - gpio_reg_clear_bit(®s->enable, gpio);
>>> + gpio_reg_clear_bit(regs->enable, gpio);
>>>
>>> spin_unlock_irqrestore(&ctlr->lock, flags);
>>> }
>>> @@ -88,7 +88,7 @@ static int tnetv107x_gpio_dir_in(struct gpio_chip *chip,
>>> unsigned offset)
>>>
>>> spin_lock_irqsave(&ctlr->lock, flags);
>>>
>>> - gpio_reg_set_bit(®s->direction, gpio);
>>> + gpio_reg_set_bit(regs->direction, gpio);
>>>
>>> spin_unlock_irqrestore(&ctlr->lock, flags);
>>>
>>> @@ -106,11 +106,11 @@ static int tnetv107x_gpio_dir_out(struct gpio_chip
>>> *chip,
>>> spin_lock_irqsave(&ctlr->lock, flags);
>>>
>>> if (value)
>>> - gpio_reg_set_bit(®s->data_out, gpio);
>>> + gpio_reg_set_bit(regs->data_out, gpio);
>>> else
>>> - gpio_reg_clear_bit(®s->data_out, gpio);
>>> + gpio_reg_clear_bit(regs->data_out, gpio);
>>>
>>> - gpio_reg_clear_bit(®s->direction, gpio);
>>> + gpio_reg_clear_bit(regs->direction, gpio);
>>>
>>> spin_unlock_irqrestore(&ctlr->lock, flags);
>>>
>>> @@ -124,7 +124,7 @@ static int tnetv107x_gpio_get(struct gpio_chip *chip,
>>> unsigned offset)
>>> unsigned gpio = chip->base + offset;
>>> int ret;
>>>
>>> - ret = gpio_reg_get_bit(®s->data_in, gpio);
>>> + ret = gpio_reg_get_bit(regs->data_in, gpio);
>>>
>>> return ret ? 1 : 0;
>>> }
>>> @@ -140,9 +140,9 @@ static void tnetv107x_gpio_set(struct gpio_chip *chip,
>>> spin_lock_irqsave(&ctlr->lock, flags);
>>>
>>> if (value)
>>> - gpio_reg_set_bit(®s->data_out, gpio);
>>> + gpio_reg_set_bit(regs->data_out, gpio);
>>> else
>>> - gpio_reg_clear_bit(®s->data_out, gpio);
>>> + gpio_reg_clear_bit(regs->data_out, gpio);
>>>
>>> spin_unlock_irqrestore(&ctlr->lock, flags);
>>> }
>>>
>
>
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