Hi, According to the register description of the MDSTATn registers of the AM1808 SoC the module state with regard to the power and sleep controller (PSC) is given in bits 5-0. Hence, the bitmask that is used to read the module state should be 0x3f. However, the MDSTAT_STATE_MASK defined in arch/arm/mach-davinci/include/mach/psc.h is set to 0x1f.
This was already reported by Sergei Shtylyov [1] but apparently it has not been changed. Is there any special reason why this was not corrected? Best regards, Christian [1] http://linux.davincidsp.com/pipermail/davinci-linux-open-source/2009-April/012618.html _______________________________________________ Davinci-linux-open-source mailing list [email protected] http://linux.davincidsp.com/mailman/listinfo/davinci-linux-open-source
