On Sun, 22 Apr 2018, Michael Schmitz wrote: > > a bus error is encountered once the processor attempts to transfer > additional bytes after the ESP has ended DMA mode. >
No, these algorithms continue to transfer after a bus error. > Am I missing something else here? > Yeah, a circuit schematic. Unfortunately I don't have one either, so we have to try to draw inferences. I don't think IRQs are relevant to this discussion but I'm just guessing. --
