--- leveldb.orig/port/atomic_pointer.h
+++ leveldb/port/atomic_pointer.h
@@ -48,6 +48,8 @@
 #define ARCH_CPU_SPARC_FAMILY 1
 #elif defined(__mips__) || defined(__mips64__)
 #define ARCH_CPU_MIPS_FAMILY 1
+#elif defined(__sh__)
+#define ARCH_CPU_SH_FAMILY 1
 #endif
 
 namespace leveldb {
@@ -183,6 +185,25 @@ inline void WriteMemoryBarrier() {
 }
 #define LEVELDB_HAVE_MEMORY_BARRIER
 
+// SH
+#elif defined(ARCH_CPU_SH_FAMILY)
+#if defined(__SH4A__) || defined(__SH5__)
+inline void ReadMemoryBarrier() {
+  __asm__ __volatile__ ("synco": : :"memory");
+}
+inline void WriteMemoryBarrier() {
+  __asm__ __volatile__ ("synco": : :"memory");
+}
+#else
+inline void ReadMemoryBarrier() {
+  __asm__ __volatile__ ("": : :"memory");
+}
+inline void WriteMemoryBarrier() {
+  __asm__ __volatile__ ("": : :"memory");
+}
+#endif
+#define LEVELDB_HAVE_MEMORY_BARRIER
+
 #endif
 
 // AtomicPointer built using platform-specific MemoryBarrier()
@@ -243,6 +264,7 @@ class AtomicPointer {
 #undef ARCH_CPU_S390_FAMILY
 #undef ARCH_CPU_SPARC_FAMILY
 #undef ARCH_CPU_MIPS_FAMILY
+#undef ARCH_CPU_SH_FAMILY
 
 }  // namespace port
 }  // namespace leveldb