Your message dated Mon, 12 Oct 2015 18:43:26 +0100
with message-id <[email protected]>
and subject line Re: libgc: update libatomic-ops for mips64el
has caused the Debian Bug report #774885,
regarding libgc: update libatomic-ops for mips64el
to be marked as done.
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--- Begin Message ---
Package: libatomic-ops-dev
Version: 7.4.2-1
Severity: important
Tags: upstream patch
Hi,
libatomic-ops FTBFS on mips64el due to the testsuite hanging. The code
in the mips specific header assumes that sizeof(AO_t) == 4, which isn't
the case on mips64el which is 64-bits.
I've attached a patch to fix this. Instead of using the 32-bit LL and SC
instructions, it uses the 64-bit LLD and SCD instructions when compiled
on mips64.
Thanks,
James
From 80e8ad2494db151fa35843a2908ff7f11d278ce0 Mon Sep 17 00:00:00 2001
From: James Cowgill <[email protected]>
Date: Mon, 15 Dec 2014 14:42:15 +0000
Subject: [PATCH] Use LLD / SCD instructions on mips64
---
src/atomic_ops/sysdeps/gcc/mips.h | 54 ++++++++++++++++++++++-----------------
1 file changed, 30 insertions(+), 24 deletions(-)
diff --git a/src/atomic_ops/sysdeps/gcc/mips.h b/src/atomic_ops/sysdeps/gcc/mips.h
index a891de6..83a6bd3 100644
--- a/src/atomic_ops/sysdeps/gcc/mips.h
+++ b/src/atomic_ops/sysdeps/gcc/mips.h
@@ -15,7 +15,6 @@
* FIXME: This should probably make finer distinctions. SGI MIPS is
* much more strongly ordered, and in fact closer to sequentially
* consistent. This is really aimed at modern embedded implementations.
- * It looks to me like this assumes a 32-bit ABI. -HB
*/
#include "../all_aligned_atomic_load_store.h"
@@ -27,14 +26,24 @@
/* Data dependence does not imply read ordering. */
#define AO_NO_DD_ORDERING
+#ifdef __mips64
+# define AO_MIPS_SET_ISA " .set mips3\n"
+# define AO_MIPS_LL_1(args) " lld " args "\n"
+# define AO_MIPS_SC(args) " scd " args "\n"
+#else
+# define AO_MIPS_SET_ISA " .set mips2\n"
+# define AO_MIPS_LL_1(args) " ll " args "\n"
+# define AO_MIPS_SC(args) " sc " args "\n"
+# define AO_T_IS_INT
+#endif
+
#ifdef AO_ICE9A1_LLSC_WAR
/* ICE9 rev A1 chip (used in very few systems) is reported to */
/* have a low-frequency bug that causes LL to fail. */
/* To workaround, just issue the second 'LL'. */
-# define AO_MIPS_LL_FIX(args_str) \
- " ll " args_str "\n"
+# define AO_MIPS_LL(args) AO_MIPS_LL_1(args) AO_MIPS_LL_1(args)
#else
-# define AO_MIPS_LL_FIX(args_str) ""
+# define AO_MIPS_LL(args) AO_MIPS_LL_1(args)
#endif
AO_INLINE void
@@ -42,7 +51,7 @@ AO_nop_full(void)
{
__asm__ __volatile__(
" .set push \n"
- " .set mips2 \n"
+ AO_MIPS_SET_ISA
" .set noreorder \n"
" .set nomacro \n"
" sync \n"
@@ -60,13 +69,13 @@ AO_fetch_and_add(volatile AO_t *addr, AO_t incr)
__asm__ __volatile__(
" .set push\n"
- " .set mips2\n"
+ AO_MIPS_SET_ISA
" .set noreorder\n"
" .set nomacro\n"
- "1: ll %0, %2\n"
- AO_MIPS_LL_FIX("%0, %2")
+ "1: "
+ AO_MIPS_LL("%0, %2")
" addu %1, %0, %3\n"
- " sc %1, %2\n"
+ AO_MIPS_SC("%1, %2")
" beqz %1, 1b\n"
" nop\n"
" .set pop "
@@ -85,13 +94,13 @@ AO_test_and_set(volatile AO_TS_t *addr)
__asm__ __volatile__(
" .set push\n"
- " .set mips2\n"
+ AO_MIPS_SET_ISA
" .set noreorder\n"
" .set nomacro\n"
- "1: ll %0, %2\n"
- AO_MIPS_LL_FIX("%0, %2")
+ "1: "
+ AO_MIPS_LL("%0, %2")
" move %1, %3\n"
- " sc %1, %2\n"
+ AO_MIPS_SC("%1, %2")
" beqz %1, 1b\n"
" nop\n"
" .set pop "
@@ -114,14 +123,14 @@ AO_test_and_set(volatile AO_TS_t *addr)
__asm__ __volatile__(
" .set push \n"
- " .set mips2 \n"
+ AO_MIPS_SET_ISA
" .set noreorder \n"
" .set nomacro \n"
- "1: ll %0, %1 \n"
- AO_MIPS_LL_FIX("%0, %1")
+ "1: "
+ AO_MIPS_LL("%0, %1")
" bne %0, %4, 2f \n"
" move %0, %3 \n"
- " sc %0, %1 \n"
+ AO_MIPS_SC("%0, %1")
" .set pop \n"
" beqz %0, 1b \n"
" li %2, 1 \n"
@@ -142,14 +151,14 @@ AO_fetch_compare_and_swap(volatile AO_t *addr, AO_t old, AO_t new_val)
__asm__ __volatile__(
" .set push\n"
- " .set mips2\n"
+ AO_MIPS_SET_ISA
" .set noreorder\n"
" .set nomacro\n"
- "1: ll %0, %2\n"
- AO_MIPS_LL_FIX("%0, %2")
+ "1: "
+ AO_MIPS_LL("%0, %2")
" bne %0, %4, 2f\n"
" move %1, %3\n"
- " sc %1, %2\n"
+ AO_MIPS_SC("%1, %2")
" beqz %1, 1b\n"
" nop\n"
" .set pop\n"
@@ -167,6 +176,3 @@ AO_fetch_compare_and_swap(volatile AO_t *addr, AO_t old, AO_t new_val)
/* CAS primitives with acquire, release and full semantics are */
/* generated automatically (and AO_int_... primitives are */
/* defined properly after the first generalization pass). */
-
-/* FIXME: 32-bit ABI is assumed. */
-#define AO_T_IS_INT
--
2.1.3
--- End Message ---
--- Begin Message ---
Hi,
On Mon, 2015-10-12 at 19:01 +0200, Christoph Egger wrote:
> Hi!
>
> libgc should be using the system libatomic_ops. Are you sure this patch
> is needed on the libgc package?
In that case the patch probably isn't needed. I think I just grepped
the archive for libatomic-ops occurrences to update, when I originally
filed this.
James
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