--- Begin Message ---
Package: release.debian.org
Severity: normal
User: release.debian....@packages.debian.org
Usertags: unblock
Please unblock package libpfm4
It contains a few patches cherry picked from upstream fixing/improving
event definitions to better support newer CPUs.
unblock libpfm4/4.8.0-2
Andreas
diff -Nru libpfm4-4.8.0/debian/changelog libpfm4-4.8.0/debian/changelog
--- libpfm4-4.8.0/debian/changelog 2016-11-07 15:46:31.000000000 +0100
+++ libpfm4-4.8.0/debian/changelog 2017-03-11 02:47:54.000000000 +0100
@@ -1,3 +1,13 @@
+libpfm4 (4.8.0-2) unstable; urgency=medium
+
+ [ Andreas Beckmann ]
+ * Cherry-pick event fixes, event additions and RAPL support for newer CPUs.
+
+ [ Dimitri John Ledkov ]
+ * Execute validation tests at build time. LP: #1521969
+
+ -- Andreas Beckmann <a...@debian.org> Sat, 11 Mar 2017 02:47:54 +0100
+
libpfm4 (4.8.0-1) unstable; urgency=medium
* New upstream release.
diff -Nru libpfm4-4.8.0/debian/patches/0001-Fix-offcore_response-for-Intel-BDW-EP.patch libpfm4-4.8.0/debian/patches/0001-Fix-offcore_response-for-Intel-BDW-EP.patch
--- libpfm4-4.8.0/debian/patches/0001-Fix-offcore_response-for-Intel-BDW-EP.patch 1970-01-01 01:00:00.000000000 +0100
+++ libpfm4-4.8.0/debian/patches/0001-Fix-offcore_response-for-Intel-BDW-EP.patch 2017-03-11 02:47:54.000000000 +0100
@@ -0,0 +1,102 @@
+From 05edb2f56598752e14071009c3c52cb22ae6036b Mon Sep 17 00:00:00 2001
+From: Stephane Eranian <eran...@gmail.com>
+Date: Sun, 5 Feb 2017 00:35:24 -0800
+Subject: [PATCH 1/3] Fix offcore_response for Intel BDW-EP
+
+The umasks was missing all the L3_HIT umasks because
+they wer all marked as Broadwell (client) only.
+
+Signed-off-by: Stephane Eranian <eran...@gmail.com>
+---
+ lib/events/intel_bdw_events.h | 12 ------------
+ 1 file changed, 12 deletions(-)
+
+diff --git a/lib/events/intel_bdw_events.h b/lib/events/intel_bdw_events.h
+index fba5ad2..ba5d1f7 100644
+--- a/lib/events/intel_bdw_events.h
++++ b/lib/events/intel_bdw_events.h
+@@ -1746,81 +1746,69 @@ static const intel_x86_umask_t bdw_offcore_response[]={
+ { .uname = "L3_HITM",
+ .udesc = "Supplier: counts L3 hits in M-state (initial lookup)",
+ .ucode = 1ULL << (18+8),
+- .umodel = PFM_PMU_INTEL_BDW,
+ .grpid = 1,
+ },
+ { .uname = "LLC_HITM",
+ .udesc = "Supplier: counts L3 hits in M-state (initial lookup)",
+ .ucode = 1ULL << (18+8),
+ .uequiv = "L3_HITM",
+- .umodel = PFM_PMU_INTEL_BDW,
+ .grpid = 1,
+ },
+ { .uname = "L3_HITE",
+ .udesc = "Supplier: counts L3 hits in E-state",
+ .ucode = 1ULL << (19+8),
+- .umodel = PFM_PMU_INTEL_BDW,
+ .grpid = 1,
+ },
+ { .uname = "LLC_HITE",
+ .udesc = "Supplier: counts L3 hits in E-state",
+ .ucode = 1ULL << (19+8),
+ .uequiv = "L3_HITE",
+- .umodel = PFM_PMU_INTEL_BDW,
+ .grpid = 1,
+ },
+ { .uname = "L3_HITS",
+ .udesc = "Supplier: counts L3 hits in S-state",
+ .ucode = 1ULL << (20+8),
+- .umodel = PFM_PMU_INTEL_BDW,
+ .grpid = 1,
+ },
+ { .uname = "LLC_HITS",
+ .udesc = "Supplier: counts L3 hits in S-state",
+ .ucode = 1ULL << (20+8),
+ .uequiv = "L3_HITS",
+- .umodel = PFM_PMU_INTEL_BDW,
+ .grpid = 1,
+ },
+ { .uname = "L3_HITF",
+ .udesc = "Supplier: counts L3 hits in F-state",
+ .ucode = 1ULL << (21+8),
+- .umodel = PFM_PMU_INTEL_BDW,
+ .grpid = 1,
+ },
+ { .uname = "LLC_HITF",
+ .udesc = "Supplier: counts L3 hits in F-state",
+ .ucode = 1ULL << (20+8),
+ .uequiv = "L3_HITF",
+- .umodel = PFM_PMU_INTEL_BDW,
+ .grpid = 1,
+ },
+ { .uname = "L3_HITMESF",
+ .udesc = "Supplier: counts L3 hits in any state (M, E, S, F)",
+ .ucode = 0xfULL << (18+8),
+ .uequiv = "L3_HITM:L3_HITE:L3_HITS:L3_HITF",
+- .umodel = PFM_PMU_INTEL_BDW,
+ .grpid = 1,
+ },
+ { .uname = "LLC_HITMESF",
+ .udesc = "Supplier: counts L3 hits in any state (M, E, S, F)",
+ .ucode = 0xfULL << (18+8),
+ .uequiv = "L3_HITMESF",
+- .umodel = PFM_PMU_INTEL_BDW,
+ .grpid = 1,
+ },
+ { .uname = "L3_HIT",
+ .udesc = "Alias for L3_HITMESF",
+ .ucode = 0xfULL << (18+8),
+ .uequiv = "L3_HITM:L3_HITE:L3_HITS:L3_HITF",
+- .umodel = PFM_PMU_INTEL_BDW,
+ .grpid = 1,
+ },
+ { .uname = "LLC_HIT",
+ .udesc = "Alias for LLC_HITMESF",
+ .ucode = 0xfULL << (18+8),
+ .uequiv = "L3_HITM:L3_HITE:L3_HITS:L3_HITF",
+- .umodel = PFM_PMU_INTEL_BDW,
+ .grpid = 1,
+ },
+ { .uname = "L3_MISS_LOCAL",
+--
+2.11.0
+
diff -Nru libpfm4-4.8.0/debian/patches/0002-add-UOPS_DISPATCHED_PORT-event-for-Intel-Skylake.patch libpfm4-4.8.0/debian/patches/0002-add-UOPS_DISPATCHED_PORT-event-for-Intel-Skylake.patch
--- libpfm4-4.8.0/debian/patches/0002-add-UOPS_DISPATCHED_PORT-event-for-Intel-Skylake.patch 1970-01-01 01:00:00.000000000 +0100
+++ libpfm4-4.8.0/debian/patches/0002-add-UOPS_DISPATCHED_PORT-event-for-Intel-Skylake.patch 2017-03-11 02:47:54.000000000 +0100
@@ -0,0 +1,87 @@
+From 28ba4f45ab37915a4e91c6f8d33318bb6a1b1947 Mon Sep 17 00:00:00 2001
+From: Stephane Eranian <eran...@gmail.com>
+Date: Tue, 21 Feb 2017 23:49:07 -0800
+Subject: [PATCH 2/3] add UOPS_DISPATCHED_PORT event for Intel Skylake
+
+This patch add UOPS_DISPATCHED_PORT event for Intel Skylake event.
+This is the official name of the event 0xa1.
+
+Make the old UOPS_DISPATCHED event an alias for backward
+compatibility reason.
+
+Also add a test case for the new event and alias.
+
+Signed-off-by: Stephane Eranian <eran...@gmail.com>
+---
+ lib/events/intel_skl_events.h | 19 ++++++++++++++-----
+ tests/validate_x86.c | 12 ++++++++++++
+ 2 files changed, 26 insertions(+), 5 deletions(-)
+
+diff --git a/lib/events/intel_skl_events.h b/lib/events/intel_skl_events.h
+index e7b522d..84dfabf 100644
+--- a/lib/events/intel_skl_events.h
++++ b/lib/events/intel_skl_events.h
+@@ -1154,7 +1154,7 @@ static const intel_x86_umask_t skl_uops_executed[]={
+ },
+ };
+
+-static const intel_x86_umask_t skl_uops_dispatched[]={
++static const intel_x86_umask_t skl_uops_dispatched_port[]={
+ { .uname = "PORT_0",
+ .udesc = "Cycles which a Uop is executed on port 0",
+ .ucode = 0x100,
+@@ -2510,15 +2510,24 @@ static const intel_x86_entry_t intel_skl_pe[]={
+ .numasks = LIBPFM_ARRAY_SIZE(skl_lsd),
+ .umasks = skl_lsd,
+ },
+-
++ { .name = "UOPS_DISPATCHED_PORT",
++ .desc = "Uops dispatched to specific ports",
++ .code = 0xa1,
++ .cntmsk = 0xff,
++ .ngrp = 1,
++ .modmsk = INTEL_V4_ATTRS,
++ .numasks = LIBPFM_ARRAY_SIZE(skl_uops_dispatched_port),
++ .umasks = skl_uops_dispatched_port,
++ },
+ { .name = "UOPS_DISPATCHED",
+- .desc = "Uops dispatch to specific ports",
++ .desc = "Uops dispatched to specific ports",
++ .equiv = "UOPS_DISPATCHED_PORT",
+ .code = 0xa1,
+ .cntmsk = 0xff,
+ .ngrp = 1,
+ .modmsk = INTEL_V4_ATTRS,
+- .numasks = LIBPFM_ARRAY_SIZE(skl_uops_dispatched),
+- .umasks = skl_uops_dispatched,
++ .numasks = LIBPFM_ARRAY_SIZE(skl_uops_dispatched_port),
++ .umasks = skl_uops_dispatched_port,
+ },
+ { .name = "UOPS_ISSUED",
+ .desc = "Uops issued",
+diff --git a/tests/validate_x86.c b/tests/validate_x86.c
+index c9770fc..790ba58 100644
+--- a/tests/validate_x86.c
++++ b/tests/validate_x86.c
+@@ -4031,6 +4031,18 @@ static const test_event_t x86_test_events[]={
+ .ret = PFM_ERR_ATTR_SET,
+ },
+ { SRC_LINE,
++ .name = "skl::uops_dispatched_port:port_0",
++ .count = 1,
++ .codes[0] = 0x5301a1,
++ .fstr = "skl::UOPS_DISPATCHED_PORT:PORT_0:k=1:u=1:e=0:i=0:c=0:t=0:intx=0:intxcp=0",
++ },
++ { SRC_LINE,
++ .name = "skl::uops_dispatched:port_0",
++ .count = 1,
++ .codes[0] = 0x5301a1,
++ .fstr = "skl::UOPS_DISPATCHED_PORT:PORT_0:k=1:u=1:e=0:i=0:c=0:t=0:intx=0:intxcp=0",
++ },
++ { SRC_LINE,
+ .name = "hsw::CYCLE_ACTIVITY:CYCLES_L2_PENDING:k=1:u=1:e=0:i=0:c=1:t=0:intx=0:intxcp=0",
+ .ret = PFM_SUCCESS,
+ .count = 1,
+--
+2.11.0
+
diff -Nru libpfm4-4.8.0/debian/patches/0003-update-Intel-RAPL-processor-support.patch libpfm4-4.8.0/debian/patches/0003-update-Intel-RAPL-processor-support.patch
--- libpfm4-4.8.0/debian/patches/0003-update-Intel-RAPL-processor-support.patch 1970-01-01 01:00:00.000000000 +0100
+++ libpfm4-4.8.0/debian/patches/0003-update-Intel-RAPL-processor-support.patch 2017-03-11 02:47:54.000000000 +0100
@@ -0,0 +1,94 @@
+From 1bd352eef242f53e130c3b025bbf7881a5fb5d1e Mon Sep 17 00:00:00 2001
+From: Stephane Eranian <eran...@gmail.com>
+Date: Wed, 22 Feb 2017 01:16:42 -0800
+Subject: [PATCH 3/3] update Intel RAPL processor support
+
+Added Kabylake, Skylake X
+
+Added PSYS RAPL event for Skylake client.
+
+Signed-off-by: Stephane Eranian <eran...@gmail.com>
+---
+ lib/pfmlib_intel_rapl.c | 51 ++++++++++++++++++++++++++++++++++---------------
+ 1 file changed, 36 insertions(+), 15 deletions(-)
+
+diff --git a/lib/pfmlib_intel_rapl.c b/lib/pfmlib_intel_rapl.c
+index 1413b5f..8a04079 100644
+--- a/lib/pfmlib_intel_rapl.c
++++ b/lib/pfmlib_intel_rapl.c
+@@ -59,6 +59,20 @@ static const intel_x86_entry_t intel_rapl_cln_pe[]={
+ }
+ };
+
++static const intel_x86_entry_t intel_rapl_skl_cln_pe[]={
++ RAPL_COMMON_EVENTS,
++ { .name = "RAPL_ENERGY_GPU",
++ .desc = "Number of Joules consumed by the builtin GPU. Unit is 2^-32 Joules",
++ .cntmsk = 0x8,
++ .code = 0x4,
++ },
++ { .name = "RAPL_ENERGY_PSYS",
++ .desc = "Number of Joules consumed by the builtin PSYS. Unit is 2^-32 Joules",
++ .cntmsk = 0x8,
++ .code = 0x5,
++ }
++};
++
+ static const intel_x86_entry_t intel_rapl_srv_pe[]={
+ RAPL_COMMON_EVENTS,
+ { .name = "RAPL_ENERGY_DRAM",
+@@ -97,29 +111,36 @@ pfm_rapl_detect(void *this)
+ return PFM_ERR_NOTSUPP;
+
+ switch(pfm_intel_x86_cfg.model) {
+- case 42: /* Sandy Bridge */
+- case 58: /* Ivy Bridge */
+- case 60: /* Haswell */
+- case 69: /* Haswell */
+- case 70: /* Haswell */
+- case 61: /* Broadwell */
+- case 71: /* Broadwell */
+- case 78: /* Skylake */
+- case 94: /* Skylake H/S */
++ case 42: /* Sandy Bridge */
++ case 58: /* Ivy Bridge */
++ case 60: /* Haswell */
++ case 69: /* Haswell */
++ case 70: /* Haswell */
++ case 61: /* Broadwell */
++ case 71: /* Broadwell GT3E */
++ case 92: /* Goldmont */
+ /* already setup by default */
+ break;
+- case 45: /* Sandy Bridg-EP */
+- case 62: /* Ivy Bridge-EP */
++ case 45: /* Sandy Bridg-EP */
++ case 62: /* Ivy Bridge-EP */
+ intel_rapl_support.pe = intel_rapl_srv_pe;
+ intel_rapl_support.pme_count = LIBPFM_ARRAY_SIZE(intel_rapl_srv_pe);
+ break;
+- case 63: /* Haswell-EP */
+- case 79: /* Broadwell-EP */
+- case 86: /* Broadwell D */
++ case 78: /* Skylake */
++ case 94: /* Skylake H/S */
++ case 142: /* Kabylake */
++ case 158: /* Kabylake */
++ intel_rapl_support.pe = intel_rapl_skl_cln_pe;
++ intel_rapl_support.pme_count = LIBPFM_ARRAY_SIZE(intel_rapl_skl_cln_pe);
++ break;
++ case 63: /* Haswell-EP */
++ case 79: /* Broadwell-EP */
++ case 86: /* Broadwell D */
++ case 85: /* Skylake X */
+ intel_rapl_support.pe = intel_rapl_hswep_pe;
+ intel_rapl_support.pme_count = LIBPFM_ARRAY_SIZE(intel_rapl_hswep_pe);
+ break;
+- default:
++ default :
+ return PFM_ERR_NOTSUPP;
+ }
+ return PFM_SUCCESS;
+--
+2.11.0
+
diff -Nru libpfm4-4.8.0/debian/patches/series libpfm4-4.8.0/debian/patches/series
--- libpfm4-4.8.0/debian/patches/series 2016-11-07 15:46:31.000000000 +0100
+++ libpfm4-4.8.0/debian/patches/series 2017-03-11 02:47:54.000000000 +0100
@@ -1,3 +1,6 @@
+0001-Fix-offcore_response-for-Intel-BDW-EP.patch
+0002-add-UOPS_DISPATCHED_PORT-event-for-Intel-Skylake.patch
+0003-update-Intel-RAPL-processor-support.patch
hyphenation.patch
typos.patch
man-sections.patch
diff -Nru libpfm4-4.8.0/debian/rules libpfm4-4.8.0/debian/rules
--- libpfm4-4.8.0/debian/rules 2016-11-07 15:46:31.000000000 +0100
+++ libpfm4-4.8.0/debian/rules 2017-03-11 02:47:54.000000000 +0100
@@ -36,6 +36,10 @@
LDFLAGS="$(filter-out -pie,$(LDFLAGS))" \
dh_auto_build --sourcedirectory=python --buildsystem=python_distutils
+.PHONE: override dh_auto_test
+override_dh_auto_test:
+ ./tests/validate
+
.PHONY: override_dh_auto_install
override_dh_auto_install:
make install \
--- End Message ---
