Package: openmpi
Version: 1.6.5-5
Tags: patch
Severity: important
Hello,
I have attached patches that enable building of package openmpi_1.6.5-5
on following architectures: mips, mipsel, mips64, mips64el.
First, these architectures have to be supported, added to debian/control file.
File debian/control is patched with the following patch:
diff -upNr openmpi-1.6.5-orig/debian/control openmpi-1.6.5/debian/control
--- openmpi-1.6.5-orig/debian/control 2013-08-28 06:52:24.000000000 +0000
+++ openmpi-1.6.5/debian/control 2013-12-11 16:38:26.000000000 +0000
@@ -16,7 +16,7 @@ Vcs-Svn: svn://svn.debian.org/svn/pkg-op
Vcs-Browser: http://svn.debian.org/wsvn/pkg-openmpi/openmpi/trunk/
Package: openmpi-bin
-Architecture: alpha amd64 armel armhf i386 ia64 powerpc powerpcspe ppc64 sparc
sparc64 kfreebsd-i386 kfreebsd-amd64 hurd-i386
+Architecture: alpha amd64 armel armhf i386 ia64 powerpc powerpcspe ppc64 sparc
sparc64 kfreebsd-i386 kfreebsd-amd64 hurd-i386 mips mipsel mips64 mips64el
Depends: ${shlibs:Depends}, ${misc:Depends}, openmpi-common (=
${source:Version})
Conflicts: openmpi-bin
Suggests: gfortran, openmpi-checkpoint [amd64 armel armhf i386 powerpc]
@@ -45,7 +45,7 @@ Description: high performance message pa
Package: libopenmpi-dev
Section: libdevel
-Architecture: alpha amd64 armel armhf i386 ia64 powerpc powerpcspe ppc64 sparc
sparc64 kfreebsd-i386 kfreebsd-amd64 hurd-i386
+Architecture: alpha amd64 armel armhf i386 ia64 powerpc powerpcspe ppc64 sparc
sparc64 kfreebsd-i386 kfreebsd-amd64 hurd-i386 mips mipsel mips64 mips64el
Depends: ${shlibs:Depends}, ${misc:Depends}, libopenmpi1.6 (=
${binary:Version}), openmpi-common (= ${source:Version}), libibverbs-dev
[!kfreebsd-i386 !kfreebsd-amd64 !hurd-i386], libhwloc-dev
Conflicts: openmpi-dev, libopenmpi-dev, openmpi-bin (<= 1.2.4-0)
Description: high performance message passing library -- header files
@@ -60,7 +60,7 @@ Description: high performance message pa
Package: libopenmpi1.6
Section: libs
-Architecture: alpha amd64 armel armhf i386 ia64 powerpc powerpcspe ppc64 sparc
sparc64 kfreebsd-i386 kfreebsd-amd64 hurd-i386
+Architecture: alpha amd64 armel armhf i386 ia64 powerpc powerpcspe ppc64 sparc
sparc64 kfreebsd-i386 kfreebsd-amd64 hurd-i386 mips mipsel mips64 mips64el
Depends: ${shlibs:Depends}, ${misc:Depends}
Conflicts: openmpi-libs0, libopenmpi1, libopenmpi1.3, libopenmpi2
Description: high performance message passing library -- shared library
@@ -104,7 +104,7 @@ Description: high performance message pa
Package: libopenmpi1.6-dbg
Section: debug
-Architecture: alpha amd64 armel armhf i386 ia64 powerpc powerpcspe ppc64 sparc
sparc64 kfreebsd-i386 kfreebsd-amd64 hurd-i386
+Architecture: alpha amd64 armel armhf i386 ia64 powerpc powerpcspe ppc64 sparc
sparc64 kfreebsd-i386 kfreebsd-amd64 hurd-i386 mips mipsel mips64 mips64el
Depends: ${misc:Depends}, openmpi-bin (= ${binary:Version}), libopenmpi1.6 (=
${binary:Version})
Conflicts: openmpi-dbg, libopenmpi-dbg
Description: high performance message passing library -- debug library
Next, there are 3 patches (in attachment):
mips-support-upstream-1.7.3.diff - patches MIPS.asm and
mips/atomic.h files to a latest 1.7.3 version of source
mips-support-fix.diff - resolve issue of
misinterpretation of assembler code from MIPS.asm and fix mips64(el) assembler
code.
mips-detection.diff - support detection of
mips, mipsel, mips64, mips64el architectures
Package openmpi for mips, mipsel, mips64 and mips64el is successfully built
after applying these patches.
Misinterpretation of assembler code from MIPS.asm explained:
this is part of code from original MIPS.asm source file:
< LEAF(opal_atomic_cmpset_32)
< .set noreorder
< retry1:
< ll $3, 0($4)
< bne $3, $5, done1
< or $2, $6, 0
< sc $2, 0($4)
< beqz $2, retry1
< done1:
< .set reorder
<
< xor $3,$3,$5
< j ra
< sltu $2,$3,1
< END(opal_atomic_cmpset_32)
this is a part of code from a patched MIPS.asm source file:
< LEAF(opal_atomic_cmpset_32)
< .set noreorder
< retry1:
< ll $3, 0($4)
< bne $3, $5, done1
< or $2, $6, 0
< sc $2, 0($4)
< beqz $2, retry1
< done1:
< .set reorder
<
< xor $3,$3,$5
< j ra
< sltu $2,$3,1
< .set reorder
< END(opal_atomic_cmpset_32)
without a patch, resulting code is:
< Dump of assembler code for function opal_atomic_cmpset_32:
< 0x00400ce8 <+0>: ll v1,0(a0)
< 0x00400cec <+4>: bne v1,a1,0x400cfc <done1>
< 0x00400cf0 <+8>: ori v0,a2,0x0
< 0x00400cf4 <+12>: sc v0,0(a0)
< 0x00400cf8 <+16>: beqz v0,0x400ce8 <opal_atomic_cmpset_32>
< 0x00400cfc <+0>: xor v1,v1,a1
< => 0x00400d00 <+4>: jr ra
< 0x00400d04 <+8>: move at,at
< 0x00400d08 <+12>: sltiu v0,v1,1
< End of assembler dump.
with a patch, resulting code is:
< Dump of assembler code for function opal_atomic_cmpset_32:
< 0x00400ce8 <+0>: ll v1,0(a0)
< 0x00400cec <+4>: bne v1,a1,0x400cfc <done1>
< 0x00400cf0 <+8>: ori v0,a2,0x0
< 0x00400cf4 <+12>: sc v0,0(a0)
< 0x00400cf8 <+16>: beqz v0,0x400ce8 <opal_atomic_cmpset_32>
< 0x00400cfc <+0>: xor v1,v1,a1
< => 0x00400d00 <+4>: jr ra
< 0x00400d04 <+8>: sltiu v0,v1,1
< End of assembler dump.
Note the lines 0x00400d00 and 0x00400d04.
Without a patch line "sltiu v0,v1,1" is never executed
because after a line "jr ra"
instruction "move at,at" is inserted in a delay slot of
a "jr" instruction.
We would be happy to provide more information if needed.
Thanks!
JuricaDescription: Patches MIPS.asm and mips/atomic.h files to a 1.7.3 version of source
Author: Jurica Stanojkovic <[email protected]>
--- openmpi-1.6.5.orig/opal/asm/base/MIPS.asm
+++ openmpi-1.6.5/opal/asm/base/MIPS.asm
@@ -1,26 +1,48 @@
START_FILE
+#ifdef __linux__
#include <sys/asm.h>
+#else
+#include <asm.h>
+#endif
#include <regdef.h>
TEXT
ALIGN(8)
LEAF(opal_atomic_mb)
- sync
+#ifdef __linux__
+ .set mips2
+#endif
+ sync
+#ifdef __linux__
+ .set mips0
+#endif
j ra
END(opal_atomic_mb)
ALIGN(8)
LEAF(opal_atomic_rmb)
- sync
+#ifdef __linux__
+ .set mips2
+#endif
+ sync
+#ifdef __linux__
+ .set mips0
+#endif
j ra
END(opal_atomic_rmb)
LEAF(opal_atomic_wmb)
- sync
+#ifdef __linux__
+ .set mips2
+#endif
+ sync
+#ifdef __linux__
+ .set mips0
+#endif
j ra
END(opal_atomic_wmb)
@@ -28,10 +50,22 @@ END(opal_atomic_wmb)
LEAF(opal_atomic_cmpset_32)
.set noreorder
retry1:
+#ifdef __linux__
+ .set mips2
+#endif
ll $3, 0($4)
+#ifdef __linux__
+ .set mips0
+#endif
bne $3, $5, done1
or $2, $6, 0
+#ifdef __linux__
+ .set mips2
+#endif
sc $2, 0($4)
+#ifdef __linux__
+ .set mips0
+#endif
beqz $2, retry1
done1:
.set reorder
@@ -45,13 +79,31 @@ END(opal_atomic_cmpset_32)
LEAF(opal_atomic_cmpset_acq_32)
.set noreorder
retry2:
+#ifdef __linux__
+ .set mips2
+#endif
ll $3, 0($4)
+#ifdef __linux__
+ .set mips0
+#endif
bne $3, $5, done2
or $2, $6, 0
+#ifdef __linux__
+ .set mips2
+#endif
sc $2, 0($4)
+#ifdef __linux__
+ .set mips0
+#endif
beqz $2, retry2
done2:
- sync
+#ifdef __linux__
+ .set mips2
+#endif
+ sync
+#ifdef __linux__
+ .set mips0
+#endif
.set reorder
xor $3,$3,$5
@@ -62,12 +114,30 @@ END(opal_atomic_cmpset_acq_32)
LEAF(opal_atomic_cmpset_rel_32)
.set noreorder
- sync
+#ifdef __linux__
+ .set mips2
+#endif
+ sync
+#ifdef __linux__
+ .set mips0
+#endif
retry3:
+#ifdef __linux__
+ .set mips2
+#endif
ll $3, 0($4)
+#ifdef __linux__
+ .set mips0
+#endif
bne $3, $5, done3
or $2, $6, 0
+#ifdef __linux__
+ .set mips2
+#endif
sc $2, 0($4)
+#ifdef __linux__
+ .set mips0
+#endif
beqz $2, retry3
done3:
.set reorder
@@ -77,7 +147,7 @@ done3:
sltu $2,$3,1
END(opal_atomic_cmpset_rel_32)
-
+#ifdef __mips64
LEAF(opal_atomic_cmpset_64)
.set noreorder
retry4:
@@ -128,3 +198,4 @@ done6:
j ra
sltu $3,$4,1
END(opal_atomic_cmpset_rel_64)
+#endif /* __mips64 */
--- openmpi-1.6.5.orig/opal/include/opal/sys/mips/atomic.h
+++ openmpi-1.6.5/opal/include/opal/sys/mips/atomic.h
@@ -23,10 +23,17 @@
#if OPAL_WANT_SMP_LOCKS
/* BWB - FIX ME! */
+#ifdef __linux__
+#define MB() __asm__ __volatile__(".set mips2; sync; .set mips0": : :"memory")
+#define RMB() __asm__ __volatile__(".set mips2; sync; .set mips0": : :"memory")
+#define WMB() __asm__ __volatile__(".set mips2; sync; .set mips0": : :"memory")
+#define SMP_SYNC ".set mips2; sync; .set mips0"
+#else
#define MB() __asm__ __volatile__("sync": : :"memory")
#define RMB() __asm__ __volatile__("sync": : :"memory")
#define WMB() __asm__ __volatile__("sync": : :"memory")
#define SMP_SYNC "sync"
+#endif
#else
@@ -46,8 +53,10 @@
#define OPAL_HAVE_ATOMIC_MEM_BARRIER 1
#define OPAL_HAVE_ATOMIC_CMPSET_32 1
-#define OPAL_HAVE_ATOMIC_CMPSET_64 1
+#ifdef __mips64
+#define OPAL_HAVE_ATOMIC_CMPSET_64 1
+#endif
/**********************************************************************
*
@@ -93,10 +102,16 @@ static inline int opal_atomic_cmpset_32(
__asm__ __volatile__ (".set noreorder \n"
".set noat \n"
"1: \n"
+#ifdef __linux__
+ ".set mips2 \n\t"
+#endif
"ll %0, %2 \n" /* load *addr into ret */
"bne %0, %z3, 2f \n" /* done if oldval != ret */
"or $1, %z4, 0 \n" /* tmp = newval (delay slot) */
"sc $1, %2 \n" /* store tmp in *addr */
+#ifdef __linux__
+ ".set mips0 \n\t"
+#endif
/* note: ret will be 0 if failed, 1 if succeeded */
"beqz $1, 1b \n" /* if 0 jump back to 1b */
"nop \n" /* fill delay slots */
@@ -133,7 +148,7 @@ static inline int opal_atomic_cmpset_rel
return opal_atomic_cmpset_32(addr, oldval, newval);
}
-
+#ifdef OPAL_HAVE_ATOMIC_CMPSET_64
static inline int opal_atomic_cmpset_64(volatile int64_t *addr,
int64_t oldval, int64_t newval)
{
@@ -182,6 +197,7 @@ static inline int opal_atomic_cmpset_rel
opal_atomic_wmb();
return opal_atomic_cmpset_64(addr, oldval, newval);
}
+#endif /* OPAL_HAVE_ATOMIC_CMPSET_64 */
#endif /* OMPI_GCC_INLINE_ASSEMBLY */
Description: Patch resolve issue of misinterpretation of assembler code from MIPS.asm
and fix mips64(el) assembler code.
Author: Jurica Stanojkovic <[email protected]>
--- openmpi-1.6.5.orig/opal/asm/base/MIPS.asm
+++ openmpi-1.6.5/opal/asm/base/MIPS.asm
@@ -68,11 +68,11 @@ retry1:
#endif
beqz $2, retry1
done1:
- .set reorder
xor $3,$3,$5
j ra
sltu $2,$3,1
+ .set reorder
END(opal_atomic_cmpset_32)
@@ -104,11 +104,11 @@ done2:
#ifdef __linux__
.set mips0
#endif
- .set reorder
xor $3,$3,$5
j ra
sltu $2,$3,1
+ .set reorder
END(opal_atomic_cmpset_acq_32)
@@ -140,16 +140,16 @@ retry3:
#endif
beqz $2, retry3
done3:
- .set reorder
xor $3,$3,$5
j ra
sltu $2,$3,1
+ .set reorder
END(opal_atomic_cmpset_rel_32)
#ifdef __mips64
LEAF(opal_atomic_cmpset_64)
- .set noreorder
+ .set noreorder
retry4:
lld $3, 0($4)
bne $3, $5, done4
@@ -157,11 +157,11 @@ retry4:
scd $2, 0($4)
beqz $2, retry4
done4:
- .set reorder
- xor $4,$3,$5
+ xor $3,$3,$5
j ra
- sltu $3,$4,1
+ sltu $2,$3,1
+ .set reorder
END(opal_atomic_cmpset_64)
@@ -174,11 +174,11 @@ retry5:
scd $2, 0($4)
beqz $2, retry5
done5:
- .set reorder
sync
- xor $4,$3,$5
+ xor $3,$3,$5
j ra
- sltu $3,$4,1
+ sltu $2,$3,1
+ .set reorder
END(opal_atomic_cmpset_acq_64)
@@ -192,10 +192,10 @@ retry6:
scd $2, 0($4)
beqz $2, retry6
done6:
- .set reorder
- xor $4,$3,$5
+ xor $3,$3,$5
j ra
- sltu $3,$4,1
+ sltu $2,$3,1
+ .set reorder
END(opal_atomic_cmpset_rel_64)
#endif /* __mips64 */
Description: Support detection of mips, mipsel, mips64, mips64el architectures
Author: Jurica Stanojkovic <[email protected]>
--- openmpi-1.6.5.orig/configure
+++ openmpi-1.6.5/configure
@@ -27231,8 +27231,13 @@ _ACEOF
OMPI_GCC_INLINE_ASSIGN='"mov %0, #0" : "=&r"(ret)'
;;
- mips-*|mips64*)
- # Should really find some way to make sure that we are on
+ mips-*|mipsel-*)
+ ompi_cv_asm_arch="MIPS"
+ OPAL_ASM_SUPPORT_64BIT=0
+ OMPI_GCC_INLINE_ASSIGN='"or %0,$0,$0" : "=&r"(ret)'
+ ;;
+
+ mips64-*|mips64el-*)
# a MIPS III machine (r4000 and later)
ompi_cv_asm_arch="MIPS"
OPAL_ASM_SUPPORT_64BIT=1
--- openmpi-1.6.5.orig/opal/config/opal_config_asm.m4
+++ openmpi-1.6.5/opal/config/opal_config_asm.m4
@@ -930,8 +930,13 @@ AC_DEFUN([OMPI_CONFIG_ASM],[
OMPI_GCC_INLINE_ASSIGN='"mov %0, #0" : "=&r"(ret)'
;;
- mips-*|mips64*)
- # Should really find some way to make sure that we are on
+ mips-*|mipsel-*)
+ ompi_cv_asm_arch="MIPS"
+ OPAL_ASM_SUPPORT_64BIT=0
+ OMPI_GCC_INLINE_ASSIGN='"or %0,[$]0,[$]0" : "=&r"(ret)'
+ ;;
+
+ mips64-*|mips64el-*)
# a MIPS III machine (r4000 and later)
ompi_cv_asm_arch="MIPS"
OPAL_ASM_SUPPORT_64BIT=1
