On Wed, 29 Jan 2014 06:57:39 -0500 (EST), Henrique de Moraes Holschuh wrote:
>
> Some processors update per core, not per hardware thread (hardware threads
> show up as separate "cpus" in Linux x86/x86-64). When a hardware thread is
> updated on these processors, it actually updates all hardware threads that
> share that core.
There are three problems with that theory.
(1) The AMD FX-4300 is actually four
cores with one CPU each, not two cores with two logical ("hyperthreaded") CPUs
each. If in fact it only has two cores, with two logical CPUs each,
then AMD is guilty of false advertising. There is a pairing of cores in some
fashion for the purpose of sharing the L2 cache. There are two L2 caches of
2 MB each: two of the cores share one L2 cache, and the other two cores share
the other L2 cache. All four cores share a common 4 MB L3 cache. But they
are separate cores, not hardware threads.
(2) Older kernels, specifically
linux-image-3.2.0-4-amd64, revision 3.2.51-1, the current production wheezy
kernel, have four microcode update messages,
not just two, for the same chip, and
(3) I have an example of a hyperthreaded core machine as well.
Another machine I own has a 32-bit Intel processor, a Xeon(TM) 2.40 GHz chip,
cpu family 15, which has a single core with two threads. A custom 3.11.10
kernel reports two microcode update messages, even with two logical CPUs
in a single core. I'll include the relevant messages for this machine in
a moment, but first I'd like to point out that the information in /proc/cpuinfo
for the AMD FX-4300 processor is inconsistent. It reports that there are
two cores, yet each processor has a unique core id (0-3). In the information
for the processor below, it only reports one core, and the same core id (0)
for each logical processor.
I suspect that a data file somewhere which contains statistical data for the
AMD FX-4300 is incorrect. The number of cores in that file for that processor
should be 4, not 2.
Here is the relevant information from dmesg for the hyperthreaded single core
machine:
-----
microcode: CPU0 sig=0xf27, pf=0x2, revision=0x34
platform microcode: firmware: agent loaded intel-ucode/0f-02-07 into memory
microcode: CPU0 sig=0xf27, pf=0x2, revision=0x34
microcode: CPU0 updated to revision 0x38, date = 2003-06-04
microcode: CPU1 sig=0xf27, pf=0x2, revision=0x34
platform microcode: firmware: agent loaded intel-ucode/0f-02-07 into memory
microcode: CPU1 sig=0xf27, pf=0x2, revision=0x34
microcode: CPU1 updated to revision 0x38, date = 2003-06-04
microcode: Microcode Update Driver: v2.00 <[email protected]>, Peter
Oruba
-----
And here is the corresponding information from /proc/cpuinfo for the same
machine:
-----
processor : 0
vendor_id : GenuineIntel
cpu family : 15
model : 2
model name : Intel(R) Xeon(TM) CPU 2.40GHz
stepping : 7
microcode : 0x38
cpu MHz : 2392.388
cache size : 512 KB
physical id : 0
siblings : 2
core id : 0
cpu cores : 1
apicid : 0
initial apicid : 0
fdiv_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 2
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pebs bts cid xtpr
bogomips : 4784.77
clflush size : 64
cache alignment : 128
address sizes : 36 bits physical, 32 bits virtual
power management:
processor : 1
vendor_id : GenuineIntel
cpu family : 15
model : 2
model name : Intel(R) Xeon(TM) CPU 2.40GHz
stepping : 7
microcode : 0x38
cpu MHz : 2392.388
cache size : 512 KB
physical id : 0
siblings : 2
core id : 0
cpu cores : 1
apicid : 1
initial apicid : 1
fdiv_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 2
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe pebs bts cid xtpr
bogomips : 4784.72
clflush size : 64
cache alignment : 128
address sizes : 36 bits physical, 32 bits virtual
power management:
-----
--
.''`. Stephen Powell
: :' :
`. `'`
`-
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