Package: src:nspr Version: 4.10.6-1 Severity: wishlist Tags: upstream patch
Dear Maintainer, The attached patch adds support for the upcoming Debian architecture OpenRISC (or1k). -- System Information: Debian Release: jessie/sid APT prefers testing-updates APT policy: (500, 'testing-updates'), (500, 'testing') Architecture: amd64 (x86_64) Kernel: Linux 3.13-1-amd64 (SMP w/8 CPU cores) Locale: LANG=en_US.UTF-8, LC_CTYPE=en_US.UTF-8 (charmap=UTF-8) Shell: /bin/sh linked to /bin/dash
--- ./nspr/pr/include/md/_linux.cfg.orig 2014-08-01 22:11:46.763917524 +0200 +++ ./nspr/pr/include/md/_linux.cfg 2014-08-01 22:09:11.363033182 +0200 @@ -924,6 +924,51 @@ #define PR_BYTES_PER_WORD_LOG2 2 #define PR_BYTES_PER_DWORD_LOG2 3 +#elif defined(__or1k__) + +#undef IS_LITTLE_ENDIAN +#define IS_BIG_ENDIAN 1 + +#define PR_BYTES_PER_BYTE 1 +#define PR_BYTES_PER_SHORT 2 +#define PR_BYTES_PER_INT 4 +#define PR_BYTES_PER_INT64 8 +#define PR_BYTES_PER_LONG 4 +#define PR_BYTES_PER_FLOAT 4 +#define PR_BYTES_PER_DOUBLE 8 +#define PR_BYTES_PER_WORD 4 +#define PR_BYTES_PER_DWORD 8 + +#define PR_BITS_PER_BYTE 8 +#define PR_BITS_PER_SHORT 16 +#define PR_BITS_PER_INT 32 +#define PR_BITS_PER_INT64 64 +#define PR_BITS_PER_LONG 32 +#define PR_BITS_PER_FLOAT 32 +#define PR_BITS_PER_DOUBLE 64 +#define PR_BITS_PER_WORD 32 + +#define PR_BITS_PER_BYTE_LOG2 3 +#define PR_BITS_PER_SHORT_LOG2 4 +#define PR_BITS_PER_INT_LOG2 5 +#define PR_BITS_PER_INT64_LOG2 6 +#define PR_BITS_PER_LONG_LOG2 5 +#define PR_BITS_PER_FLOAT_LOG2 5 +#define PR_BITS_PER_DOUBLE_LOG2 6 +#define PR_BITS_PER_WORD_LOG2 5 + +#define PR_ALIGN_OF_SHORT 2 +#define PR_ALIGN_OF_INT 4 +#define PR_ALIGN_OF_LONG 4 +#define PR_ALIGN_OF_INT64 4 +#define PR_ALIGN_OF_FLOAT 4 +#define PR_ALIGN_OF_DOUBLE 4 +#define PR_ALIGN_OF_POINTER 4 +#define PR_ALIGN_OF_WORD 4 + +#define PR_BYTES_PER_WORD_LOG2 2 +#define PR_BYTES_PER_DWORD_LOG2 3 + #else #error "Unknown CPU architecture" --- ./nspr/pr/include/md/_linux.h.orig 2014-08-01 23:14:35.549052940 +0200 +++ ./nspr/pr/include/md/_linux.h 2014-08-01 23:09:27.011346747 +0200 @@ -55,6 +55,8 @@ #define _PR_SI_ARCHITECTURE "avr32" #elif defined(__m32r__) #define _PR_SI_ARCHITECTURE "m32r" +#elif defined(__or1k__) +#define _PR_SI_ARCHITECTURE "or1k" #else #error "Unknown CPU architecture" #endif @@ -123,6 +125,18 @@ #define _MD_ATOMIC_SET _PR_x86_64_AtomicSet #endif +#if defined(__or1k__) +#if defined(__GNUC__) +/* Use GCC built-in functions */ +#define _PR_HAVE_ATOMIC_OPS +#define _MD_INIT_ATOMIC() +#define _MD_ATOMIC_INCREMENT(ptr) __sync_add_and_fetch(ptr, 1) +#define _MD_ATOMIC_DECREMENT(ptr) __sync_sub_and_fetch(ptr, 1) +#define _MD_ATOMIC_ADD(ptr, i) __sync_add_and_fetch(ptr, i) +#define _MD_ATOMIC_SET(ptr, nv) __sync_lock_test_and_set(ptr, nv) +#endif +#endif + #if defined(__powerpc__) && !defined(__powerpc64__) #define _PR_HAVE_ATOMIC_OPS #define _MD_INIT_ATOMIC()
