Apparently this has been introduced in the following commit: commit 3e4f910c8d490a1490409a7e381dbbb229f9d272 Author: Gerd Hoffmann <[email protected]> Date: Thu Sep 6 11:24:51 2012 +0200
ehci: switch to new-style memory ops Also register different memory regions for capabilities, operational registers and port status registers. Create separate tracepoints for operational regs and port status regs. Ditch a bunch of sanity checks because the memory core will do this for us now. Offloading the byte, word and dword access handling to the memory core also has the side effect of fixing ehci register access on bigendian hosts. which is past v1.2.0 version.
