Source: cln Version: 1.3.4-3 Severity: normal Tags: patch upstream User: debian-ri...@lists.debian.org Usertags: riscv64
Hello, We need support in this package for RISC-V to bootstrap the riscv64 architecture. I am attaching a patch that adds support for the arquitecture. I don't know if you will send upstream yourself or if you prefer that we send it. It would be great if you could include these changes and release a new version for unstable. If we can do something to speed-up this process, please let me/us know. Thanks and cheers. -- Manuel A. Fernandez Montecelo <m...@debian.org>
--- a/include/cln/object.h +++ b/include/cln/object.h @@ -25,7 +25,7 @@ #if defined(__i386__) || (defined(__mips__) && !defined(__LP64__)) || (defined(__sparc__) && !defined(__arch64__)) || defined(__hppa__) || defined(__arm__) || defined(__rs6000__) || defined(__m88k__) || defined(__convex__) || (defined(__s390__) && !defined(__s390x__)) || defined(__sh__) || (defined(__x86_64__) && defined(__ILP32__)) #define cl_word_alignment 4 #endif -#if defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) && !defined(__ILP32__)) || defined(__s390x__) || defined(__aarch64__) +#if defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) && !defined(__ILP32__)) || defined(__s390x__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) #define cl_word_alignment 8 #endif #if !defined(cl_word_alignment) --- a/include/cln/types.h +++ b/include/cln/types.h @@ -48,7 +48,7 @@ #undef HAVE_LONGLONG #endif #endif - #if defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__aarch64__)) + #if defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64)) // 64 bit registers in hardware #define HAVE_FAST_LONGLONG #endif @@ -76,7 +76,7 @@ // Integer type used for counters. // Constraint: sizeof(uintC) >= sizeof(uintL) - #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__))) + #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64))) #define intCsize long_bitsize typedef long sintC; typedef unsigned long uintC; @@ -88,7 +88,7 @@ // Integer type used for lfloat exponents. // Constraint: sizeof(uintE) >= sizeof(uintC) - #if (defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__i386__) || defined(__mips__) || defined(__rs6000__) || defined(__aarch64__))) + #if (defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__i386__) || defined(__mips__) || defined(__rs6000__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64))) #define intEsize 64 typedef sint64 sintE; typedef uint64 uintE; @@ -127,7 +127,7 @@ typedef int sintD; typedef unsigned int uintD; #else // we are not using GMP, so just guess something reasonable - #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || defined(__s390x__) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__))) + #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || defined(__s390x__) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64))) #define intDsize 64 typedef sint64 sintD; typedef uint64 uintD;
diff -Nru cln-1.3.4/debian/changelog cln-1.3.4/debian/changelog --- cln-1.3.4/debian/changelog 2018-03-19 17:57:06.000000000 +0100 +++ cln-1.3.4/debian/changelog 2018-05-02 22:09:35.000000000 +0200 @@ -1,3 +1,10 @@ +cln (1.3.4-3+0.riscv64.1) unreleased; urgency=medium + + * Non-maintainer upload. + * riscv64: add support for arch + + -- Manuel A. Fernandez Montecelo <m...@debian.org> Wed, 02 May 2018 22:09:35 +0200 + cln (1.3.4-3) unstable; urgency=low * Apply upstream patch for MIPS release 6 port. (Closes: #893168) diff -Nru cln-1.3.4/debian/patches/riscv64-support.patch cln-1.3.4/debian/patches/riscv64-support.patch --- cln-1.3.4/debian/patches/riscv64-support.patch 1970-01-01 01:00:00.000000000 +0100 +++ cln-1.3.4/debian/patches/riscv64-support.patch 2018-05-02 22:09:35.000000000 +0200 @@ -0,0 +1,49 @@ +--- a/include/cln/object.h ++++ b/include/cln/object.h +@@ -25,7 +25,7 @@ + #if defined(__i386__) || (defined(__mips__) && !defined(__LP64__)) || (defined(__sparc__) && !defined(__arch64__)) || defined(__hppa__) || defined(__arm__) || defined(__rs6000__) || defined(__m88k__) || defined(__convex__) || (defined(__s390__) && !defined(__s390x__)) || defined(__sh__) || (defined(__x86_64__) && defined(__ILP32__)) + #define cl_word_alignment 4 + #endif +-#if defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) && !defined(__ILP32__)) || defined(__s390x__) || defined(__aarch64__) ++#if defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || (defined(__x86_64__) && !defined(__ILP32__)) || defined(__s390x__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64) + #define cl_word_alignment 8 + #endif + #if !defined(cl_word_alignment) +--- a/include/cln/types.h ++++ b/include/cln/types.h +@@ -48,7 +48,7 @@ + #undef HAVE_LONGLONG + #endif + #endif +- #if defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__aarch64__)) ++ #if defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__mips64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64)) + // 64 bit registers in hardware + #define HAVE_FAST_LONGLONG + #endif +@@ -76,7 +76,7 @@ + + // Integer type used for counters. + // Constraint: sizeof(uintC) >= sizeof(uintL) +- #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__))) ++ #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64))) + #define intCsize long_bitsize + typedef long sintC; + typedef unsigned long uintC; +@@ -88,7 +88,7 @@ + + // Integer type used for lfloat exponents. + // Constraint: sizeof(uintE) >= sizeof(uintC) +- #if (defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__i386__) || defined(__mips__) || defined(__rs6000__) || defined(__aarch64__))) ++ #if (defined(HAVE_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || defined(__s390x__) || (defined(__sparc__) && defined(__arch64__)) || defined(__x86_64__) || defined(__i386__) || defined(__mips__) || defined(__rs6000__) || defined(__aarch64__) || (defined(__riscv) && __riscv_xlen == 64))) + #define intEsize 64 + typedef sint64 sintE; + typedef uint64 uintE; +@@ -127,7 +127,7 @@ + typedef int sintD; + typedef unsigned int uintD; + #else // we are not using GMP, so just guess something reasonable +- #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || defined(__s390x__) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__))) ++ #if (defined(HAVE_FAST_LONGLONG) && (defined(__alpha__) || defined(__ia64__) || defined(__powerpc64__) || (defined(__sparc__) && defined(__arch64__)) || defined(__s390x__) || defined(__x86_64__) || defined(__aarch64__) || defined(__mips64__) || (defined(__riscv) && __riscv_xlen == 64))) + #define intDsize 64 + typedef sint64 sintD; + typedef uint64 uintD; diff -Nru cln-1.3.4/debian/patches/series cln-1.3.4/debian/patches/series --- cln-1.3.4/debian/patches/series 2018-03-19 17:35:28.000000000 +0100 +++ cln-1.3.4/debian/patches/series 2018-05-02 22:09:35.000000000 +0200 @@ -1 +1,2 @@ mips-isa-rev-6.diff +riscv64-support.patch