Package: src:linux Version: 4.17~rc3-1~exp1 MIPS CI20 /JZ4780 support has been added upstream. for 0002-add-ci20.patch, we add basic support, without MMC and DRM support, so we have to use UBI to boot it.
0003-support-jz4780-mmc is patches that are in linux-next now, and will be released with 4.18. DRM is not supported yet. -- YunQiang Su
From 9717c8b9d2b5e4c5744dc491cc1d7f4e23ccc939 Mon Sep 17 00:00:00 2001 From: YunQiang Su <s...@debian.org> Date: Wed, 9 May 2018 11:06:01 +0800 Subject: [PATCH 2/5] add ci20 --- debian/config/kernelarch-mips/config.ci20 | 238 ++++++++++++++++++++++++++++++ debian/config/mipsel/defines | 12 ++ 2 files changed, 250 insertions(+) create mode 100644 debian/config/kernelarch-mips/config.ci20 diff --git a/debian/config/kernelarch-mips/config.ci20 b/debian/config/kernelarch-mips/config.ci20 new file mode 100644 index 0000000..88fe850 --- /dev/null +++ b/debian/config/kernelarch-mips/config.ci20 @@ -0,0 +1,238 @@ +## +## file: arch/mips/Kconfig +## +## choice: System type +CONFIG_MACH_INGENIC=y +## end choice +CONFIG_HIGHMEM=y + +## +## file: arch/mips/Kconfig.debug +## +## We set CMDLINE here to pin the console output to the same TTL socket with UBOOT. +CONFIG_CMDLINE_BOOL=y +CONFIG_CMDLINE="earlycon console=ttyS4,115200 clk_ignore_unused" +# CONFIG_CMDLINE_OVERRIDE is not set + +## +## file: arch/mips/jz4740/Kconfig +## +CONFIG_JZ4780_CI20=y + +## +## file: init/Kconfig +## +CONFIG_EMBEDDED=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y + +## +## file: mm/Kconfig +## +CONFIG_CMA=y + +## +## file: block/partitions/Kconfig +## +# CONFIG_PARTITION_ADVANCED is not set + +## +## file: block/partitions/Kconfig +## +CONFIG_MTD=y +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_JZ4780=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_FASTMAP=y +# CONFIG_MTD_UBI_BLOCK is not set +# CONFIG_MTD_LPDDR is not set +# CONFIG_MTD_SPI_NOR is not set + +## +## file: drivers/base/Kconfig +## +CONFIG_DMA_CMA=y + +## +## file: drivers/block/Kconfig +## +CONFIG_BLK_DEV_INITRD=y + +## +## file: net/Kconfig +## +# CONFIG_WIRELESS is not set + +## +## file: net/wimax/Kconfig +## +# CONFIG_WIMAX is not set + +## +## file: drivers/atm/Kconfig +## +# CONFIG_ATM_DRIVERS is not set + +## +## file: drivers/net/ethernet/*/Kconfig +## +CONFIG_DM9000=y +# CONFIG_NET_CADENCE is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_QUALCOMM is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_STMICRO is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +# CONFIG_NET_VENDOR_ALACRITECH is not set +# CONFIG_NET_VENDOR_AMAZON is not set +# CONFIG_NET_VENDOR_AQUANTIA is not set +# CONFIG_NET_VENDOR_CORTINA is not set +# CONFIG_NET_VENDOR_EZCHIP is not set +# CONFIG_NET_VENDOR_HUAWEI is not set +# CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_NETRONOME is not set +# CONFIG_NET_VENDOR_RENESAS is not set +# CONFIG_NET_VENDOR_SOLARFLARE is not set +# CONFIG_NET_VENDOR_SOCIONEXT is not set +# CONFIG_NET_VENDOR_XILINX is not set +# CONFIG_NET_VENDOR_SYNOPSYS is not set + +## +## file: drivers/net/ieee802154/Kconfig +## +# CONFIG_IEEE802154_DRIVERS is not set + +## +## file: drivers/lightnvm/Kconfig +## +# CONFIG_NVM is not set + +## +## file: drivers/input/serio/Kconfig +## +# CONFIG_SERIO is not set +# CONFIG_ARCH_MIGHT_HAVE_PC_SERIO is not set + +## +## file: drivers/tty/serial/8250/Kconfig +## +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +CONFIG_SERIAL_8250_NR_UARTS=5 +CONFIG_SERIAL_8250_RUNTIME_UARTS=5 +CONFIG_SERIAL_8250_INGENIC=y +CONFIG_SERIAL_OF_PLATFORM=y + +## +## file: drivers/i2c/Kconfig +## +CONFIG_I2C=y +# CONFIG_I2C_CHARDEV is not set +# CONFIG_I2C_MUX is not set +CONFIG_I2C_JZ4780=y +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PCA_PLATFORM is not set +# CONFIG_I2C_SIMTEC is not set +# CONFIG_I2C_TAOS_EVM is not set + +## +## file: kernel/power/Kconfig +## +# CONFIG_PM is not set +# CONFIG_PM_DEVFREQ is not set +# CONFIG_SUSPEND is not set +# CONFIG_HIBERNATION is not set +# CONFIG_POWER_RESET is not set +# CONFIG_POWER_SUPPLY is not set +CONFIG_CPU_PM=y + +## +## file: drivers/cpuidle/Kconfig +## +CONFIG_CPU_IDLE=y + +## +## file: fs/*/Kconfig +## +## CI20 has a bad initrd support, so we set some major FS to Y +CONFIG_EXT4_FS=y +CONFIG_BTRFS_FS=y +CONFIG_XFS_FS=y +CONFIG_UBIFS_FS=y +CONFIG_FAT_FS=y + +## +## file: drivers/spi/Kconfig +## +# CONFIG_SPI is not set + +## +## file: drivers/pps/Kconfig +## +# CONFIG_PPS is not set + +## +## file: drivers/gpio/Kconfig +## +CONFIG_GPIO_INGENIC=y + +## +## file: drivers/w1/Kconfig +## +# CONFIG_W1 is not set + +## +## file: drivers/ssb/Kconfig +## +# CONFIG_SSB_POSSIBLE is not set +# CONFIG_SSB is not set + +## +## file: drivers/ssb/Kconfig +## +# CONFIG_BCMA_POSSIBLE is not set +# CONFIG_BCMA is not set + +## +## file: drivers/mfd/Kconfig +## +# CONFIG_MFD_CORE is not set + +## +## file: drivers/regulator/Kconfig +## +CONFIG_REGULATOR=y + +## +## file: drivers/parport/Kconfig +## +# CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT is not set +# CONFIG_PARPORT is not set + +## +## file: drivers/nvmem/Kconfig +## +# CONFIG_NVMEM is not set +# CONFIG_NVME_FC is not set +# CONFIG_NVME_TARGET is not set + +## +## file: drivers/infiniband/Kconfig +## +# CONFIG_INFINIBAND is not set + +## +## file: drivers/virt/Kconfig +## +# CONFIG_VIRT_DRIVERS is not set + +## +## file: drivers/virtio/Kconfig +## +# CONFIG_VIRTIO_MENU is not set diff --git a/debian/config/mipsel/defines b/debian/config/mipsel/defines index 20d90ad..c2cfebd 100644 --- a/debian/config/mipsel/defines +++ b/debian/config/mipsel/defines @@ -4,6 +4,7 @@ flavours: 5kc-malta loongson-3 octeon + ci20 kernel-arch: mips [build] @@ -21,6 +22,17 @@ configs: kernelarch-mips/config.malta kernelarch-mips/config.mips32r2 +[ci20_description] +hardware: MIPS CI20 dev board +hardware-long: MIPS CI20 dev board + +[ci20_image] +install-stem: vmlinuz +recommends: u-boot-tools +configs: + kernelarch-mips/config.ci20 + kernelarch-mips/config.mips32r2 + [5kc-malta_description] hardware: MIPS Malta (64-bit) hardware-long: MIPS Malta boards (64-bit) -- 2.11.0
From 8862dbbbf38955784fbff275f52fd7e4d53b51c9 Mon Sep 17 00:00:00 2001 From: root <root@zfs-01> Date: Thu, 10 May 2018 14:16:44 +0000 Subject: [PATCH 3/5] support jz4780 mmc --- debian/config/kernelarch-mips/config.ci20 | 9 + ...740-Fix-error-exit-path-in-driver-s-probe.patch | 52 ++++ ...4-mmc-jz4780-Order-headers-alphabetically.patch | 38 +++ .../v2-04-14-mmc-jz4740-Use-dev_get_platdata.patch | 31 +++ ...Reset-the-device-requesting-the-interrupt.patch | 21 ++ ...-14-mmc-jz4740-Introduce-devicetree-probe.patch | 125 ++++++++++ ...dt-bindings-add-MMC-support-to-JZ4740-SoC.patch | 44 ++++ ...to-mmc--f_max-rather-than-JZ_MMC_CLK_RATE.patch | 13 + ...-14-mmc-jz4740-Add-support-for-the-JZ4780.patch | 273 +++++++++++++++++++++ .../v2-10-14-mmc-jz4740-Use-dma_request_chan.patch | 43 ++++ ...Add-DMA-controller-node-to-the-devicetree.patch | 84 +++++++ ...Add-MMC-controller-node-to-the-devicetree.patch | 51 ++++ ...IPS-dts-ci20-Enable-MMC-in-the-devicetree.patch | 50 ++++ ...S-configs-ci20-Enable-DMA-and-MMC-support.patch | 16 ++ debian/patches/series | 13 + 15 files changed, 863 insertions(+) create mode 100644 debian/patches/features/mips/v2-02-14-mmc-jz4740-Fix-error-exit-path-in-driver-s-probe.patch create mode 100644 debian/patches/features/mips/v2-03-14-mmc-jz4780-Order-headers-alphabetically.patch create mode 100644 debian/patches/features/mips/v2-04-14-mmc-jz4740-Use-dev_get_platdata.patch create mode 100644 debian/patches/features/mips/v2-05-14-mmc-jz4740-Reset-the-device-requesting-the-interrupt.patch create mode 100644 debian/patches/features/mips/v2-06-14-mmc-jz4740-Introduce-devicetree-probe.patch create mode 100644 debian/patches/features/mips/v2-07-14-mmc-dt-bindings-add-MMC-support-to-JZ4740-SoC.patch create mode 100644 debian/patches/features/mips/v2-08-14-mmc-jz4740-Set-clock-rate-to-mmc--f_max-rather-than-JZ_MMC_CLK_RATE.patch create mode 100644 debian/patches/features/mips/v2-09-14-mmc-jz4740-Add-support-for-the-JZ4780.patch create mode 100644 debian/patches/features/mips/v2-10-14-mmc-jz4740-Use-dma_request_chan.patch create mode 100644 debian/patches/features/mips/v2-11-14-MIPS-dts-jz4780-Add-DMA-controller-node-to-the-devicetree.patch create mode 100644 debian/patches/features/mips/v2-12-14-MIPS-dts-jz4780-Add-MMC-controller-node-to-the-devicetree.patch create mode 100644 debian/patches/features/mips/v2-13-14-MIPS-dts-ci20-Enable-MMC-in-the-devicetree.patch create mode 100644 debian/patches/features/mips/v2-14-14-MIPS-configs-ci20-Enable-DMA-and-MMC-support.patch diff --git a/debian/config/kernelarch-mips/config.ci20 b/debian/config/kernelarch-mips/config.ci20 index 88fe850..00a1c5e 100644 --- a/debian/config/kernelarch-mips/config.ci20 +++ b/debian/config/kernelarch-mips/config.ci20 @@ -158,6 +158,15 @@ CONFIG_CPU_PM=y CONFIG_CPU_IDLE=y ## +## file: drivers/mmc/Kconfig +## +CONFIG_MMC=y +## +## file: drivers/mmc/host/Kconfig +## +CONFIG_MMC_JZ4740=y + +## ## file: fs/*/Kconfig ## ## CI20 has a bad initrd support, so we set some major FS to Y diff --git a/debian/patches/features/mips/v2-02-14-mmc-jz4740-Fix-error-exit-path-in-driver-s-probe.patch b/debian/patches/features/mips/v2-02-14-mmc-jz4740-Fix-error-exit-path-in-driver-s-probe.patch new file mode 100644 index 0000000..7e7cbb9 --- /dev/null +++ b/debian/patches/features/mips/v2-02-14-mmc-jz4740-Fix-error-exit-path-in-driver-s-probe.patch @@ -0,0 +1,52 @@ +diff --git a/drivers/mmc/host/jz4740_mmc.c b/drivers/mmc/host/jz4740_mmc.c +index a0168e9e4fce..97727cd34fc1 100644 +--- a/drivers/mmc/host/jz4740_mmc.c ++++ b/drivers/mmc/host/jz4740_mmc.c +@@ -1006,7 +1006,7 @@ static int jz4740_mmc_probe(struct platform_device* pdev) + + ret = jz4740_mmc_request_gpios(mmc, pdev); + if (ret) +- goto err_release_dma; ++ goto err_free_host; + + mmc->ops = &jz4740_mmc_ops; + mmc->f_min = JZ_MMC_CLK_RATE / 128; +@@ -1038,16 +1038,17 @@ static int jz4740_mmc_probe(struct platform_device* pdev) + jz4740_mmc_clock_disable(host); + timer_setup(&host->timeout_timer, jz4740_mmc_timeout, 0); + +- host->use_dma = true; +- if (host->use_dma && jz4740_mmc_acquire_dma_channels(host) != 0) +- host->use_dma = false; ++ ret = jz4740_mmc_acquire_dma_channels(host); ++ if (ret == -EPROBE_DEFER) ++ goto err_free_irq; ++ host->use_dma = !ret; + + platform_set_drvdata(pdev, host); + ret = mmc_add_host(mmc); + + if (ret) { + dev_err(&pdev->dev, "Failed to add mmc host: %d\n", ret); +- goto err_free_irq; ++ goto err_release_dma; + } + dev_info(&pdev->dev, "JZ SD/MMC card driver registered\n"); + +@@ -1057,13 +1058,13 @@ static int jz4740_mmc_probe(struct platform_device* pdev) + + return 0; + ++err_release_dma: ++ if (host->use_dma) ++ jz4740_mmc_release_dma_channels(host); + err_free_irq: + free_irq(host->irq, host); + err_free_gpios: + jz4740_mmc_free_gpios(pdev); +-err_release_dma: +- if (host->use_dma) +- jz4740_mmc_release_dma_channels(host); + err_free_host: + mmc_free_host(mmc); + diff --git a/debian/patches/features/mips/v2-03-14-mmc-jz4780-Order-headers-alphabetically.patch b/debian/patches/features/mips/v2-03-14-mmc-jz4780-Order-headers-alphabetically.patch new file mode 100644 index 0000000..384701c --- /dev/null +++ b/debian/patches/features/mips/v2-03-14-mmc-jz4780-Order-headers-alphabetically.patch @@ -0,0 +1,38 @@ +diff --git a/drivers/mmc/host/jz4740_mmc.c b/drivers/mmc/host/jz4740_mmc.c +index 97727cd34fc1..eb57f514a459 100644 +--- a/drivers/mmc/host/jz4740_mmc.c ++++ b/drivers/mmc/host/jz4740_mmc.c +@@ -13,24 +13,24 @@ + * + */ + +-#include <linux/mmc/host.h> +-#include <linux/mmc/slot-gpio.h> ++#include <linux/bitops.h> ++#include <linux/clk.h> ++#include <linux/delay.h> ++#include <linux/dmaengine.h> ++#include <linux/dma-mapping.h> + #include <linux/err.h> ++#include <linux/gpio.h> ++#include <linux/interrupt.h> + #include <linux/io.h> + #include <linux/irq.h> +-#include <linux/interrupt.h> ++#include <linux/mmc/host.h> ++#include <linux/mmc/slot-gpio.h> + #include <linux/module.h> + #include <linux/pinctrl/consumer.h> + #include <linux/platform_device.h> +-#include <linux/delay.h> + #include <linux/scatterlist.h> +-#include <linux/clk.h> + +-#include <linux/bitops.h> +-#include <linux/gpio.h> + #include <asm/cacheflush.h> +-#include <linux/dma-mapping.h> +-#include <linux/dmaengine.h> + + #include <asm/mach-jz4740/dma.h> + #include <asm/mach-jz4740/jz4740_mmc.h> diff --git a/debian/patches/features/mips/v2-04-14-mmc-jz4740-Use-dev_get_platdata.patch b/debian/patches/features/mips/v2-04-14-mmc-jz4740-Use-dev_get_platdata.patch new file mode 100644 index 0000000..68ab411 --- /dev/null +++ b/debian/patches/features/mips/v2-04-14-mmc-jz4740-Use-dev_get_platdata.patch @@ -0,0 +1,31 @@ +diff --git a/drivers/mmc/host/jz4740_mmc.c b/drivers/mmc/host/jz4740_mmc.c +index eb57f514a459..b11f65077ce7 100644 +--- a/drivers/mmc/host/jz4740_mmc.c ++++ b/drivers/mmc/host/jz4740_mmc.c +@@ -926,7 +926,7 @@ static int jz4740_mmc_request_gpio(struct device *dev, int gpio, + static int jz4740_mmc_request_gpios(struct mmc_host *mmc, + struct platform_device *pdev) + { +- struct jz4740_mmc_platform_data *pdata = pdev->dev.platform_data; ++ struct jz4740_mmc_platform_data *pdata = dev_get_platdata(&pdev->dev); + int ret = 0; + + if (!pdata) +@@ -955,7 +955,7 @@ static int jz4740_mmc_request_gpios(struct mmc_host *mmc, + + static void jz4740_mmc_free_gpios(struct platform_device *pdev) + { +- struct jz4740_mmc_platform_data *pdata = pdev->dev.platform_data; ++ struct jz4740_mmc_platform_data *pdata = dev_get_platdata(&pdev->dev); + + if (!pdata) + return; +@@ -971,7 +971,7 @@ static int jz4740_mmc_probe(struct platform_device* pdev) + struct jz4740_mmc_host *host; + struct jz4740_mmc_platform_data *pdata; + +- pdata = pdev->dev.platform_data; ++ pdata = dev_get_platdata(&pdev->dev); + + mmc = mmc_alloc_host(sizeof(struct jz4740_mmc_host), &pdev->dev); + if (!mmc) { diff --git a/debian/patches/features/mips/v2-05-14-mmc-jz4740-Reset-the-device-requesting-the-interrupt.patch b/debian/patches/features/mips/v2-05-14-mmc-jz4740-Reset-the-device-requesting-the-interrupt.patch new file mode 100644 index 0000000..2d88dae --- /dev/null +++ b/debian/patches/features/mips/v2-05-14-mmc-jz4740-Reset-the-device-requesting-the-interrupt.patch @@ -0,0 +1,21 @@ +diff --git a/drivers/mmc/host/jz4740_mmc.c b/drivers/mmc/host/jz4740_mmc.c +index b11f65077ce7..9f316d953b30 100644 +--- a/drivers/mmc/host/jz4740_mmc.c ++++ b/drivers/mmc/host/jz4740_mmc.c +@@ -1027,6 +1027,8 @@ static int jz4740_mmc_probe(struct platform_device* pdev) + spin_lock_init(&host->lock); + host->irq_mask = 0xffff; + ++ jz4740_mmc_reset(host); ++ + ret = request_threaded_irq(host->irq, jz_mmc_irq, jz_mmc_irq_worker, 0, + dev_name(&pdev->dev), host); + if (ret) { +@@ -1034,7 +1036,6 @@ static int jz4740_mmc_probe(struct platform_device* pdev) + goto err_free_gpios; + } + +- jz4740_mmc_reset(host); + jz4740_mmc_clock_disable(host); + timer_setup(&host->timeout_timer, jz4740_mmc_timeout, 0); + diff --git a/debian/patches/features/mips/v2-06-14-mmc-jz4740-Introduce-devicetree-probe.patch b/debian/patches/features/mips/v2-06-14-mmc-jz4740-Introduce-devicetree-probe.patch new file mode 100644 index 0000000..f7a5a12 --- /dev/null +++ b/debian/patches/features/mips/v2-06-14-mmc-jz4740-Introduce-devicetree-probe.patch @@ -0,0 +1,125 @@ +diff --git a/drivers/mmc/host/jz4740_mmc.c b/drivers/mmc/host/jz4740_mmc.c +index 9f316d953b30..03757cc55f52 100644 +--- a/drivers/mmc/host/jz4740_mmc.c ++++ b/drivers/mmc/host/jz4740_mmc.c +@@ -26,6 +26,7 @@ + #include <linux/mmc/host.h> + #include <linux/mmc/slot-gpio.h> + #include <linux/module.h> ++#include <linux/of_device.h> + #include <linux/pinctrl/consumer.h> + #include <linux/platform_device.h> + #include <linux/scatterlist.h> +@@ -107,6 +108,10 @@ + + #define JZ_MMC_CLK_RATE 24000000 + ++enum jz4740_mmc_version { ++ JZ_MMC_JZ4740, ++}; ++ + enum jz4740_mmc_state { + JZ4740_MMC_STATE_READ_RESPONSE, + JZ4740_MMC_STATE_TRANSFER_DATA, +@@ -125,6 +130,8 @@ struct jz4740_mmc_host { + struct jz4740_mmc_platform_data *pdata; + struct clk *clk; + ++ enum jz4740_mmc_version version; ++ + int irq; + int card_detect_irq; + +@@ -857,7 +864,7 @@ static void jz4740_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) + switch (ios->power_mode) { + case MMC_POWER_UP: + jz4740_mmc_reset(host); +- if (gpio_is_valid(host->pdata->gpio_power)) ++ if (host->pdata && gpio_is_valid(host->pdata->gpio_power)) + gpio_set_value(host->pdata->gpio_power, + !host->pdata->power_active_low); + host->cmdat |= JZ_MMC_CMDAT_INIT; +@@ -866,7 +873,7 @@ static void jz4740_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) + case MMC_POWER_ON: + break; + default: +- if (gpio_is_valid(host->pdata->gpio_power)) ++ if (host->pdata && gpio_is_valid(host->pdata->gpio_power)) + gpio_set_value(host->pdata->gpio_power, + host->pdata->power_active_low); + clk_disable_unprepare(host->clk); +@@ -964,11 +971,18 @@ static void jz4740_mmc_free_gpios(struct platform_device *pdev) + gpio_free(pdata->gpio_power); + } + ++static const struct of_device_id jz4740_mmc_of_match[] = { ++ { .compatible = "ingenic,jz4740-mmc", .data = (void *) JZ_MMC_JZ4740 }, ++ {}, ++}; ++MODULE_DEVICE_TABLE(of, jz4740_mmc_of_match); ++ + static int jz4740_mmc_probe(struct platform_device* pdev) + { + int ret; + struct mmc_host *mmc; + struct jz4740_mmc_host *host; ++ const struct of_device_id *match; + struct jz4740_mmc_platform_data *pdata; + + pdata = dev_get_platdata(&pdev->dev); +@@ -982,6 +996,27 @@ static int jz4740_mmc_probe(struct platform_device* pdev) + host = mmc_priv(mmc); + host->pdata = pdata; + ++ match = of_match_device(jz4740_mmc_of_match, &pdev->dev); ++ if (match) { ++ host->version = (enum jz4740_mmc_version)match->data; ++ ret = mmc_of_parse(mmc); ++ if (ret) { ++ if (ret != -EPROBE_DEFER) ++ dev_err(&pdev->dev, ++ "could not parse of data: %d\n", ret); ++ goto err_free_host; ++ } ++ } else { ++ /* JZ4740 should be the only one using legacy probe */ ++ host->version = JZ_MMC_JZ4740; ++ mmc->caps |= MMC_CAP_SDIO_IRQ; ++ if (!(pdata && pdata->data_1bit)) ++ mmc->caps |= MMC_CAP_4_BIT_DATA; ++ ret = jz4740_mmc_request_gpios(mmc, pdev); ++ if (ret) ++ goto err_free_host; ++ } ++ + host->irq = platform_get_irq(pdev, 0); + if (host->irq < 0) { + ret = host->irq; +@@ -1004,16 +1039,11 @@ static int jz4740_mmc_probe(struct platform_device* pdev) + goto err_free_host; + } + +- ret = jz4740_mmc_request_gpios(mmc, pdev); +- if (ret) +- goto err_free_host; +- + mmc->ops = &jz4740_mmc_ops; +- mmc->f_min = JZ_MMC_CLK_RATE / 128; +- mmc->f_max = JZ_MMC_CLK_RATE; ++ if (!mmc->f_max) ++ mmc->f_max = JZ_MMC_CLK_RATE; ++ mmc->f_min = mmc->f_max / 128; + mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; +- mmc->caps = (pdata && pdata->data_1bit) ? 0 : MMC_CAP_4_BIT_DATA; +- mmc->caps |= MMC_CAP_SDIO_IRQ; + + mmc->max_blk_size = (1 << 10) - 1; + mmc->max_blk_count = (1 << 15) - 1; +@@ -1118,6 +1148,7 @@ static struct platform_driver jz4740_mmc_driver = { + .remove = jz4740_mmc_remove, + .driver = { + .name = "jz4740-mmc", ++ .of_match_table = of_match_ptr(jz4740_mmc_of_match), + .pm = JZ4740_MMC_PM_OPS, + }, + }; diff --git a/debian/patches/features/mips/v2-07-14-mmc-dt-bindings-add-MMC-support-to-JZ4740-SoC.patch b/debian/patches/features/mips/v2-07-14-mmc-dt-bindings-add-MMC-support-to-JZ4740-SoC.patch new file mode 100644 index 0000000..80958b9 --- /dev/null +++ b/debian/patches/features/mips/v2-07-14-mmc-dt-bindings-add-MMC-support-to-JZ4740-SoC.patch @@ -0,0 +1,44 @@ +diff --git a/Documentation/devicetree/bindings/mmc/jz4740.txt b/Documentation/devicetree/bindings/mmc/jz4740.txt +new file mode 100644 +index 000000000000..7cd8c432d7c8 +--- /dev/null ++++ b/Documentation/devicetree/bindings/mmc/jz4740.txt +@@ -0,0 +1,38 @@ ++* Ingenic JZ47xx MMC controllers ++ ++This file documents the device tree properties used for the MMC controller in ++Ingenic JZ4740/JZ4780 SoCs. These are in addition to the core MMC properties ++described in mmc.txt. ++ ++Required properties: ++- compatible: Should be one of the following: ++ - "ingenic,jz4740-mmc" for the JZ4740 ++ - "ingenic,jz4780-mmc" for the JZ4780 ++- reg: Should contain the MMC controller registers location and length. ++- interrupts: Should contain the interrupt specifier of the MMC controller. ++- clocks: Clock for the MMC controller. ++ ++Optional properties: ++- dmas: List of DMA specifiers with the controller specific format ++ as described in the generic DMA client binding. A tx and rx ++ specifier is required. ++- dma-names: RX and TX DMA request names. ++ Should be "rx" and "tx", in that order. ++ ++For additional details on DMA client bindings see ../dma/dma.txt. ++ ++Example: ++ ++mmc0: mmc@13450000 { ++ compatible = "ingenic,jz4780-mmc"; ++ reg = <0x13450000 0x1000>; ++ ++ interrupt-parent = <&intc>; ++ interrupts = <37>; ++ ++ clocks = <&cgu JZ4780_CLK_MSC0>; ++ clock-names = "mmc"; ++ ++ dmas = <&dma JZ4780_DMA_MSC0_RX 0xffffffff>, <&dma JZ4780_DMA_MSC0_TX 0xffffffff>; ++ dma-names = "rx", "tx"; ++}; diff --git a/debian/patches/features/mips/v2-08-14-mmc-jz4740-Set-clock-rate-to-mmc--f_max-rather-than-JZ_MMC_CLK_RATE.patch b/debian/patches/features/mips/v2-08-14-mmc-jz4740-Set-clock-rate-to-mmc--f_max-rather-than-JZ_MMC_CLK_RATE.patch new file mode 100644 index 0000000..d575eba --- /dev/null +++ b/debian/patches/features/mips/v2-08-14-mmc-jz4740-Set-clock-rate-to-mmc--f_max-rather-than-JZ_MMC_CLK_RATE.patch @@ -0,0 +1,13 @@ +diff --git a/drivers/mmc/host/jz4740_mmc.c b/drivers/mmc/host/jz4740_mmc.c +index 03757cc55f52..aa635b458d2c 100644 +--- a/drivers/mmc/host/jz4740_mmc.c ++++ b/drivers/mmc/host/jz4740_mmc.c +@@ -825,7 +825,7 @@ static int jz4740_mmc_set_clock_rate(struct jz4740_mmc_host *host, int rate) + int real_rate; + + jz4740_mmc_clock_disable(host); +- clk_set_rate(host->clk, JZ_MMC_CLK_RATE); ++ clk_set_rate(host->clk, host->mmc->f_max); + + real_rate = clk_get_rate(host->clk); + diff --git a/debian/patches/features/mips/v2-09-14-mmc-jz4740-Add-support-for-the-JZ4780.patch b/debian/patches/features/mips/v2-09-14-mmc-jz4740-Add-support-for-the-JZ4780.patch new file mode 100644 index 0000000..b570631 --- /dev/null +++ b/debian/patches/features/mips/v2-09-14-mmc-jz4740-Add-support-for-the-JZ4780.patch @@ -0,0 +1,273 @@ +diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig +index 620c2d90a646..35a5a5ad65b9 100644 +--- a/drivers/mmc/host/Kconfig ++++ b/drivers/mmc/host/Kconfig +@@ -766,11 +766,12 @@ config MMC_SH_MMCIF + + + config MMC_JZ4740 +- tristate "JZ4740 SD/Multimedia Card Interface support" +- depends on MACH_JZ4740 ++ tristate "Ingenic JZ47xx SD/Multimedia Card Interface support" ++ depends on MACH_JZ4740 || MACH_JZ4780 + help +- This selects support for the SD/MMC controller on Ingenic JZ4740 +- SoCs. ++ This selects support for the SD/MMC controller on Ingenic ++ JZ4740, JZ4750, JZ4770 and JZ4780 SoCs. ++ + If you have a board based on such a SoC and with a SD/MMC slot, + say Y or M here. + +diff --git a/drivers/mmc/host/jz4740_mmc.c b/drivers/mmc/host/jz4740_mmc.c +index aa635b458d2c..c3ec8e662706 100644 +--- a/drivers/mmc/host/jz4740_mmc.c ++++ b/drivers/mmc/host/jz4740_mmc.c +@@ -1,5 +1,7 @@ + /* + * Copyright (C) 2009-2010, Lars-Peter Clausen <l...@metafoo.de> ++ * Copyright (C) 2013, Imagination Technologies ++ * + * JZ4740 SD/MMC controller driver + * + * This program is free software; you can redistribute it and/or modify it +@@ -52,6 +54,7 @@ + #define JZ_REG_MMC_RESP_FIFO 0x34 + #define JZ_REG_MMC_RXFIFO 0x38 + #define JZ_REG_MMC_TXFIFO 0x3C ++#define JZ_REG_MMC_DMAC 0x44 + + #define JZ_MMC_STRPCL_EXIT_MULTIPLE BIT(7) + #define JZ_MMC_STRPCL_EXIT_TRANSFER BIT(6) +@@ -105,11 +108,15 @@ + #define JZ_MMC_IRQ_PRG_DONE BIT(1) + #define JZ_MMC_IRQ_DATA_TRAN_DONE BIT(0) + ++#define JZ_MMC_DMAC_DMA_SEL BIT(1) ++#define JZ_MMC_DMAC_DMA_EN BIT(0) + + #define JZ_MMC_CLK_RATE 24000000 + + enum jz4740_mmc_version { + JZ_MMC_JZ4740, ++ JZ_MMC_JZ4750, ++ JZ_MMC_JZ4780, + }; + + enum jz4740_mmc_state { +@@ -144,7 +151,7 @@ struct jz4740_mmc_host { + + uint32_t cmdat; + +- uint16_t irq_mask; ++ uint32_t irq_mask; + + spinlock_t lock; + +@@ -164,8 +171,46 @@ struct jz4740_mmc_host { + * trigger is when data words in MSC_TXFIFO is < 8. + */ + #define JZ4740_MMC_FIFO_HALF_SIZE 8 ++ ++ void (*write_irq_mask)(struct jz4740_mmc_host *host, uint32_t val); ++ void (*write_irq_reg)(struct jz4740_mmc_host *host, uint32_t val); ++ uint32_t (*read_irq_reg)(struct jz4740_mmc_host *host); + }; + ++static void jz4750_mmc_write_irq_mask(struct jz4740_mmc_host *host, ++ uint32_t val) ++{ ++ return writel(val, host->base + JZ_REG_MMC_IMASK); ++} ++ ++static void jz4740_mmc_write_irq_mask(struct jz4740_mmc_host *host, ++ uint32_t val) ++{ ++ return writew(val, host->base + JZ_REG_MMC_IMASK); ++} ++ ++static void jz4740_mmc_write_irq_reg(struct jz4740_mmc_host *host, ++ uint32_t val) ++{ ++ return writew(val, host->base + JZ_REG_MMC_IREG); ++} ++ ++static uint32_t jz4740_mmc_read_irq_reg(struct jz4740_mmc_host *host) ++{ ++ return readw(host->base + JZ_REG_MMC_IREG); ++} ++ ++static void jz4780_mmc_write_irq_reg(struct jz4740_mmc_host *host, uint32_t val) ++{ ++ return writel(val, host->base + JZ_REG_MMC_IREG); ++} ++ ++/* In the 4780 onwards, IREG is expanded to 32 bits. */ ++static uint32_t jz4780_mmc_read_irq_reg(struct jz4740_mmc_host *host) ++{ ++ return readl(host->base + JZ_REG_MMC_IREG); ++} ++ + /*----------------------------------------------------------------------------*/ + /* DMA infrastructure */ + +@@ -370,7 +415,7 @@ static void jz4740_mmc_set_irq_enabled(struct jz4740_mmc_host *host, + else + host->irq_mask |= irq; + +- writew(host->irq_mask, host->base + JZ_REG_MMC_IMASK); ++ host->write_irq_mask(host, host->irq_mask); + spin_unlock_irqrestore(&host->lock, flags); + } + +@@ -422,10 +467,10 @@ static unsigned int jz4740_mmc_poll_irq(struct jz4740_mmc_host *host, + unsigned int irq) + { + unsigned int timeout = 0x800; +- uint16_t status; ++ uint32_t status; + + do { +- status = readw(host->base + JZ_REG_MMC_IREG); ++ status = host->read_irq_reg(host); + } while (!(status & irq) && --timeout); + + if (timeout == 0) { +@@ -525,7 +570,7 @@ static bool jz4740_mmc_read_data(struct jz4740_mmc_host *host, + void __iomem *fifo_addr = host->base + JZ_REG_MMC_RXFIFO; + uint32_t *buf; + uint32_t d; +- uint16_t status; ++ uint32_t status; + size_t i, j; + unsigned int timeout; + +@@ -661,8 +706,25 @@ static void jz4740_mmc_send_command(struct jz4740_mmc_host *host, + cmdat |= JZ_MMC_CMDAT_DATA_EN; + if (cmd->data->flags & MMC_DATA_WRITE) + cmdat |= JZ_MMC_CMDAT_WRITE; +- if (host->use_dma) +- cmdat |= JZ_MMC_CMDAT_DMA_EN; ++ if (host->use_dma) { ++ /* ++ * The 4780's MMC controller has integrated DMA ability ++ * in addition to being able to use the external DMA ++ * controller. It moves DMA control bits to a separate ++ * register. The DMA_SEL bit chooses the external ++ * controller over the integrated one. Earlier SoCs ++ * can only use the external controller, and have a ++ * single DMA enable bit in CMDAT. ++ */ ++ if (host->version >= JZ_MMC_JZ4780) { ++ writel(JZ_MMC_DMAC_DMA_EN | JZ_MMC_DMAC_DMA_SEL, ++ host->base + JZ_REG_MMC_DMAC); ++ } else { ++ cmdat |= JZ_MMC_CMDAT_DMA_EN; ++ } ++ } else if (host->version >= JZ_MMC_JZ4780) { ++ writel(0, host->base + JZ_REG_MMC_DMAC); ++ } + + writew(cmd->data->blksz, host->base + JZ_REG_MMC_BLKLEN); + writew(cmd->data->blocks, host->base + JZ_REG_MMC_NOB); +@@ -743,7 +805,7 @@ static irqreturn_t jz_mmc_irq_worker(int irq, void *devid) + host->state = JZ4740_MMC_STATE_SEND_STOP; + break; + } +- writew(JZ_MMC_IRQ_DATA_TRAN_DONE, host->base + JZ_REG_MMC_IREG); ++ host->write_irq_reg(host, JZ_MMC_IRQ_DATA_TRAN_DONE); + + case JZ4740_MMC_STATE_SEND_STOP: + if (!req->stop) +@@ -773,9 +835,10 @@ static irqreturn_t jz_mmc_irq(int irq, void *devid) + { + struct jz4740_mmc_host *host = devid; + struct mmc_command *cmd = host->cmd; +- uint16_t irq_reg, status, tmp; ++ uint32_t irq_reg, status, tmp; + +- irq_reg = readw(host->base + JZ_REG_MMC_IREG); ++ status = readl(host->base + JZ_REG_MMC_STATUS); ++ irq_reg = host->read_irq_reg(host); + + tmp = irq_reg; + irq_reg &= ~host->irq_mask; +@@ -784,10 +847,10 @@ static irqreturn_t jz_mmc_irq(int irq, void *devid) + JZ_MMC_IRQ_PRG_DONE | JZ_MMC_IRQ_DATA_TRAN_DONE); + + if (tmp != irq_reg) +- writew(tmp & ~irq_reg, host->base + JZ_REG_MMC_IREG); ++ host->write_irq_reg(host, tmp & ~irq_reg); + + if (irq_reg & JZ_MMC_IRQ_SDIO) { +- writew(JZ_MMC_IRQ_SDIO, host->base + JZ_REG_MMC_IREG); ++ host->write_irq_reg(host, JZ_MMC_IRQ_SDIO); + mmc_signal_sdio_irq(host->mmc); + irq_reg &= ~JZ_MMC_IRQ_SDIO; + } +@@ -796,8 +859,6 @@ static irqreturn_t jz_mmc_irq(int irq, void *devid) + if (test_and_clear_bit(0, &host->waiting)) { + del_timer(&host->timeout_timer); + +- status = readl(host->base + JZ_REG_MMC_STATUS); +- + if (status & JZ_MMC_STATUS_TIMEOUT_RES) { + cmd->error = -ETIMEDOUT; + } else if (status & JZ_MMC_STATUS_CRC_RES_ERR) { +@@ -810,7 +871,7 @@ static irqreturn_t jz_mmc_irq(int irq, void *devid) + } + + jz4740_mmc_set_irq_enabled(host, irq_reg, false); +- writew(irq_reg, host->base + JZ_REG_MMC_IREG); ++ host->write_irq_reg(host, irq_reg); + + return IRQ_WAKE_THREAD; + } +@@ -844,9 +905,7 @@ static void jz4740_mmc_request(struct mmc_host *mmc, struct mmc_request *req) + + host->req = req; + +- writew(0xffff, host->base + JZ_REG_MMC_IREG); +- +- writew(JZ_MMC_IRQ_END_CMD_RES, host->base + JZ_REG_MMC_IREG); ++ host->write_irq_reg(host, ~0); + jz4740_mmc_set_irq_enabled(host, JZ_MMC_IRQ_END_CMD_RES, true); + + host->state = JZ4740_MMC_STATE_READ_RESPONSE; +@@ -973,6 +1032,7 @@ static void jz4740_mmc_free_gpios(struct platform_device *pdev) + + static const struct of_device_id jz4740_mmc_of_match[] = { + { .compatible = "ingenic,jz4740-mmc", .data = (void *) JZ_MMC_JZ4740 }, ++ { .compatible = "ingenic,jz4780-mmc", .data = (void *) JZ_MMC_JZ4780 }, + {}, + }; + MODULE_DEVICE_TABLE(of, jz4740_mmc_of_match); +@@ -1017,6 +1077,19 @@ static int jz4740_mmc_probe(struct platform_device* pdev) + goto err_free_host; + } + ++ if (host->version >= JZ_MMC_JZ4780) { ++ host->write_irq_reg = jz4780_mmc_write_irq_reg; ++ host->read_irq_reg = jz4780_mmc_read_irq_reg; ++ } else { ++ host->write_irq_reg = jz4740_mmc_write_irq_reg; ++ host->read_irq_reg = jz4740_mmc_read_irq_reg; ++ } ++ ++ if (host->version >= JZ_MMC_JZ4750) ++ host->write_irq_mask = jz4750_mmc_write_irq_mask; ++ else ++ host->write_irq_mask = jz4740_mmc_write_irq_mask; ++ + host->irq = platform_get_irq(pdev, 0); + if (host->irq < 0) { + ret = host->irq; +@@ -1055,7 +1128,7 @@ static int jz4740_mmc_probe(struct platform_device* pdev) + host->mmc = mmc; + host->pdev = pdev; + spin_lock_init(&host->lock); +- host->irq_mask = 0xffff; ++ host->irq_mask = ~0; + + jz4740_mmc_reset(host); + diff --git a/debian/patches/features/mips/v2-10-14-mmc-jz4740-Use-dma_request_chan.patch b/debian/patches/features/mips/v2-10-14-mmc-jz4740-Use-dma_request_chan.patch new file mode 100644 index 0000000..b71bdb3 --- /dev/null +++ b/debian/patches/features/mips/v2-10-14-mmc-jz4740-Use-dma_request_chan.patch @@ -0,0 +1,43 @@ +diff --git a/drivers/mmc/host/jz4740_mmc.c b/drivers/mmc/host/jz4740_mmc.c +index c3ec8e662706..37183fe32ef8 100644 +--- a/drivers/mmc/host/jz4740_mmc.c ++++ b/drivers/mmc/host/jz4740_mmc.c +@@ -225,31 +225,23 @@ static void jz4740_mmc_release_dma_channels(struct jz4740_mmc_host *host) + + static int jz4740_mmc_acquire_dma_channels(struct jz4740_mmc_host *host) + { +- dma_cap_mask_t mask; +- +- dma_cap_zero(mask); +- dma_cap_set(DMA_SLAVE, mask); +- +- host->dma_tx = dma_request_channel(mask, NULL, host); +- if (!host->dma_tx) { ++ host->dma_tx = dma_request_chan(mmc_dev(host->mmc), "tx"); ++ if (IS_ERR(host->dma_tx)) { + dev_err(mmc_dev(host->mmc), "Failed to get dma_tx channel\n"); +- return -ENODEV; ++ return PTR_ERR(host->dma_tx); + } + +- host->dma_rx = dma_request_channel(mask, NULL, host); +- if (!host->dma_rx) { ++ host->dma_rx = dma_request_chan(mmc_dev(host->mmc), "rx"); ++ if (IS_ERR(host->dma_rx)) { + dev_err(mmc_dev(host->mmc), "Failed to get dma_rx channel\n"); +- goto free_master_write; ++ dma_release_channel(host->dma_tx); ++ return PTR_ERR(host->dma_rx); + } + + /* Initialize DMA pre request cookie */ + host->next_data.cookie = 1; + + return 0; +- +-free_master_write: +- dma_release_channel(host->dma_tx); +- return -ENODEV; + } + + static inline struct dma_chan *jz4740_mmc_get_dma_chan(struct jz4740_mmc_host *host, diff --git a/debian/patches/features/mips/v2-11-14-MIPS-dts-jz4780-Add-DMA-controller-node-to-the-devicetree.patch b/debian/patches/features/mips/v2-11-14-MIPS-dts-jz4780-Add-DMA-controller-node-to-the-devicetree.patch new file mode 100644 index 0000000..381a960 --- /dev/null +++ b/debian/patches/features/mips/v2-11-14-MIPS-dts-jz4780-Add-DMA-controller-node-to-the-devicetree.patch @@ -0,0 +1,84 @@ +diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi +index 9b5794667aee..15a9801430bd 100644 +--- a/arch/mips/boot/dts/ingenic/jz4780.dtsi ++++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi +@@ -1,5 +1,6 @@ + // SPDX-License-Identifier: GPL-2.0 + #include <dt-bindings/clock/jz4780-cgu.h> ++#include <dt-bindings/dma/jz4780-dma.h> + + / { + #address-cells = <1>; +@@ -241,6 +242,17 @@ + status = "disabled"; + }; + ++ dma: dma@13420000 { ++ compatible = "ingenic,jz4780-dma"; ++ reg = <0x13420000 0x10000>; ++ #dma-cells = <2>; ++ ++ interrupt-parent = <&intc>; ++ interrupts = <10>; ++ ++ clocks = <&cgu JZ4780_CLK_PDMA>; ++ }; ++ + bch: bch@134d0000 { + compatible = "ingenic,jz4780-bch"; + reg = <0x134d0000 0x10000>; +diff --git a/include/dt-bindings/dma/jz4780-dma.h b/include/dt-bindings/dma/jz4780-dma.h +new file mode 100644 +index 000000000000..df017fdfb44e +--- /dev/null ++++ b/include/dt-bindings/dma/jz4780-dma.h +@@ -0,0 +1,49 @@ ++#ifndef __DT_BINDINGS_DMA_JZ4780_DMA_H__ ++#define __DT_BINDINGS_DMA_JZ4780_DMA_H__ ++ ++/* ++ * Request type numbers for the JZ4780 DMA controller (written to the DRTn ++ * register for the channel). ++ */ ++#define JZ4780_DMA_I2S1_TX 0x4 ++#define JZ4780_DMA_I2S1_RX 0x5 ++#define JZ4780_DMA_I2S0_TX 0x6 ++#define JZ4780_DMA_I2S0_RX 0x7 ++#define JZ4780_DMA_AUTO 0x8 ++#define JZ4780_DMA_SADC_RX 0x9 ++#define JZ4780_DMA_UART4_TX 0xc ++#define JZ4780_DMA_UART4_RX 0xd ++#define JZ4780_DMA_UART3_TX 0xe ++#define JZ4780_DMA_UART3_RX 0xf ++#define JZ4780_DMA_UART2_TX 0x10 ++#define JZ4780_DMA_UART2_RX 0x11 ++#define JZ4780_DMA_UART1_TX 0x12 ++#define JZ4780_DMA_UART1_RX 0x13 ++#define JZ4780_DMA_UART0_TX 0x14 ++#define JZ4780_DMA_UART0_RX 0x15 ++#define JZ4780_DMA_SSI0_TX 0x16 ++#define JZ4780_DMA_SSI0_RX 0x17 ++#define JZ4780_DMA_SSI1_TX 0x18 ++#define JZ4780_DMA_SSI1_RX 0x19 ++#define JZ4780_DMA_MSC0_TX 0x1a ++#define JZ4780_DMA_MSC0_RX 0x1b ++#define JZ4780_DMA_MSC1_TX 0x1c ++#define JZ4780_DMA_MSC1_RX 0x1d ++#define JZ4780_DMA_MSC2_TX 0x1e ++#define JZ4780_DMA_MSC2_RX 0x1f ++#define JZ4780_DMA_PCM0_TX 0x20 ++#define JZ4780_DMA_PCM0_RX 0x21 ++#define JZ4780_DMA_SMB0_TX 0x24 ++#define JZ4780_DMA_SMB0_RX 0x25 ++#define JZ4780_DMA_SMB1_TX 0x26 ++#define JZ4780_DMA_SMB1_RX 0x27 ++#define JZ4780_DMA_SMB2_TX 0x28 ++#define JZ4780_DMA_SMB2_RX 0x29 ++#define JZ4780_DMA_SMB3_TX 0x2a ++#define JZ4780_DMA_SMB3_RX 0x2b ++#define JZ4780_DMA_SMB4_TX 0x2c ++#define JZ4780_DMA_SMB4_RX 0x2d ++#define JZ4780_DMA_DES_TX 0x2e ++#define JZ4780_DMA_DES_RX 0x2f ++ ++#endif /* __DT_BINDINGS_DMA_JZ4780_DMA_H__ */ diff --git a/debian/patches/features/mips/v2-12-14-MIPS-dts-jz4780-Add-MMC-controller-node-to-the-devicetree.patch b/debian/patches/features/mips/v2-12-14-MIPS-dts-jz4780-Add-MMC-controller-node-to-the-devicetree.patch new file mode 100644 index 0000000..f92ae38 --- /dev/null +++ b/debian/patches/features/mips/v2-12-14-MIPS-dts-jz4780-Add-MMC-controller-node-to-the-devicetree.patch @@ -0,0 +1,51 @@ +diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi +index 15a9801430bd..b72e53bb7292 100644 +--- a/arch/mips/boot/dts/ingenic/jz4780.dtsi ++++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi +@@ -253,6 +253,46 @@ + clocks = <&cgu JZ4780_CLK_PDMA>; + }; + ++ mmc0: mmc@13450000 { ++ compatible = "ingenic,jz4780-mmc"; ++ reg = <0x13450000 0x1000>; ++ ++ interrupt-parent = <&intc>; ++ interrupts = <37>; ++ ++ clocks = <&cgu JZ4780_CLK_MSC0>; ++ clock-names = "mmc"; ++ ++ cap-sd-highspeed; ++ cap-mmc-highspeed; ++ cap-sdio-irq; ++ dmas = <&dma JZ4780_DMA_MSC0_RX 0xffffffff>, ++ <&dma JZ4780_DMA_MSC0_TX 0xffffffff>; ++ dma-names = "rx", "tx"; ++ ++ status = "disabled"; ++ }; ++ ++ mmc1: mmc@13460000 { ++ compatible = "ingenic,jz4780-mmc"; ++ reg = <0x13460000 0x1000>; ++ ++ interrupt-parent = <&intc>; ++ interrupts = <36>; ++ ++ clocks = <&cgu JZ4780_CLK_MSC1>; ++ clock-names = "mmc"; ++ ++ cap-sd-highspeed; ++ cap-mmc-highspeed; ++ cap-sdio-irq; ++ dmas = <&dma JZ4780_DMA_MSC1_RX 0xffffffff>, ++ <&dma JZ4780_DMA_MSC1_TX 0xffffffff>; ++ dma-names = "rx", "tx"; ++ ++ status = "disabled"; ++ }; ++ + bch: bch@134d0000 { + compatible = "ingenic,jz4780-bch"; + reg = <0x134d0000 0x10000>; diff --git a/debian/patches/features/mips/v2-13-14-MIPS-dts-ci20-Enable-MMC-in-the-devicetree.patch b/debian/patches/features/mips/v2-13-14-MIPS-dts-ci20-Enable-MMC-in-the-devicetree.patch new file mode 100644 index 0000000..94480cb --- /dev/null +++ b/debian/patches/features/mips/v2-13-14-MIPS-dts-ci20-Enable-MMC-in-the-devicetree.patch @@ -0,0 +1,50 @@ +diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts +index a4cc52214dbd..0ab5f59a56dc 100644 +--- a/arch/mips/boot/dts/ingenic/ci20.dts ++++ b/arch/mips/boot/dts/ingenic/ci20.dts +@@ -36,6 +36,28 @@ + clock-frequency = <48000000>; + }; + ++&mmc0 { ++ status = "okay"; ++ ++ bus-width = <4>; ++ max-frequency = <50000000>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pins_mmc0>; ++ ++ cd-gpios = <&gpf 20 GPIO_ACTIVE_LOW>; ++}; ++ ++&mmc1 { ++ status = "okay"; ++ ++ bus-width = <4>; ++ max-frequency = <50000000>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pins_mmc1>; ++}; ++ + &uart0 { + status = "okay"; + +@@ -203,4 +225,16 @@ + groups = "nemc-cs6"; + bias-disable; + }; ++ ++ pins_mmc0: mmc0 { ++ function = "mmc0"; ++ groups = "mmc0-1bit-e", "mmc0-4bit-e"; ++ bias-disable; ++ }; ++ ++ pins_mmc1: mmc1 { ++ function = "mmc1"; ++ groups = "mmc1-1bit-d", "mmc1-4bit-d"; ++ bias-disable; ++ }; + }; diff --git a/debian/patches/features/mips/v2-14-14-MIPS-configs-ci20-Enable-DMA-and-MMC-support.patch b/debian/patches/features/mips/v2-14-14-MIPS-configs-ci20-Enable-DMA-and-MMC-support.patch new file mode 100644 index 0000000..de7cb24 --- /dev/null +++ b/debian/patches/features/mips/v2-14-14-MIPS-configs-ci20-Enable-DMA-and-MMC-support.patch @@ -0,0 +1,16 @@ +diff --git a/arch/mips/configs/ci20_defconfig b/arch/mips/configs/ci20_defconfig +index b5f4ad8f2c45..f88b05fd3077 100644 +--- a/arch/mips/configs/ci20_defconfig ++++ b/arch/mips/configs/ci20_defconfig +@@ -104,8 +104,11 @@ CONFIG_REGULATOR_FIXED_VOLTAGE=y + # CONFIG_HID is not set + # CONFIG_USB_SUPPORT is not set + CONFIG_MMC=y ++CONFIG_MMC_JZ4740=y + CONFIG_RTC_CLASS=y + CONFIG_RTC_DRV_JZ4740=y ++CONFIG_DMADEVICES=y ++CONFIG_DMA_JZ4780=y + # CONFIG_IOMMU_SUPPORT is not set + CONFIG_MEMORY=y + # CONFIG_DNOTIFY is not set diff --git a/debian/patches/series b/debian/patches/series index 96e11fc..ab206ae 100644 --- a/debian/patches/series +++ b/debian/patches/series @@ -68,6 +68,19 @@ bugfix/x86/mmap-add-an-exception-to-the-stack-gap-for-hotspot-jvm.patch # Arch features features/mips/MIPS-increase-MAX-PHYSMEM-BITS-on-Loongson-3-only.patch features/mips/MIPS-Loongson-3-Add-Loongson-LS3A-RS780E-1-way-machi.patch +features/mips/v2-02-14-mmc-jz4740-Fix-error-exit-path-in-driver-s-probe.patch +features/mips/v2-03-14-mmc-jz4780-Order-headers-alphabetically.patch +features/mips/v2-04-14-mmc-jz4740-Use-dev_get_platdata.patch +features/mips/v2-05-14-mmc-jz4740-Reset-the-device-requesting-the-interrupt.patch +features/mips/v2-06-14-mmc-jz4740-Introduce-devicetree-probe.patch +features/mips/v2-07-14-mmc-dt-bindings-add-MMC-support-to-JZ4740-SoC.patch +features/mips/v2-08-14-mmc-jz4740-Set-clock-rate-to-mmc--f_max-rather-than-JZ_MMC_CLK_RATE.patch +features/mips/v2-09-14-mmc-jz4740-Add-support-for-the-JZ4780.patch +features/mips/v2-10-14-mmc-jz4740-Use-dma_request_chan.patch +features/mips/v2-11-14-MIPS-dts-jz4780-Add-DMA-controller-node-to-the-devicetree.patch +features/mips/v2-12-14-MIPS-dts-jz4780-Add-MMC-controller-node-to-the-devicetree.patch +features/mips/v2-13-14-MIPS-dts-ci20-Enable-MMC-in-the-devicetree.patch +features/mips/v2-14-14-MIPS-configs-ci20-Enable-DMA-and-MMC-support.patch features/x86/x86-memtest-WARN-if-bad-RAM-found.patch features/x86/x86-make-x32-syscall-support-conditional.patch -- 2.11.0