At Fri, 17 Jan 2020 08:31:22 -0400, David Bremner wrote: > I tried both modes, at least to my inexpert eye they look the same. > > The hardware claims to be arm v7 (Freescale i.MX53). > > (gdb) set arm fallback-mode arm > (gdb) disassemble > Dump of assembler code for function malloc_stats: > 0xb6ea324c <+0>: ldr r1, [pc, #328] ; (0xb6ea3398 > <malloc_stats+332>) > 0xb6ea324e <+2>: ldr r2, [pc, #332] ; (0xb6ea339c > <malloc_stats+336>) > 0xb6ea3250 <+4>: add r1, pc > 0xb6ea3252 <+6>: ldr r3, [pc, #332] ; (0xb6ea33a0 > <malloc_stats+340>) > => 0xb6ea3254 <+8>: stmdb sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr} > 0xb6ea3258 <+12>: add r3, pc
That certainly looks like a valid ARM instruction. Maybe the processor is expecting Thumb instructions. What does `print $cpsr` report?