Hi Dieter, Quoting Dieter (2020-08-02 12:29:45) > I've made some tests with my Rev C A20 OLinuxino Lime 2 board. > So it uses the RTL8211C Phy. > > source used: 2019.01+dfsg-7 > > The results are somewhat inconclusive i would say. > The board seems to be able to transfer data with TX_DELAY values up to 3. > Retry-counts went up when increasing the delay value. > > Also attached are tests with a reversed data-flow, as well as test with > a longer cable. > Default cable: 1m > Long cable: 5m. > > > What i did not test: if DHCP would work with TX_DELAY=?, as i used > static ip addresses > > > > I did some testing with the RevK board i have at my other place, > TX_DELAY = 3 was the needed value to get good ethernet speeds with that > board. > > I can do some more testing if needed!
Thanks for the above, and for offering to test more! I have tried to summarize the kinds of test I imagine relevant, at https://linux-sunxi.org/Olimex_A20-OLinuXino-Lime2#GMAC_quirks Length of ethernet cable should _not_ be relevant - as long as you stay within specs of 100 meter: https://en.wikipedia.org/wiki/Ethernet_over_twisted_pair#Variants DHCP should be irrelevant to test - that's a higher-level protocol on top of tcp, and the problems are with packet loss at lower levels. What _is_ relevant is which mode the PHY ends up being in - master or slave. This can either be forced or auto-negotiated. Beware that some releases of u-boot has it forced by default, and to fully test all combinations you will want to rebuild without that constraint. - Jonas -- * Jonas Smedegaard - idealist & Internet-arkitekt * Tlf.: +45 40843136 Website: http://dr.jones.dk/ [x] quote me freely [ ] ask before reusing [ ] keep private
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