On Tue, Aug 29, 2006 at 10:50:27PM +0200, Eugeniy Meshcheryakov wrote: > 29 ?????? 2006 ? 21:09 +0200 Kurt Roeckx ???????(-??): > > On Tue, Aug 29, 2006 at 01:14:12AM +0200, Eugeniy Meshcheryakov wrote: > > > Hello, > > > > > > 27 ?????? 2006 ? 17:12 +0200 Eugeniy Meshcheryakov ???????(-??): > > > > > Anyway, arm needs an arm_retval.c and arm_regs.c in backends/ > > > > Ok, I'll work on arm then. > > > > > > Patch for arm support is attached. It however adds support for only one > > > ABI variant supported by gcc (default one, -mabi=apcs-gnu -mhard-float). > > > > I've been looking at the ABI doc, and it's nice to see someone actually > > documented this. This is like only the second arch for what I find it. > Did you found some ABI documentation? Is it "DWARF for the ARM(R) > Architecture" aka AADWARF from ARM? If it is not, could you give a link?
Yes, that's the one I'm talking about. It's: http://www.arm.com/miscPDFs/8029.pdf > > The ABI doc seems to say that 16-23 can be used for both f0-f7 and > > s0-f7, and s0-s31 can also be in 64-95. I guess there is no way to see > > which ABI is being used? > One that I have also says that s0-s31 should be encoded as parts of > D0-D15 (256-...). And it also says that f0-f7 used to be encoded in > 96-103. GCC supports last encoding for -mabi=aapcs. AFAICS gcc cannot > generate code that uses sN or dN registers. D0-D15 seems to be at 64-95, but D0-D31 also at and 256-287. They seem to have changed their ABI is lots of strange ways. > > The gdb source seems to have r0-r12, sp, lr, pc, instead of r0-r15. > rN are generic names, sp, lr, pc are aliaces for this ABI (like on most > RISC architectures AFAIK). For elfutils it is cosmetic, so it is not > problem to use any names. ABI that I found says that r0-r15 = a1-a4, v1-v8, > ip, sp, lr, pc, and r6 also is 'sb' or 'tr'. It's probably easiest to just name them r0-r15. Kurt -- To UNSUBSCRIBE, email to [EMAIL PROTECTED] with a subject of "unsubscribe". Trouble? Contact [EMAIL PROTECTED]
