Hi, NMU patch below.
diff -u hercules-2.17.1/debian/changelog hercules-2.17.1/debian/changelog
--- hercules-2.17.1/debian/changelog
+++ hercules-2.17.1/debian/changelog
@@ -1,3 +1,11 @@
+hercules (2.17.1-2.1) unstable; urgency=low
+
+ * Non-maintainer upload.
+ * Apply patch by Andreas Jochens to fix FTBFS with gcc-4.0
+ (Closes: #289121).
+
+ -- Christoph Berg <[EMAIL PROTECTED]> Sat, 29 Oct 2005 22:48:58 +0200
+
hercules (2.17.1-2) unstable; urgency=low
* Update config.{guess,sub} (Closes: #182650)
only in patch2:
unchanged:
--- hercules-2.17.1.orig/feature.h
+++ hercules-2.17.1/feature.h
@@ -70,6 +70,7 @@
#undef CR
#undef GR
#undef GR_A
+#undef GR_A_COPY
#undef MONCODE
#undef TEA
#undef DXC
@@ -162,6 +163,7 @@
#define CR(_r) CR_L(_r)
#define GR(_r) GR_L(_r)
#define GR_A(_r, _regs) ((_regs)->GR_L((_r)))
+#define GR_A_COPY(source, _r, _regs) ((_regs)->GR_L((_r))) = source
#define MONCODE MC_L
#define TEA EA_L
#define DXC tea
@@ -262,6 +264,7 @@
#define CR(_r) CR_L(_r)
#define GR(_r) GR_L(_r)
#define GR_A(_r, _regs) ((_regs)->GR_L((_r)))
+#define GR_A_COPY(source, _r, _regs) ((_regs)->GR_L((_r))) = source
#define MONCODE MC_L
#define TEA EA_L
#define DXC tea
@@ -362,6 +365,7 @@
#define CR(_r) CR_G(_r)
#define GR(_r) GR_G(_r)
#define GR_A(_r, _regs) ((_regs)->psw.amode64 ? (_regs)->GR_G((_r)) :
(_regs)->GR_L((_r)))
+#define GR_A_COPY(source, _r, _regs) if ((_regs)->psw.amode64)
(_regs)->GR_G((_r)) = source; else (_regs)->GR_L((_r)) = source
#define MONCODE MC_G
#define TEA EA_G
#define DXC dataexc
only in patch2:
unchanged:
--- hercules-2.17.1.orig/cckddasd.c
+++ hercules-2.17.1/cckddasd.c
@@ -2501,7 +2501,7 @@
/* Inactivate the previous entry */
if (cckd->l2active)
cckd->l2active->flags &= ~CCKD_CACHE_ACTIVE;
- cckd->l2active = (void *)cckd->l2 = NULL;
+ cckd->l2active = cckd->l2 = NULL;
cckd->sfx = cckd->l1x = -1;
cckd_read_l2_retry:
@@ -2638,7 +2638,7 @@
{
cckd = dev->cckd_ext;
cckd->sfx = cckd->l1x = -1;
- cckd->l2 = (void *)cckd->l2active = NULL;
+ cckd->l2 = cckd->l2active = NULL;
}
for (i = 0; i < cckdblk.l2cachenbr && cckdblk.l2cache; i++)
only in patch2:
unchanged:
--- hercules-2.17.1.orig/general1.c
+++ hercules-2.17.1/general1.c
@@ -98,7 +98,7 @@
RX(inst, execflag, regs, r1, b2, effective_addr2);
/* Load 2 bytes from operand address */
- (S32)n = (S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
+ n = (S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
/* Add signed operands and set condition code */
regs->psw.cc =
@@ -821,7 +821,7 @@
j = (r3 & 1) ? (S32)regs->GR_L(r3) : (S32)regs->GR_L(r3+1);
/* Add the increment value to the R1 register */
- (S32)regs->GR_L(r1) += i;
+ regs->GR_L(r1) = (S32)regs->GR_L(r1) + i;
/* Branch if result compares high */
if ( (S32)regs->GR_L(r1) > j )
@@ -860,7 +860,7 @@
j = (r3 & 1) ? (S32)regs->GR_L(r3) : (S32)regs->GR_L(r3+1);
/* Add the increment value to the R1 register */
- (S32)regs->GR_L(r1) += i;
+ regs->GR_L(r1) = (S32)regs->GR_L(r1) + i;
/* Branch if result compares low or equal */
if ( (S32)regs->GR_L(r1) <= j )
@@ -1001,7 +1001,7 @@
j = (r3 & 1) ? (S32)regs->GR_L(r3) : (S32)regs->GR_L(r3+1);
/* Add the increment value to the R1 register */
- (S32)regs->GR_L(r1) += i;
+ regs->GR_L(r1) = (S32)regs->GR_L(r1) + i;
/* Branch if result compares high */
if ( (S32)regs->GR_L(r1) > j )
@@ -1042,7 +1042,7 @@
j = (r3 & 1) ? (S32)regs->GR_L(r3) : (S32)regs->GR_L(r3+1);
/* Add the increment value to the R1 register */
- (S32)regs->GR_L(r1) += i;
+ regs->GR_L(r1) = (S32)regs->GR_L(r1) + i;
/* Branch if result compares low or equal */
if ( (S32)regs->GR_L(r1) <= j )
@@ -1138,8 +1138,8 @@
regs->GR_L(r1) = dreg;
/* Update the operand address and length registers */
- GR_A(r2, regs) = addr2;
- GR_A(r2+1, regs) = len;
+ GR_A_COPY(addr2, r2, regs);
+ GR_A_COPY(len, r2+1, regs);
/* Set condition code 0 or 3 */
regs->psw.cc = cc;
@@ -1414,7 +1414,7 @@
RX(inst, execflag, regs, r1, b2, effective_addr2);
/* Load rightmost 2 bytes of comparand from operand address */
- (S32)n = (S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
+ n = (S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
/* Compare signed operands and set condition code */
regs->psw.cc =
@@ -1641,8 +1641,8 @@
/* Update Regs if cross half page - may get access rupt */
if ((addr1 & 0x7ff) == 0 || (addr2 & 0x7ff) == 0)
{
- GR_A(r1, regs) = addr1;
- GR_A(r2, regs) = addr2;
+ GR_A_COPY(addr1, r1, regs);
+ GR_A_COPY(addr2, r2, regs);
regs->GR_LA24(r1+1) = len1;
regs->GR_LA24(r2+1) = len2;
@@ -1663,8 +1663,8 @@
} /* end while(len1||len2) */
/* Update the registers */
- GR_A(r1, regs) = addr1;
- GR_A(r2, regs) = addr2;
+ GR_A_COPY(addr1, r1, regs);
+ GR_A_COPY(addr2, r2, regs);
regs->GR_LA24(r1+1) = len1;
regs->GR_LA24(r2+1) = len2;
@@ -1745,10 +1745,10 @@
} /* end for(i) */
/* Update the registers */
- GR_A(r1, regs) = addr1;
- GR_A(r1+1, regs) = len1;
- GR_A(r3, regs) = addr2;
- GR_A(r3+1, regs) = len2;
+ GR_A_COPY(addr1, r1, regs);
+ GR_A_COPY(len1, r1+1, regs);
+ GR_A_COPY(addr2, r3, regs);
+ GR_A_COPY(len2, r3+1, regs);
regs->psw.cc = cc;
@@ -1827,8 +1827,8 @@
} /* end for(i) */
/* Set R1 and R2 to point to current character of each operand */
- GR_A(r1, regs) = addr1;
- GR_A(r2, regs) = addr2;
+ GR_A_COPY(addr1, r1, regs) = addr1;
+ GR_A_COPY(addr2, r2, regs) = addr2;
/* Set condition code */
regs->psw.cc = cc;
@@ -1873,8 +1873,8 @@
addr2 = regs->GR(r2) & ADDRESS_MAXWRAP(regs);
/* update regs so unused bits zeroed */
- GR_A(r1, regs) = addr1;
- GR_A(r2, regs) = addr2;
+ GR_A_COPY(addr1, r1, regs);
+ GR_A_COPY(addr2, r2, regs);
/* Load signed operand lengths from R1+1 and R2+1 */
len1 =
@@ -1986,12 +1986,12 @@
if ((addr1 & 0x7FF) == 0 || (addr2 & 0x7FF) == 0)
{
/* Update R1 and R2 to point to next bytes to compare */
- GR_A(r1, regs) = addr1;
- GR_A(r2, regs) = addr2;
+ GR_A_COPY(addr1, r1, regs);
+ GR_A_COPY(addr2, r2, regs);
/* Set R1+1 and R2+1 to remaining operand lengths */
- GR_A(r1+1, regs) = len1;
- GR_A(r2+1, regs) = len2;
+ GR_A_COPY(len1, r1+1, regs);
+ GR_A_COPY(len2, r2+1, regs);
}
/* If equal byte count has reached substring length
@@ -2008,23 +2008,23 @@
if (cc < 2)
{
/* Update R1 and R2 to point to the equal substring */
- GR_A(r1, regs) = eqaddr1;
- GR_A(r2, regs) = eqaddr2;
+ GR_A_COPY(eqaddr1, r1, regs);
+ GR_A_COPY(eqaddr2, r2, regs);
/* Set R1+1 and R2+1 to length remaining in each
operand after the start of the substring */
- GR_A(r1+1, regs) = remlen1;
- GR_A(r2+1, regs) = remlen2;
+ GR_A_COPY(remlen1, r1+1, regs);
+ GR_A_COPY(remlen2, r2+1, regs);
}
else
{
/* Update R1 and R2 to point to next bytes to compare */
- GR_A(r1, regs) = addr1;
- GR_A(r2, regs) = addr2;
+ GR_A_COPY(addr1, r1, regs);
+ GR_A_COPY(addr2, r2, regs);
/* Set R1+1 and R2+1 to remaining operand lengths */
- GR_A(r1+1, regs) = len1;
- GR_A(r2+1, regs) = len2;
+ GR_A_COPY(len1, r1+1, regs);
+ GR_A_COPY(len2, r2+1, regs);
}
/* Set condition code */
@@ -2149,10 +2149,10 @@
len2 = nlen2;
/* Update the registers */
- GR_A(r1, regs) = addr1;
- GR_A(r1+1, regs) = len1;
- GR_A(r2, regs) = addr2;
- GR_A(r2+1, regs) = len2;
+ GR_A_COPY(addr1, r1, regs);
+ GR_A_COPY(len1, r1+1, regs);
+ GR_A_COPY(addr2, r2, regs);
+ GR_A_COPY(len2, r2+1, regs);
if (len1 == 0)
cc = 1;
@@ -2310,10 +2310,10 @@
len2 -= n + 1;
/* Update the registers */
- GR_A(r1, regs) = addr1;
- GR_A(r1+1, regs) = len1;
- GR_A(r2, regs) = addr2;
- GR_A(r2+1, regs) = len2;
+ GR_A_COPY(addr1, r1, regs);
+ GR_A_COPY(len1, r1+1, regs);
+ GR_A_COPY(addr2, r2, regs);
+ GR_A_COPY(len2, r2+1, regs);
if (len1 == 0)
cc = 1;
@@ -2398,7 +2398,7 @@
/* Result is negative if sign is X'B' or X'D' */
if (d == 0x0B || d == 0x0D)
{
- (S64)dreg = -((S64)dreg);
+ dreg = -((S64)dreg);
}
/* Store low-order 32 bits of result into R1 register */
@@ -2928,7 +2928,7 @@
RX(inst, execflag, regs, r1, b2, effective_addr2);
/* Load operand address into register */
- GR_A(r1, regs) = effective_addr2;
+ GR_A_COPY(effective_addr2, r1, regs);
}
@@ -2945,7 +2945,7 @@
RX(inst, execflag, regs, r1, b2, effective_addr2);
/* Load operand address into register */
- GR_A(r1, regs) = effective_addr2;
+ GR_A_COPY(effective_addr2, r1, regs);
/* Load corresponding value into access register */
if ( PRIMARY_SPACE_MODE(&(regs->psw)) )
@@ -2999,7 +2999,7 @@
}
/* Load complement of second operand and set condition code */
- (S32)regs->GR_L(r1) = -((S32)regs->GR_L(r2));
+ regs->GR_L(r1) = -((S32)regs->GR_L(r2));
regs->psw.cc = (S32)regs->GR_L(r1) < 0 ? 1 :
(S32)regs->GR_L(r1) > 0 ? 2 : 0;
@@ -3018,7 +3018,7 @@
RX(inst, execflag, regs, r1, b2, effective_addr2);
/* Load rightmost 2 bytes of register from operand address */
- (S32)regs->GR_L(r1) = (S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
+ regs->GR_L(r1) = (S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
}
@@ -3035,7 +3035,7 @@
RI(inst, execflag, regs, r1, opcd, i2);
/* Load operand into register */
- (S32)regs->GR_L(r1) = (S16)i2;
+ regs->GR_L(r1) = (S16)i2;
}
#endif /*defined(FEATURE_IMMEDIATE_AND_RELATIVE)*/
@@ -3085,7 +3085,7 @@
RR(inst, execflag, regs, r1, r2);
/* Load negative value of second operand and set cc */
- (S32)regs->GR_L(r1) = (S32)regs->GR_L(r2) > 0 ?
+ regs->GR_L(r1) = (S32)regs->GR_L(r2) > 0 ?
-((S32)regs->GR_L(r2)) :
(S32)regs->GR_L(r2);
@@ -3113,7 +3113,7 @@
}
/* Load positive value of second operand and set cc */
- (S32)regs->GR_L(r1) = (S32)regs->GR_L(r2) < 0 ?
+ regs->GR_L(r1) = (S32)regs->GR_L(r2) < 0 ?
-((S32)regs->GR_L(r2)) :
(S32)regs->GR_L(r2);
@@ -3280,8 +3280,8 @@
|| (n <= addr2
&& (addr1 > addr2 || addr1 <= n)))
{
- GR_A(r1, regs) = addr1;
- GR_A(r2, regs) = addr2;
+ GR_A_COPY(addr1, r1, regs);
+ GR_A_COPY(addr2, r2, regs);
regs->psw.cc = 3;
#if 0
logmsg (_("MVCL destructive overlap: "));
@@ -3325,7 +3325,7 @@
addr1 &= ADDRESS_MAXWRAP(regs);
/* Update the registers */
- GR_A(r1, regs) = addr1;
+ GR_A_COPY(addr1, r1, regs);
regs->GR_LA24(r1+1) = len1;
/* The instruction can be interrupted when a CPU determined
@@ -3368,8 +3368,8 @@
#endif /*defined(FEATURE_PER)*/
/* Update the registers */
- GR_A(r1, regs) = addr1 + len1;
- GR_A(r2, regs) = addr2 + len2;
+ GR_A_COPY(addr1 + len1, r1, regs);
+ GR_A_COPY(addr2 + len2, r2, regs);
regs->GR_LA24(r1+1) = 0;
regs->GR_LA24(r2+1) = 0;
regs->psw.cc = cc;
@@ -3405,8 +3405,8 @@
len2 -= 256;
/* Update the registers */
- GR_A(r1, regs) = addr1;
- GR_A(r2, regs) = addr2;
+ GR_A_COPY(addr1, r1, regs);
+ GR_A_COPY(addr2, r2, regs);
regs->GR_LA24(r1+1) = len1;
regs->GR_LA24(r2+1) = len2;
@@ -3448,8 +3448,8 @@
len1--;
/* Update the registers */
- GR_A(r1, regs) = addr1;
- GR_A(r2, regs) = addr2;
+ GR_A_COPY(addr1, r1, regs);
+ GR_A_COPY(addr2, r2, regs);
regs->GR_LA24(r1+1) = len1;
regs->GR_LA24(r2+1) = len2;
@@ -3543,10 +3543,10 @@
len1--;
/* Update the registers */
- GR_A(r1, regs) = addr1;
- GR_A(r1+1, regs) = len1;
- GR_A(r3, regs) = addr2;
- GR_A(r3+1, regs) = len2;
+ GR_A_COPY(addr1, r1, regs);
+ GR_A_COPY(len1, r1+1, regs);
+ GR_A_COPY(addr2, r3, regs);
+ GR_A_COPY(len2, r3+1, regs);
} /* end for(i) */
@@ -3679,7 +3679,7 @@
if (sbyte == termchar)
{
/* Set r1 to point to terminating character */
- GR_A(r1, regs) = addr1;
+ GR_A_COPY(addr1, r1, regs);
/* Set condition code 1 */
regs->psw.cc = 1;
@@ -3695,8 +3695,8 @@
} /* end for(i) */
/* Set R1 and R2 to point to next character of each operand */
- GR_A(r1, regs) = addr1;
- GR_A(r2, regs) = addr2;
+ GR_A_COPY(addr1, r1, regs);
+ GR_A_COPY(addr2, r2, regs);
/* Set condition code 3 */
regs->psw.cc = 3;
@@ -3904,7 +3904,7 @@
RX(inst, execflag, regs, r1, b2, effective_addr2);
/* Load 2 bytes from operand address */
- (S32)n = (S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
+ n = (S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
/* Multiply R1 register by n, ignore leftmost 32 bits of
result, and place rightmost 32 bits in R1 register */
@@ -3926,7 +3926,7 @@
RI(inst, execflag, regs, r1, opcd, i2);
/* Multiply register by operand ignoring overflow */
- (S32)regs->GR_L(r1) *= (S16)i2;
+ regs->GR_L(r1) = (S32)regs->GR_L(r1) * (S16)i2;
} /* end DEF_INST(multiply_halfword_immediate) */
@@ -3941,7 +3941,7 @@
RRE(inst, execflag, regs, r1, r2);
/* Multiply signed registers ignoring overflow */
- (S32)regs->GR_L(r1) *= (S32)regs->GR_L(r2);
+ regs->GR_L(r1) = (S32)regs->GR_L(r1) * (S32)regs->GR_L(r2);
} /* end DEF_INST(multiply_single_register) */
@@ -3962,7 +3962,7 @@
n = ARCH_DEP(vfetch4) ( effective_addr2, b2, regs );
/* Multiply signed operands ignoring overflow */
- (S32)regs->GR_L(r1) *= (S32)n;
+ regs->GR_L(r1) = (S32)regs->GR_L(r1) * (S32)n;
} /* end DEF_INST(multiply_single) */
#endif /*defined(FEATURE_IMMEDIATE_AND_RELATIVE)*/
only in patch2:
unchanged:
--- hercules-2.17.1.orig/general2.c
+++ hercules-2.17.1/general2.c
@@ -473,7 +473,7 @@
code 1 and load the address of the character into R1 */
if (sbyte == termchar)
{
- GR_A(r1, regs) = addr2;
+ GR_A_COPY(addr2, r1, regs);
regs->psw.cc = 1;
return;
}
@@ -485,7 +485,7 @@
} /* end for(i) */
/* Set R2 to point to next character of operand */
- GR_A(r2, regs) = addr2;
+ GR_A_COPY(addr2, r2, regs);
/* Return condition code 3 */
regs->psw.cc = 3;
@@ -757,7 +757,7 @@
n = effective_addr2 & 0x3F;
/* Shift the signed value of the R1 register */
- (S32)regs->GR_L(r1) = n > 30 ?
+ regs->GR_L(r1) = n > 30 ?
((S32)regs->GR_L(r1) < 0 ? -1 : 0) :
(S32)regs->GR_L(r1) >> n;
@@ -1122,7 +1122,7 @@
RX(inst, execflag, regs, r1, b2, effective_addr2);
/* Load 2 bytes from operand address */
- (S32)n = (S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
+ n = (S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
/* Subtract signed operands and set condition code */
regs->psw.cc =
@@ -1600,8 +1600,8 @@
len1--;
/* Update the registers */
- GR_A(r1, regs) = addr1;
- GR_A(r1+1, regs) = len1;
+ GR_A_COPY(addr1, r1, regs);
+ GR_A_COPY(len1, r1+1, regs);
} /* end for(i) */
only in patch2:
unchanged:
--- hercules-2.17.1.orig/control.c
+++ hercules-2.17.1/control.c
@@ -5746,7 +5746,7 @@
PERFORM_SERIALIZATION (regs);
/* Clear general register 0 */
- GR_A(0, regs) = 0;
+ GR_A_COPY(0, 0, regs);
}
#endif /*defined(FEATURE_TEST_BLOCK)*/
only in patch2:
unchanged:
--- hercules-2.17.1.orig/service.c
+++ hercules-2.17.1/service.c
@@ -1194,7 +1194,7 @@
}
}
mcd_len -= obj_len;
- (BYTE*)obj_hdr += obj_len;
+ obj_hdr = (BYTE*)obj_hdr + obj_len;
}
/* Indicate Event Processed */
only in patch2:
unchanged:
--- hercules-2.17.1.orig/cmpsc.c
+++ hercules-2.17.1/cmpsc.c
@@ -224,8 +224,8 @@
#if !defined(ADJUSTREGS)
#define ADJUSTREGS(r, regs, iregs, len) \
{\
- GR_A((r), (iregs)) = (GR_A((r), (iregs)) + (len)) & ADDRESS_MAXWRAP((regs));\
- GR_A((r) + 1, (iregs)) -= (len);\
+ GR_A_COPY((GR_A((r), (iregs)) + (len)) & ADDRESS_MAXWRAP((regs)), (r),
(iregs));\
+ GR_A_COPY(GR_A((r) + 1, (iregs)) - (len), (r) + 1, (iregs));\
}
#endif /* !defined(ADJUSTREGS) */
@@ -238,11 +238,11 @@
#if !defined(COMMITREGS)
#define COMMITREGS(regs, iregs, r1, r2) \
{\
- GR_A(1, (regs)) = GR_A(1, (iregs));\
- GR_A((r1), (regs)) = GR_A((r1), (iregs));\
- GR_A((r1) + 1, (regs)) = GR_A((r1) + 1, (iregs));\
- GR_A((r2), (regs)) = GR_A((r2), (iregs));\
- GR_A((r2) + 1, (regs)) = GR_A((r2) + 1, (iregs));\
+ GR_A_COPY(GR_A(1, (iregs)), 1, (regs));\
+ GR_A_COPY(GR_A((r1), (iregs)), (r1), (regs));\
+ GR_A_COPY(GR_A((r1) + 1, (iregs)), (r1) + 1, (regs));\
+ GR_A_COPY(GR_A((r2), (iregs)), (r2), (regs));\
+ GR_A_COPY(GR_A((r2) + 1, (iregs)), (r2) + 1, (regs));\
}
#endif /* !defined(COMMITREGS) */
only in patch2:
unchanged:
--- hercules-2.17.1.orig/sie.c
+++ hercules-2.17.1/sie.c
@@ -125,7 +125,7 @@
ARCH_DEP(program_interrupt) (regs, PGM_ADDRESSING_EXCEPTION);
/* Direct pointer to state descriptor block */
- STATEBK = (void*)(regs->mainstor + effective_addr2);
+ GUESTREGS->siebk = (void*)(regs->mainstor + effective_addr2);
obtain_lock(&sysblk.intlock);
only in patch2:
unchanged:
--- hercules-2.17.1.orig/timer.c
+++ hercules-2.17.1/timer.c
@@ -140,7 +140,7 @@
* [2] Decrement the CPU timer for each CPU *
*-------------------------------------------*/
- (S64)regs->ptimer -= (S64)sysblk.todclock_diff << 8;
+ regs->ptimer = (S64)regs->ptimer - (S64)sysblk.todclock_diff << 8;
/* Set interrupt flag if the CPU timer is negative */
if ((S64)regs->ptimer < 0)
@@ -159,7 +159,7 @@
if(regs->sie_active)
{
/* Decrement the guest CPU timer */
- (S64)regs->guestregs->ptimer -= (S64)sysblk.todclock_diff << 8;
+ regs->guestregs->ptimer = (S64)regs->guestregs->ptimer -
(S64)sysblk.todclock_diff << 8;
/* Set interrupt flag if the CPU timer is negative */
if ((S64)regs->guestregs->ptimer < 0)
only in patch2:
unchanged:
--- hercules-2.17.1.orig/esame.c
+++ hercules-2.17.1/esame.c
@@ -652,7 +652,7 @@
{
if( (S64)dreg == -1LL )
ovf = 1;
- (S64)dreg = -((S64)dreg);
+ dreg = -((S64)dreg);
}
/* Store result into R1 register */
@@ -1531,8 +1531,8 @@
RIL(inst, execflag, regs, r1, opcd, i2);
- GR_A(r1, regs) = ((!execflag ? (regs->psw.IA - 6) : regs->ET)
- + 2LL*(S32)i2) & ADDRESS_MAXWRAP(regs);
+ GR_A_COPY(((!execflag ? (regs->psw.IA - 6) : regs->ET)
+ + 2LL*(S32)i2) & ADDRESS_MAXWRAP(regs), r1,
regs);
} /* end DEF_INST(load_address_relative_long) */
#endif /*defined(FEATURE_ESAME_N3_ESA390) || defined(FEATURE_ESAME)*/
@@ -2119,7 +2119,7 @@
j = (r3 & 1) ? (S64)regs->GR_G(r3) : (S64)regs->GR_G(r3+1);
/* Add the increment value to the R1 register */
- (S64)regs->GR_G(r1) += i;
+ regs->GR_G(r1) = (S64)regs->GR_G(r1) + i;
/* Branch if result compares high */
if ( (S64)regs->GR_G(r1) > j )
@@ -2160,7 +2160,7 @@
j = (r3 & 1) ? (S64)regs->GR_G(r3) : (S64)regs->GR_G(r3+1);
/* Add the increment value to the R1 register */
- (S64)regs->GR_G(r1) += i;
+ regs->GR_G(r1) = (S64)regs->GR_G(r1) + i;
/* Branch if result compares low or equal */
if ( (S64)regs->GR_G(r1) <= j )
@@ -2202,7 +2202,7 @@
j = (r3 & 1) ? (S64)regs->GR_G(r3) : (S64)regs->GR_G(r3+1);
/* Add the increment value to the R1 register */
- (S64)regs->GR_G(r1) += i;
+ regs->GR_G(r1) = (S64)regs->GR_G(r1) + i;
/* Branch if result compares high */
if ( (S64)regs->GR_G(r1) > j )
@@ -2243,7 +2243,7 @@
j = (r3 & 1) ? (S64)regs->GR_G(r3) : (S64)regs->GR_G(r3+1);
/* Add the increment value to the R1 register */
- (S64)regs->GR_G(r1) += i;
+ regs->GR_G(r1) = (S64)regs->GR_G(r1) + i;
/* Branch if result compares low or equal */
if ( (S64)regs->GR_G(r1) <= j )
@@ -2859,7 +2859,7 @@
}
/* Load positive value of second operand and set cc */
- (S64)regs->GR_G(r1) = (S64)regs->GR_G(r2) < 0 ?
+ regs->GR_G(r1) = (S64)regs->GR_G(r2) < 0 ?
-((S64)regs->GR_G(r2)) :
(S64)regs->GR_G(r2);
@@ -2883,7 +2883,7 @@
gpr2l = (S32)regs->GR_L(r2);
/* Load positive value of second operand and set cc */
- (S64)regs->GR_G(r1) = gpr2l < 0 ? -gpr2l : gpr2l;
+ regs->GR_G(r1) = gpr2l < 0 ? -gpr2l : gpr2l;
regs->psw.cc = (S64)regs->GR_G(r1) == 0 ? 0 : 2;
@@ -2902,7 +2902,7 @@
RRE(inst, execflag, regs, r1, r2);
/* Load negative value of second operand and set cc */
- (S64)regs->GR_G(r1) = (S64)regs->GR_G(r2) > 0 ?
+ regs->GR_G(r1) = (S64)regs->GR_G(r2) > 0 ?
-((S64)regs->GR_G(r2)) :
(S64)regs->GR_G(r2);
@@ -2926,7 +2926,7 @@
gpr2l = (S32)regs->GR_L(r2);
/* Load negative value of second operand and set cc */
- (S64)regs->GR_G(r1) = gpr2l > 0 ? -gpr2l : gpr2l;
+ regs->GR_G(r1) = gpr2l > 0 ? -gpr2l : gpr2l;
regs->psw.cc = (S64)regs->GR_G(r1) == 0 ? 0 : 1;
@@ -2965,7 +2965,7 @@
RRE(inst, execflag, regs, r1, r2);
/* Copy second operand and set condition code */
- (S64)regs->GR_G(r1) = (S32)regs->GR_L(r2);
+ regs->GR_G(r1) = (S32)regs->GR_L(r2);
regs->psw.cc = (S64)regs->GR_G(r1) < 0 ? 1 :
(S64)regs->GR_G(r1) > 0 ? 2 : 0;
@@ -2995,7 +2995,7 @@
}
/* Load complement of second operand and set condition code */
- (S64)regs->GR_G(r1) = -((S64)regs->GR_G(r2));
+ regs->GR_G(r1) = -((S64)regs->GR_G(r2));
regs->psw.cc = (S64)regs->GR_G(r1) < 0 ? 1 :
(S64)regs->GR_G(r1) > 0 ? 2 : 0;
@@ -3018,7 +3018,7 @@
gpr2l = (S32)regs->GR_L(r2);
/* Load complement of second operand and set condition code */
- (S64)regs->GR_G(r1) = -gpr2l;
+ regs->GR_G(r1) = -gpr2l;
regs->psw.cc = (S64)regs->GR_G(r1) < 0 ? 1 :
(S64)regs->GR_G(r1) > 0 ? 2 : 0;
@@ -3383,7 +3383,7 @@
n = effective_addr2 & 0x3F;
/* Copy and shift the signed value of the R3 register */
- (S64)regs->GR_G(r1) = (n > 62) ?
+ regs->GR_G(r1) = (n > 62) ?
((S64)regs->GR_G(r3) < 0 ? -1LL : 0) :
(S64)regs->GR_G(r3) >> n;
@@ -3412,7 +3412,7 @@
n = ARCH_DEP(vfetch4) ( effective_addr2, b2, regs );
/* Multiply signed operands ignoring overflow */
- (S64)regs->GR_G(r1) *= (S32)n;
+ regs->GR_G(r1) = (S64)regs->GR_G(r1) * (S32)n;
} /* end DEF_INST(multiply_single_long_fullword) */
#endif /*defined(FEATURE_ESAME)*/
@@ -3435,7 +3435,7 @@
n = ARCH_DEP(vfetch8) ( effective_addr2, b2, regs );
/* Multiply signed operands ignoring overflow */
- (S64)regs->GR_G(r1) *= (S64)n;
+ regs->GR_G(r1) = (S64)regs->GR_G(r1) * (S64)n;
} /* end DEF_INST(multiply_single_long) */
#endif /*defined(FEATURE_ESAME)*/
@@ -3452,7 +3452,7 @@
RRE(inst, execflag, regs, r1, r2);
/* Multiply signed registers ignoring overflow */
- (S64)regs->GR_G(r1) *= (S32)regs->GR_L(r2);
+ regs->GR_G(r1) = (S64)regs->GR_G(r1) * (S32)regs->GR_L(r2);
} /* end DEF_INST(multiply_single_long_fullword_register) */
#endif /*defined(FEATURE_ESAME)*/
@@ -3469,7 +3469,7 @@
RRE(inst, execflag, regs, r1, r2);
/* Multiply signed registers ignoring overflow */
- (S64)regs->GR_G(r1) *= (S64)regs->GR_G(r2);
+ regs->GR_G(r1) = (S64)regs->GR_G(r1) * (S64)regs->GR_G(r2);
} /* end DEF_INST(multiply_single_long_register) */
#endif /*defined(FEATURE_ESAME)*/
@@ -3488,7 +3488,7 @@
RI(inst, execflag, regs, r1, opcd, i2);
/* Load operand into register */
- (S64)regs->GR_G(r1) = (S16)i2;
+ regs->GR_G(r1) = (S16)i2;
} /* end DEF_INST(load_long_halfword_immediate) */
#endif /*defined(FEATURE_ESAME)*/
@@ -3532,7 +3532,7 @@
RI(inst, execflag, regs, r1, opcd, i2);
/* Multiply register by operand ignoring overflow */
- (S64)regs->GR_G(r1) *= (S16)i2;
+ regs->GR_G(r1) = (S64)regs->GR_G(r1) * (S16)i2;
} /* end DEF_INST(multiply_long_halfword_immediate) */
#endif /*defined(FEATURE_ESAME)*/
@@ -3724,7 +3724,7 @@
RRE(inst, execflag, regs, r1, r2);
/* Copy second operand to first operand */
- (S64)regs->GR_G(r1) = (S32)regs->GR_L(r2);
+ regs->GR_G(r1) = (S32)regs->GR_L(r2);
} /* end DEF_INST(load_long_fullword_register) */
#endif /*defined(FEATURE_ESAME)*/
@@ -4356,7 +4356,7 @@
RXE(inst, execflag, regs, r1, b2, effective_addr2);
/* Load R1 register from second operand */
- (S64)regs->GR_G(r1) = (S32)ARCH_DEP(vfetch4) ( effective_addr2, b2, regs );
+ regs->GR_G(r1) = (S32)ARCH_DEP(vfetch4) ( effective_addr2, b2, regs );
} /* end DEF_INST(load_long_fullword) */
#endif /*defined(FEATURE_ESAME)*/
@@ -4375,7 +4375,7 @@
RXE(inst, execflag, regs, r1, b2, effective_addr2);
/* Load R1 register from second operand */
- (S64)regs->GR_G(r1) = (S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
+ regs->GR_G(r1) = (S16)ARCH_DEP(vfetch2) ( effective_addr2, b2, regs );
} /* end DEF_INST(load_long_halfword) */
#endif /*defined(FEATURE_ESAME)*/
@@ -4958,9 +4958,9 @@
len--;
/* Update the registers */
- GR_A(r1, regs) = addr1;
- GR_A(r1 + 1, regs) = len;
- GR_A(r2, regs) = addr2;
+ GR_A_COPY(addr1, r1, regs);
+ GR_A_COPY(len, r1 + 1, regs);
+ GR_A_COPY(addr2, r2, regs);
/* Set cc0 when all values have been processed */
regs->psw.cc = len ? 3 : 0;
@@ -5030,9 +5030,9 @@
len--;
/* Update the registers */
- GR_A(r1, regs) = addr1;
- GR_A(r1 + 1, regs) = len;
- GR_A(r2, regs) = addr2;
+ GR_A_COPY(addr1, r1, regs);
+ GR_A_COPY(len, r1 + 1, regs);
+ GR_A_COPY(addr2, r2, regs);
/* Set cc0 when all values have been processed */
regs->psw.cc = len ? 3 : 0;
@@ -5104,9 +5104,9 @@
len -= 2;
/* Update the registers */
- GR_A(r1, regs) = addr1;
- GR_A(r1 + 1, regs) = len;
- GR_A(r2, regs) = addr2;
+ GR_A_COPY(addr1, r1, regs);
+ GR_A_COPY(len, r1 + 1, regs);
+ GR_A_COPY(addr2, r2, regs);
/* Set cc0 when all values have been processed */
regs->psw.cc = len ? 3 : 0;
@@ -5177,9 +5177,9 @@
len -= 2;
/* Update the registers */
- GR_A(r1, regs) = addr1;
- GR_A(r1 + 1, regs) = len;
- GR_A(r2, regs) = addr2;
+ GR_A_COPY(addr1, r1, regs);
+ GR_A_COPY(len, r1 + 1, regs);
+ GR_A_COPY(addr2, r2, regs);
/* Set cc0 when all values have been processed */
regs->psw.cc = len ? 3 : 0;
@@ -5265,10 +5265,10 @@
len1 -= 2;
/* Update the registers */
- GR_A(r1, regs) = addr1;
- GR_A(r1 + 1, regs) = len1;
- GR_A(r3, regs) = addr3;
- GR_A(r3 + 1, regs) = len3;
+ GR_A_COPY(addr1, r1, regs);
+ GR_A_COPY(len1, r1 + 1, regs);
+ GR_A_COPY(addr3, r3, regs);
+ GR_A_COPY(len3, r3 + 1, regs);
} /* end for(i) */
@@ -5358,10 +5358,10 @@
} /* end for(i) */
/* Update the registers */
- GR_A(r1, regs) = addr1;
- GR_A(r1 + 1, regs) = len1;
- GR_A(r3, regs) = addr3;
- GR_A(r3 + 1, regs) = len3;
+ GR_A_COPY(addr1, r1, regs);
+ GR_A_COPY(len1, r1 + 1, regs);
+ GR_A_COPY(addr3, r3, regs);
+ GR_A_COPY(len3, r3 + 1, regs);
regs->psw.cc = cc;
Christoph
--
[EMAIL PROTECTED] | http://www.df7cb.de/
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