Hi, On Sat, Sep 06, 2025 at 03:20:58PM +0200, Tobias Frost wrote: > Hi Henrique, > > just wondering if you have found time to take a look a this already, > or if there is something I could help you with? > > On Thu, 31 Jul 2025 17:48:49 -0300 "Henrique de Moraes Holschuh" > <[email protected]> wrote: > > Hello Salvatore, > > > > I will look into it soon, but I am swamped with work so it could take > a week or two for me to upload anything . > > > > As far as I know, we cannot update much of the AMD fleet (computers > that did not get firmware updates to switch to the new microcode > signature track) anyway, so I will also need to check if this changed > somehow, etc. > > Maybe a stupid question, does that mean we cannot update the microcode > if the firmware (bios?) hasn't been updated?
The situation is complicated, thus you have not seen an update in any suite so far, so please make sure as well LTS and ELTS do not push updates before things happens top-down please. > Regarding the bits in the kernel source Salvatore mentioned above, does > that mean that a minimum kernel is required as well? Just to be clear, it is not a dependency thing. For the TSA mitigations simply both bits are necessary. All kernels 6.15.6, 6.12.37, 6.6.97, 6.1.144 and 5.10.240 onwards have the kernel side bits, so but the next bullseye-security upload from Ben for 5.10.y have the mitigations. OTOH the TSA issue affect only specific AMD CPUs, so the older suite you go back less relevant is actually the problem. Regards, Salvatore
