On 08/02/2026 13:03, Dirk Eddelbuettel wrote:
/tmp/ccTWsmvQ.s: Assembler messages:
/tmp/ccTWsmvQ.s:1735: Error: thumb conditional instruction should be in IT
block -- `addcs r9,r9,#65536'
/tmp/ccTWsmvQ.s:1750: Error: thumb conditional instruction should be in IT
block -- `addcs r8,r8,#65536'
/tmp/ccTWsmvQ.s:1785: Error: thumb conditional instruction should be in IT
block -- `addcs r8,r8,#65536'
/tmp/ccTWsmvQ.s:1817: Error: thumb conditional instruction should be in IT
block -- `addcs lr,lr,#65536'
32-bit arm cores can operate in two modes, "arm mode" and "thumb mode".
Debian armhf defaults to thumb mode, and it's architecture baseline includes
thumb version 2 (thumb2 for short).
"arm mode" uses 32-bit fixed-width instructions, while thumb2 uses a
mixed-width
encoding where some instructions are 16-bit and others are 32-bit. This
increases
code density on average, but there is a compromise, condition codes are
no longer
encoded directly in the instruction encoding, instead conditional
instructions must
be preceded by an "IT" instruction. One IT instruction can cover conditional
execution of up to four following instructions.
There is an assembler flag "-mimplicit-it=thumb", which makes the assembler
automatically insert IT instructions, this flag can be passed to the
assmebler
via the compiler using "-Wa,-mimplicit-it=thumb"
version 2.0a-16 of sprng passed this flag on armhf, version 2.0a-17 did not
because the conditional logic intended to pass it was broken.
