On 19 August 2016 11:26:55 BST, Leif Lindholm <leif.lindh...@linaro.org> wrote: >On Fri, Aug 19, 2016 at 02:04:07AM +0100, Ben Hutchings wrote: >> > > > So please enable CONFIG_ARM64_VA_BITS_48 for arm64 kernels. >> > > > >> > > > Note: this change _will_ cause breakage in certain userland >software >> > > > making non-portable assumptions about available of top address >bits >> > > > for pointer tagging - including luajit and mozilla-js (and >hence >> > > > everything using mozilla-js). >> [...] >> >> Could we possibly work around that by reducing >> CONFIG_ARCH_MMAP_RND_BITS_MAX? (That's not directly configurable; it >> requires patching arch/arm64/Kconfig.) > >I think this would be opening up a real can of worms. Not all sizes >are supported by the architecture, and only certain VA_BITS/pagesize >combinations work in the kernel. > >We could switch to 42-bit VA, but that would require switching to 64K >pagesize, which would be an even huger can.
I'm not suggesting using any unusual page table configuration. Just reducing the ASLR range that is currently implied by a 48-bit VA. Ben. >Proposed workarounds have included copying (in the stub) the kernel >and initrd to live closer together, but this still leaves potential >issues for (for example) ACPI tables. > >/ > Leif -- Sent from my Android phone with K-9 Mail. Please excuse my brevity.