On Wed, Apr 09, 2003 at 04:20:23PM +0200, Guido Guenther wrote: > The attached example is an atomic add and should give an illegal > instruction on mips1 CPUs for which we don't emulate ll/sc in the > kernel.
dec:~# ./llsctest 0xce9dae9f + 0x10101010 = 0xdeadbeaf dec:~# cat /proc/cpuinfo system type : Digital DECstation 5000/1xx processor : 0 cpu model : R3000A V3.0 FPU V4.0 BogoMIPS : 32.75 byteorder : little endian wait instruction : no microsecond timers : no tlb_entries : 64 extra interrupt vector : no hardware watchpoint : no VCED exceptions : not available VCEI exceptions : not available ll emulations : 1 sc emulations : 1 Yay! So .7 works. .6 did not. As expected I suppose. Excelent work! I can upgrade to testing or unstable now to play with new stuff. Len Sorensen
