> 02:0f.0 Class ffff: Apple Computer Inc. UniNorth GMAC (rev ff) > 00: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff > 10: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff > 20: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff > 30: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff > > Anything that might work? Is it toast? > >All 1's means the PCI device isn't driving the data/addr >lines for config space accesses. It looks bad >but I wonder how any correct PCI config information at >all is being obtained.
The chip return those values when it's clock is shut down (that is when it's power managed). The driver should bring it back up when the interface is up. Do you get sensible lspci values then ? If that doesn't work, look into pmac_feature.c for the core99_gmac_enable() function and hack it so that after enabling the cell clock, it waits a few ns, then write the bit again. I've spotted some code in darwin that suggests some revs of the uninorth ASIC may "miss" the write to this bit occasionally. Ben. -- To UNSUBSCRIBE, email to [EMAIL PROTECTED] with a subject of "unsubscribe". Trouble? Contact [EMAIL PROTECTED]
