Package: src:yosys Version: 0.15-1 Severity: minor Tags: sid bookworm User: [email protected] Usertags: ftbfs-lto
This package currently fails to build (at least on the amd64 architecture) with link time optimizations enabled. For a background for LTO please see https://wiki.debian.org/ToolChain/LTO The goal is to enable this optimization by default in an upcoming Debian release in dpkg-buildflags for 64bit architectures. The goal is to get this package to build with link time optimizations, or to explicitly disable link time optimizations for this package build. To reproduce the build failure, enable the lto optimization in testing/unstable by adding "optimize=+lto" to DEB_BUILD_MAINT_OPTIONS in the debian/rules file, or if this macro is unset, just set it: export DEB_BUILD_MAINT_OPTIONS = optimize=+lto Please try to fix the build with lto enabled, fixing the packaging or forwarding the issue upstream. If the issue cannot be fixed, explicitly disallow building the package with lto by adding to your rules file: export DEB_BUILD_MAINT_OPTIONS = optimize=-lto or adding that string to your existing setting of DEB_BUILD_MAINT_OPTIONS. The full build log can be found at: http://qa-logs.debian.net/2022/06/09/dpkglto/yosys_0.15-1_unstable_dpkglto.log The last lines of the build log are at the end of this report. [...] 16. Executing ABC pass (technology mapping using ABC). 16.1. Extracting gate netlist of module `\counter' to `<abc-temp-dir>/input.blif'.. Extracted 6 gates and 11 wires to a netlist network with 4 inputs and 2 outputs. 16.1.1. Executing ABC. Running ABC command: berkeley-abc -s -f <abc-temp-dir>/abc.script 2>&1 ABC: ABC command line: "source <abc-temp-dir>/abc.script". ABC: ABC: + read_blif <abc-temp-dir>/input.blif ABC: + read_lib -w <yosys-exe-dir>/manual/PRESENTATION_Intro/mycells.lib ABC: Parsing finished successfully. Parsing time = 0.00 sec ABC: Warning: Templates are not defined. ABC: Libery parser cannot read "time_unit". Assuming time_unit : "1ns". ABC: Libery parser cannot read "capacitive_load_unit". Assuming capacitive_load_unit(1, pf). ABC: Scl_LibertyReadGenlib() skipped sequential cell "DFF". ABC: Library "demo" from "<yosys-exe-dir>/manual/PRESENTATION_Intro/mycells.lib" has 4 cells (1 skipped: 1 seq; 0 tri-state; 0 no func; 0 dont_use). Time = 0.00 sec ABC: Memory = 0.00 MB. Time = 0.00 sec ABC: + strash ABC: + ifraig ABC: + scorr ABC: Warning: The network is combinational (run "fraig" or "fraig_sweep"). ABC: + dc2 ABC: + dretime ABC: + strash ABC: + &get -n ABC: + &dch -f ABC: + &nf ABC: + &put ABC: + write_blif <abc-temp-dir>/output.blif 16.1.2. Re-integrating ABC results. ABC RESULTS: NAND cells: 4 ABC RESULTS: NOR cells: 4 ABC RESULTS: NOT cells: 3 ABC RESULTS: internal signals: 5 ABC RESULTS: input signals: 4 ABC RESULTS: output signals: 2 Removing temp directory. Removed 0 unused cells and 10 unused wires. 17. Generating Graphviz representation of design. 17.1. Executing Verilog-2005 frontend: mycells.v Parsing Verilog input from `mycells.v' to AST representation. Generating RTLIL representation for module `\NOT'. Generating RTLIL representation for module `\NAND'. Generating RTLIL representation for module `\NOR'. Generating RTLIL representation for module `\DFF'. Successfully finished Verilog frontend. 17.2. Continuing show pass. Writing dot description to `counter_03.dot'. Dumping module counter to page 1. Exec: dot -Tpdf 'counter_03.dot' > 'counter_03.pdf.new' && mv 'counter_03.pdf.new' 'counter_03.pdf' End of script. Logfile hash: 3ebf0f4e86, CPU: user 0.11s system 0.01s, MEM: 12.60 MB peak Yosys 0.15 (git sha1 2156e20) Time spent: 43% 4x show (0 sec), 23% 1x abc (0 sec), ... make[3]: *** [Makefile:5: counter_00.pdf] Segmentation fault make[3]: *** Deleting file 'counter_00.pdf' make[3]: Leaving directory '/<<PKGBUILDDIR>>/manual/PRESENTATION_Intro' make[2]: *** [Makefile:905: manual] Error 2 make[2]: Leaving directory '/<<PKGBUILDDIR>>' dh_auto_build: error: make -j8 "INSTALL=install --strip-program=true" GIT_REV=2156e20 ABCEXTERNAL=berkeley-abc ABCPULL=0 STRIP=: all manual returned exit code 2 make[1]: *** [debian/rules:48: override_dh_auto_build-indep] Error 25 make[1]: Leaving directory '/<<PKGBUILDDIR>>' make: *** [debian/rules:22: binary] Error 2 dpkg-buildpackage: error: debian/rules binary subprocess returned exit status 2 -- debian-science-maintainers mailing list [email protected] https://alioth-lists.debian.net/cgi-bin/mailman/listinfo/debian-science-maintainers
