On 2022-07-28 09:15, Graham Inggs wrote: > On Wed, 27 Jul 2022 at 17:57, M. Zhou <[email protected]> wrote: >> The previous segfault on armel becomes Bus Error on armel and armhf. >> I can build it on Power9, but it seems that the test fails on power8 (our >> buildd). > > In #1003165, one of the arm porters wrote they are happy to look at > the bus errors, but the baseline issue should be fixed first.
FWIW, a few months ago, I looked at a core dump of this and documented the results here: https://github.com/scikit-learn/scikit-learn/issues/16443#issuecomment-671063747 Unless I'm misremembering something, the scikit-learn Cython code looks OK, so the problem probably stems from the code generated from that. It hat been suggested that some kind of unaligned access is produced. I stopped debugging there, as it's been a while since I've done low-level stuff like that. Best, Christian
