ChangeLog | 380 ++++++++++++++++++++++ debian/changelog | 49 ++ debian/control | 4 debian/patches/100_radeon-6.9.0-bgnr-enable.patch | 16 debian/patches/series | 1 debian/rules | 2 man/radeon.man | 46 +- src/ati.c | 1 src/ati.h | 1 src/ati_pciids_gen.h | 19 + src/atipciids.h | 1 src/atombios_output.c | 9 src/cayman_reg.h | 31 - src/drmmode_display.c | 5 src/evergreen_accel.c | 11 src/evergreen_exa.c | 149 +++++--- src/evergreen_reg.h | 31 - src/evergreen_state.h | 1 src/evergreen_textured_videofuncs.c | 2 src/pcidb/ati_pciids.csv | 19 + src/r600_exa.c | 164 ++++++--- src/r600_reg.h | 35 -- src/radeon.h | 74 ---- src/radeon_bios.c | 2 src/radeon_chipinfo_gen.h | 19 + src/radeon_chipset_gen.h | 19 + src/radeon_dri.c | 30 + src/radeon_dri2.c | 65 ++- src/radeon_driver.c | 10 src/radeon_exa.c | 3 src/radeon_exa_funcs.c | 16 src/radeon_kms.c | 22 - src/radeon_pci_chipset_gen.h | 19 + src/radeon_pci_device_match_gen.h | 19 + src/radeon_probe.c | 29 + src/radeon_probe.h | 66 +++ src/radeon_textured_video.c | 19 - src/radeon_video.c | 10 src/theatre.c | 4 39 files changed, 1080 insertions(+), 323 deletions(-)
New commits: commit b66beef73c5484910a7faf4bb67608ff4d7d83bd Author: Bryce Harrington <[email protected]> Date: Fri Feb 3 14:42:25 2012 -0800 Fix firmware Suggests diff --git a/debian/changelog b/debian/changelog index d742012..9b1696b 100644 --- a/debian/changelog +++ b/debian/changelog @@ -1,3 +1,11 @@ +xserver-xorg-video-ati (1:6.14.99~git20111219.aacbd629-0ubuntu2) precise; urgency=low + + * debian/control: Suggest linux-firmware rather than firmware-linux. + The latter is only in Debian. + (LP: #894693) + + -- Bryce Harrington <[email protected]> Fri, 03 Feb 2012 14:10:31 -0800 + xserver-xorg-video-ati (1:6.14.99~git20111219.aacbd629-0ubuntu1) precise; urgency=low * Merge from Debian. Remaining Ubuntu changes: diff --git a/debian/control b/debian/control index fa35738..1473912 100644 --- a/debian/control +++ b/debian/control @@ -80,7 +80,7 @@ Depends: ${misc:Depends}, ${xviddriver:Depends} Provides: ${xviddriver:Provides} -Suggests: firmware-linux +Suggests: linux-firmware Description: X.Org X server -- AMD/ATI Radeon display driver This package provides the 'radeon' driver for the AMD/ATI Radeon, FireGL, FireMV, FirePro and FireStream series. commit 89ab1db5ff6836d2dc278c8d8b2993793206702b Author: Christopher James Halse Rogers <[email protected]> Date: Mon Dec 19 19:08:03 2011 +1100 Merge new upstream version; drop plymouth patch merged upstream diff --git a/debian/changelog b/debian/changelog index 804ee77..d742012 100644 --- a/debian/changelog +++ b/debian/changelog @@ -1,3 +1,16 @@ +xserver-xorg-video-ati (1:6.14.99~git20111219.aacbd629-0ubuntu1) precise; urgency=low + + * Merge from Debian. Remaining Ubuntu changes: + - debian/rules: + - debian/radeon-kms.conf: + + Don't install modprobe rule for KMS; the Ubuntu kernel defaults to KMS. + * New upstream snapshot: + - More PCIIDs. + - Endianness fixes. + * Drop 100_radeon-6.9.0-bgnr-enable.patch; merged upstream. + + -- Christopher James Halse Rogers <[email protected]> Mon, 19 Dec 2011 18:57:23 +1100 + xserver-xorg-video-ati (1:6.14.99~git20110811.g93fc084-0ubuntu1) oneiric; urgency=low [ Christopher James Halse Rogers ] diff --git a/debian/patches/100_radeon-6.9.0-bgnr-enable.patch b/debian/patches/100_radeon-6.9.0-bgnr-enable.patch deleted file mode 100644 index 36f8179..0000000 --- a/debian/patches/100_radeon-6.9.0-bgnr-enable.patch +++ /dev/null @@ -1,16 +0,0 @@ -Index: xserver-xorg-video-ati/src/radeon_kms.c -=================================================================== ---- xserver-xorg-video-ati.orig/src/radeon_kms.c 2011-01-31 19:05:30.008994413 +1100 -+++ xserver-xorg-video-ati/src/radeon_kms.c 2011-01-31 19:18:22.550127483 +1100 -@@ -826,6 +826,11 @@ - int ret; - - pScrn->fbOffset = 0; -+#if GET_ABI_MAJOR(ABI_VIDEODRV_VERSION) >= 9 -+ pScreen->canDoBGNoneRoot = TRUE; -+#else -+ pScrn->canDoBGNoneRoot = TRUE; -+#endif - - miClearVisualTypes(); - if (!miSetVisualTypes(pScrn->depth, diff --git a/debian/patches/series b/debian/patches/series index ad73ef3..753712b 100644 --- a/debian/patches/series +++ b/debian/patches/series @@ -1,3 +1,2 @@ # placeholder -100_radeon-6.9.0-bgnr-enable.patch commit aacbd629b02cbee3f9e6a0ee452b4e3f21376bd3 Author: Alex Deucher <[email protected]> Date: Mon Dec 12 09:32:30 2011 -0500 radeon: add some new pci ids fixes: https://bugs.freedesktop.org/show_bug.cgi?id=43739 Signed-off-by: Alex Deucher <[email protected]> diff --git a/src/ati_pciids_gen.h b/src/ati_pciids_gen.h index 88f0c22..82da618 100644 --- a/src/ati_pciids_gen.h +++ b/src/ati_pciids_gen.h @@ -461,6 +461,8 @@ #define PCI_CHIP_SUMO_9647 0x9647 #define PCI_CHIP_SUMO_9648 0x9648 #define PCI_CHIP_SUMO_964A 0x964A +#define PCI_CHIP_SUMO_964B 0x964B +#define PCI_CHIP_SUMO_964C 0x964C #define PCI_CHIP_SUMO_964E 0x964E #define PCI_CHIP_SUMO_964F 0x964F #define PCI_CHIP_RS880_9710 0x9710 @@ -475,6 +477,8 @@ #define PCI_CHIP_PALM_9805 0x9805 #define PCI_CHIP_PALM_9806 0x9806 #define PCI_CHIP_PALM_9807 0x9807 +#define PCI_CHIP_PALM_9808 0x9808 +#define PCI_CHIP_PALM_9809 0x9809 #define PCI_CHIP_CYPRESS_6880 0x6880 #define PCI_CHIP_CYPRESS_6888 0x6888 #define PCI_CHIP_CYPRESS_6889 0x6889 @@ -516,6 +520,7 @@ #define PCI_CHIP_CEDAR_68F2 0x68F2 #define PCI_CHIP_CEDAR_68F8 0x68F8 #define PCI_CHIP_CEDAR_68F9 0x68F9 +#define PCI_CHIP_CEDAR_68FA 0x68FA #define PCI_CHIP_CEDAR_68FE 0x68FE #define PCI_CHIP_CAYMAN_6700 0x6700 #define PCI_CHIP_CAYMAN_6701 0x6701 @@ -556,8 +561,11 @@ #define PCI_CHIP_TURKS_6748 0x6748 #define PCI_CHIP_TURKS_6749 0x6749 #define PCI_CHIP_TURKS_6750 0x6750 +#define PCI_CHIP_TURKS_6751 0x6751 #define PCI_CHIP_TURKS_6758 0x6758 #define PCI_CHIP_TURKS_6759 0x6759 +#define PCI_CHIP_TURKS_675B 0x675B +#define PCI_CHIP_TURKS_675D 0x675D #define PCI_CHIP_TURKS_675F 0x675F #define PCI_CHIP_TURKS_6840 0x6840 #define PCI_CHIP_TURKS_6841 0x6841 @@ -577,5 +585,7 @@ #define PCI_CHIP_CAICOS_6767 0x6767 #define PCI_CHIP_CAICOS_6768 0x6768 #define PCI_CHIP_CAICOS_6770 0x6770 +#define PCI_CHIP_CAICOS_6772 0x6772 #define PCI_CHIP_CAICOS_6778 0x6778 #define PCI_CHIP_CAICOS_6779 0x6779 +#define PCI_CHIP_CAICOS_677B 0x677B diff --git a/src/pcidb/ati_pciids.csv b/src/pcidb/ati_pciids.csv index 44c3ecb..ad3959b 100644 --- a/src/pcidb/ati_pciids.csv +++ b/src/pcidb/ati_pciids.csv @@ -462,6 +462,8 @@ "0x9647","SUMO_9647","SUMO",1,1,,,1,"SUMO" "0x9648","SUMO_9648","SUMO",1,1,,,1,"SUMO" "0x964A","SUMO_964A","SUMO",,1,,,1,"SUMO" +"0x964B","SUMO_964B","SUMO",,1,,,1,"SUMO" +"0x964C","SUMO_964C","SUMO",,1,,,1,"SUMO" "0x964E","SUMO_964E","SUMO",1,1,,,1,"SUMO" "0x964F","SUMO_964F","SUMO",1,1,,,1,"SUMO" "0x9710","RS880_9710","RS880",,1,,,1,"ATI Radeon HD 4200" @@ -476,6 +478,8 @@ "0x9805","PALM_9805","PALM",,1,,,1,"AMD Radeon HD 6250 Graphics" "0x9806","PALM_9806","PALM",,1,,,1,"AMD Radeon HD 6300 Series Graphics" "0x9807","PALM_9807","PALM",,1,,,1,"AMD Radeon HD 6200 Series Graphics" +"0x9808","PALM_9808","PALM",,1,,,1,"PALM" +"0x9809","PALM_9809","PALM",,1,,,1,"PALM" "0x6880","CYPRESS_6880","CYPRESS",1,,,,,"CYPRESS" "0x6888","CYPRESS_6888","CYPRESS",,,,,,"ATI FirePro (FireGL) Graphics Adapter" "0x6889","CYPRESS_6889","CYPRESS",,,,,,"ATI FirePro (FireGL) Graphics Adapter" @@ -517,6 +521,7 @@ "0x68F2","CEDAR_68F2","CEDAR",,,,,,"ATI FirePro 2270" "0x68F8","CEDAR_68F8","CEDAR",,,,,,"CEDAR" "0x68F9","CEDAR_68F9","CEDAR",,,,,,"ATI Radeon HD 5450" +"0x68FA","CEDAR_68FA","CEDAR",,,,,,"CEDAR" "0x68FE","CEDAR_68FE","CEDAR",,,,,,"CEDAR" "0x6700","CAYMAN_6700","CAYMAN",,,,,,"CAYMAN" "0x6701","CAYMAN_6701","CAYMAN",,,,,,"CAYMAN" @@ -557,8 +562,11 @@ "0x6748","TURKS_6748","TURKS",,,,,,"TURKS" "0x6749","TURKS_6749","TURKS",,,,,,"TURKS" "0x6750","TURKS_6750","TURKS",,,,,,"TURKS" +"0x6751","TURKS_6751","TURKS",,,,,,"TURKS" "0x6758","TURKS_6758","TURKS",,,,,,"TURKS" "0x6759","TURKS_6759","TURKS",,,,,,"TURKS" +"0x675B","TURKS_675B","TURKS",,,,,,"TURKS" +"0x675D","TURKS_675D","TURKS",,,,,,"TURKS" "0x675F","TURKS_675F","TURKS",,,,,,"TURKS" "0x6840","TURKS_6840","TURKS",1,,,,,"TURKS" "0x6841","TURKS_6841","TURKS",1,,,,,"TURKS" @@ -578,5 +586,7 @@ "0x6767","CAICOS_6767","CAICOS",,,,,,"CAICOS" "0x6768","CAICOS_6768","CAICOS",,,,,,"CAICOS" "0x6770","CAICOS_6770","CAICOS",,,,,,"CAICOS" +"0x6772","CAICOS_6772","CAICOS",,,,,,"CAICOS" "0x6778","CAICOS_6778","CAICOS",,,,,,"CAICOS" "0x6779","CAICOS_6779","CAICOS",,,,,,"CAICOS" +"0x677B","CAICOS_677B","CAICOS",,,,,,"CAICOS" diff --git a/src/radeon_chipinfo_gen.h b/src/radeon_chipinfo_gen.h index 5511d7e..4ba84eb 100644 --- a/src/radeon_chipinfo_gen.h +++ b/src/radeon_chipinfo_gen.h @@ -381,6 +381,8 @@ static RADEONCardInfo RADEONCards[] = { { 0x9647, CHIP_FAMILY_SUMO, 1, 1, 0, 0, 1 }, { 0x9648, CHIP_FAMILY_SUMO, 1, 1, 0, 0, 1 }, { 0x964A, CHIP_FAMILY_SUMO, 0, 1, 0, 0, 1 }, + { 0x964B, CHIP_FAMILY_SUMO, 0, 1, 0, 0, 1 }, + { 0x964C, CHIP_FAMILY_SUMO, 0, 1, 0, 0, 1 }, { 0x964E, CHIP_FAMILY_SUMO, 1, 1, 0, 0, 1 }, { 0x964F, CHIP_FAMILY_SUMO, 1, 1, 0, 0, 1 }, { 0x9710, CHIP_FAMILY_RS880, 0, 1, 0, 0, 1 }, @@ -395,6 +397,8 @@ static RADEONCardInfo RADEONCards[] = { { 0x9805, CHIP_FAMILY_PALM, 0, 1, 0, 0, 1 }, { 0x9806, CHIP_FAMILY_PALM, 0, 1, 0, 0, 1 }, { 0x9807, CHIP_FAMILY_PALM, 0, 1, 0, 0, 1 }, + { 0x9808, CHIP_FAMILY_PALM, 0, 1, 0, 0, 1 }, + { 0x9809, CHIP_FAMILY_PALM, 0, 1, 0, 0, 1 }, { 0x6880, CHIP_FAMILY_CYPRESS, 1, 0, 0, 0, 0 }, { 0x6888, CHIP_FAMILY_CYPRESS, 0, 0, 0, 0, 0 }, { 0x6889, CHIP_FAMILY_CYPRESS, 0, 0, 0, 0, 0 }, @@ -436,6 +440,7 @@ static RADEONCardInfo RADEONCards[] = { { 0x68F2, CHIP_FAMILY_CEDAR, 0, 0, 0, 0, 0 }, { 0x68F8, CHIP_FAMILY_CEDAR, 0, 0, 0, 0, 0 }, { 0x68F9, CHIP_FAMILY_CEDAR, 0, 0, 0, 0, 0 }, + { 0x68FA, CHIP_FAMILY_CEDAR, 0, 0, 0, 0, 0 }, { 0x68FE, CHIP_FAMILY_CEDAR, 0, 0, 0, 0, 0 }, { 0x6700, CHIP_FAMILY_CAYMAN, 0, 0, 0, 0, 0 }, { 0x6701, CHIP_FAMILY_CAYMAN, 0, 0, 0, 0, 0 }, @@ -476,8 +481,11 @@ static RADEONCardInfo RADEONCards[] = { { 0x6748, CHIP_FAMILY_TURKS, 0, 0, 0, 0, 0 }, { 0x6749, CHIP_FAMILY_TURKS, 0, 0, 0, 0, 0 }, { 0x6750, CHIP_FAMILY_TURKS, 0, 0, 0, 0, 0 }, + { 0x6751, CHIP_FAMILY_TURKS, 0, 0, 0, 0, 0 }, { 0x6758, CHIP_FAMILY_TURKS, 0, 0, 0, 0, 0 }, { 0x6759, CHIP_FAMILY_TURKS, 0, 0, 0, 0, 0 }, + { 0x675B, CHIP_FAMILY_TURKS, 0, 0, 0, 0, 0 }, + { 0x675D, CHIP_FAMILY_TURKS, 0, 0, 0, 0, 0 }, { 0x675F, CHIP_FAMILY_TURKS, 0, 0, 0, 0, 0 }, { 0x6840, CHIP_FAMILY_TURKS, 1, 0, 0, 0, 0 }, { 0x6841, CHIP_FAMILY_TURKS, 1, 0, 0, 0, 0 }, @@ -497,6 +505,8 @@ static RADEONCardInfo RADEONCards[] = { { 0x6767, CHIP_FAMILY_CAICOS, 0, 0, 0, 0, 0 }, { 0x6768, CHIP_FAMILY_CAICOS, 0, 0, 0, 0, 0 }, { 0x6770, CHIP_FAMILY_CAICOS, 0, 0, 0, 0, 0 }, + { 0x6772, CHIP_FAMILY_CAICOS, 0, 0, 0, 0, 0 }, { 0x6778, CHIP_FAMILY_CAICOS, 0, 0, 0, 0, 0 }, { 0x6779, CHIP_FAMILY_CAICOS, 0, 0, 0, 0, 0 }, + { 0x677B, CHIP_FAMILY_CAICOS, 0, 0, 0, 0, 0 }, }; diff --git a/src/radeon_chipset_gen.h b/src/radeon_chipset_gen.h index ac2c0a8..8e567f9 100644 --- a/src/radeon_chipset_gen.h +++ b/src/radeon_chipset_gen.h @@ -381,6 +381,8 @@ static SymTabRec RADEONChipsets[] = { { PCI_CHIP_SUMO_9647, "SUMO" }, { PCI_CHIP_SUMO_9648, "SUMO" }, { PCI_CHIP_SUMO_964A, "SUMO" }, + { PCI_CHIP_SUMO_964B, "SUMO" }, + { PCI_CHIP_SUMO_964C, "SUMO" }, { PCI_CHIP_SUMO_964E, "SUMO" }, { PCI_CHIP_SUMO_964F, "SUMO" }, { PCI_CHIP_RS880_9710, "ATI Radeon HD 4200" }, @@ -395,6 +397,8 @@ static SymTabRec RADEONChipsets[] = { { PCI_CHIP_PALM_9805, "AMD Radeon HD 6250 Graphics" }, { PCI_CHIP_PALM_9806, "AMD Radeon HD 6300 Series Graphics" }, { PCI_CHIP_PALM_9807, "AMD Radeon HD 6200 Series Graphics" }, + { PCI_CHIP_PALM_9808, "PALM" }, + { PCI_CHIP_PALM_9809, "PALM" }, { PCI_CHIP_CYPRESS_6880, "CYPRESS" }, { PCI_CHIP_CYPRESS_6888, "ATI FirePro (FireGL) Graphics Adapter" }, { PCI_CHIP_CYPRESS_6889, "ATI FirePro (FireGL) Graphics Adapter" }, @@ -436,6 +440,7 @@ static SymTabRec RADEONChipsets[] = { { PCI_CHIP_CEDAR_68F2, "ATI FirePro 2270" }, { PCI_CHIP_CEDAR_68F8, "CEDAR" }, { PCI_CHIP_CEDAR_68F9, "ATI Radeon HD 5450" }, + { PCI_CHIP_CEDAR_68FA, "CEDAR" }, { PCI_CHIP_CEDAR_68FE, "CEDAR" }, { PCI_CHIP_CAYMAN_6700, "CAYMAN" }, { PCI_CHIP_CAYMAN_6701, "CAYMAN" }, @@ -476,8 +481,11 @@ static SymTabRec RADEONChipsets[] = { { PCI_CHIP_TURKS_6748, "TURKS" }, { PCI_CHIP_TURKS_6749, "TURKS" }, { PCI_CHIP_TURKS_6750, "TURKS" }, + { PCI_CHIP_TURKS_6751, "TURKS" }, { PCI_CHIP_TURKS_6758, "TURKS" }, { PCI_CHIP_TURKS_6759, "TURKS" }, + { PCI_CHIP_TURKS_675B, "TURKS" }, + { PCI_CHIP_TURKS_675D, "TURKS" }, { PCI_CHIP_TURKS_675F, "TURKS" }, { PCI_CHIP_TURKS_6840, "TURKS" }, { PCI_CHIP_TURKS_6841, "TURKS" }, @@ -497,7 +505,9 @@ static SymTabRec RADEONChipsets[] = { { PCI_CHIP_CAICOS_6767, "CAICOS" }, { PCI_CHIP_CAICOS_6768, "CAICOS" }, { PCI_CHIP_CAICOS_6770, "CAICOS" }, + { PCI_CHIP_CAICOS_6772, "CAICOS" }, { PCI_CHIP_CAICOS_6778, "CAICOS" }, { PCI_CHIP_CAICOS_6779, "CAICOS" }, + { PCI_CHIP_CAICOS_677B, "CAICOS" }, { -1, NULL } }; diff --git a/src/radeon_pci_chipset_gen.h b/src/radeon_pci_chipset_gen.h index 73e2dce..f271720 100644 --- a/src/radeon_pci_chipset_gen.h +++ b/src/radeon_pci_chipset_gen.h @@ -381,6 +381,8 @@ PciChipsets RADEONPciChipsets[] = { { PCI_CHIP_SUMO_9647, PCI_CHIP_SUMO_9647, RES_SHARED_VGA }, { PCI_CHIP_SUMO_9648, PCI_CHIP_SUMO_9648, RES_SHARED_VGA }, { PCI_CHIP_SUMO_964A, PCI_CHIP_SUMO_964A, RES_SHARED_VGA }, + { PCI_CHIP_SUMO_964B, PCI_CHIP_SUMO_964B, RES_SHARED_VGA }, + { PCI_CHIP_SUMO_964C, PCI_CHIP_SUMO_964C, RES_SHARED_VGA }, { PCI_CHIP_SUMO_964E, PCI_CHIP_SUMO_964E, RES_SHARED_VGA }, { PCI_CHIP_SUMO_964F, PCI_CHIP_SUMO_964F, RES_SHARED_VGA }, { PCI_CHIP_RS880_9710, PCI_CHIP_RS880_9710, RES_SHARED_VGA }, @@ -395,6 +397,8 @@ PciChipsets RADEONPciChipsets[] = { { PCI_CHIP_PALM_9805, PCI_CHIP_PALM_9805, RES_SHARED_VGA }, { PCI_CHIP_PALM_9806, PCI_CHIP_PALM_9806, RES_SHARED_VGA }, { PCI_CHIP_PALM_9807, PCI_CHIP_PALM_9807, RES_SHARED_VGA }, + { PCI_CHIP_PALM_9808, PCI_CHIP_PALM_9808, RES_SHARED_VGA }, + { PCI_CHIP_PALM_9809, PCI_CHIP_PALM_9809, RES_SHARED_VGA }, { PCI_CHIP_CYPRESS_6880, PCI_CHIP_CYPRESS_6880, RES_SHARED_VGA }, { PCI_CHIP_CYPRESS_6888, PCI_CHIP_CYPRESS_6888, RES_SHARED_VGA }, { PCI_CHIP_CYPRESS_6889, PCI_CHIP_CYPRESS_6889, RES_SHARED_VGA }, @@ -436,6 +440,7 @@ PciChipsets RADEONPciChipsets[] = { { PCI_CHIP_CEDAR_68F2, PCI_CHIP_CEDAR_68F2, RES_SHARED_VGA }, { PCI_CHIP_CEDAR_68F8, PCI_CHIP_CEDAR_68F8, RES_SHARED_VGA }, { PCI_CHIP_CEDAR_68F9, PCI_CHIP_CEDAR_68F9, RES_SHARED_VGA }, + { PCI_CHIP_CEDAR_68FA, PCI_CHIP_CEDAR_68FA, RES_SHARED_VGA }, { PCI_CHIP_CEDAR_68FE, PCI_CHIP_CEDAR_68FE, RES_SHARED_VGA }, { PCI_CHIP_CAYMAN_6700, PCI_CHIP_CAYMAN_6700, RES_SHARED_VGA }, { PCI_CHIP_CAYMAN_6701, PCI_CHIP_CAYMAN_6701, RES_SHARED_VGA }, @@ -476,8 +481,11 @@ PciChipsets RADEONPciChipsets[] = { { PCI_CHIP_TURKS_6748, PCI_CHIP_TURKS_6748, RES_SHARED_VGA }, { PCI_CHIP_TURKS_6749, PCI_CHIP_TURKS_6749, RES_SHARED_VGA }, { PCI_CHIP_TURKS_6750, PCI_CHIP_TURKS_6750, RES_SHARED_VGA }, + { PCI_CHIP_TURKS_6751, PCI_CHIP_TURKS_6751, RES_SHARED_VGA }, { PCI_CHIP_TURKS_6758, PCI_CHIP_TURKS_6758, RES_SHARED_VGA }, { PCI_CHIP_TURKS_6759, PCI_CHIP_TURKS_6759, RES_SHARED_VGA }, + { PCI_CHIP_TURKS_675B, PCI_CHIP_TURKS_675B, RES_SHARED_VGA }, + { PCI_CHIP_TURKS_675D, PCI_CHIP_TURKS_675D, RES_SHARED_VGA }, { PCI_CHIP_TURKS_675F, PCI_CHIP_TURKS_675F, RES_SHARED_VGA }, { PCI_CHIP_TURKS_6840, PCI_CHIP_TURKS_6840, RES_SHARED_VGA }, { PCI_CHIP_TURKS_6841, PCI_CHIP_TURKS_6841, RES_SHARED_VGA }, @@ -497,7 +505,9 @@ PciChipsets RADEONPciChipsets[] = { { PCI_CHIP_CAICOS_6767, PCI_CHIP_CAICOS_6767, RES_SHARED_VGA }, { PCI_CHIP_CAICOS_6768, PCI_CHIP_CAICOS_6768, RES_SHARED_VGA }, { PCI_CHIP_CAICOS_6770, PCI_CHIP_CAICOS_6770, RES_SHARED_VGA }, + { PCI_CHIP_CAICOS_6772, PCI_CHIP_CAICOS_6772, RES_SHARED_VGA }, { PCI_CHIP_CAICOS_6778, PCI_CHIP_CAICOS_6778, RES_SHARED_VGA }, { PCI_CHIP_CAICOS_6779, PCI_CHIP_CAICOS_6779, RES_SHARED_VGA }, + { PCI_CHIP_CAICOS_677B, PCI_CHIP_CAICOS_677B, RES_SHARED_VGA }, { -1, -1, RES_UNDEFINED } }; diff --git a/src/radeon_pci_device_match_gen.h b/src/radeon_pci_device_match_gen.h index 121b331..8867052 100644 --- a/src/radeon_pci_device_match_gen.h +++ b/src/radeon_pci_device_match_gen.h @@ -381,6 +381,8 @@ static const struct pci_id_match radeon_device_match[] = { ATI_DEVICE_MATCH( PCI_CHIP_SUMO_9647, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_SUMO_9648, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_SUMO_964A, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_SUMO_964B, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_SUMO_964C, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_SUMO_964E, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_SUMO_964F, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_RS880_9710, 0 ), @@ -395,6 +397,8 @@ static const struct pci_id_match radeon_device_match[] = { ATI_DEVICE_MATCH( PCI_CHIP_PALM_9805, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_PALM_9806, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_PALM_9807, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_PALM_9808, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_PALM_9809, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_CYPRESS_6880, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_CYPRESS_6888, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_CYPRESS_6889, 0 ), @@ -436,6 +440,7 @@ static const struct pci_id_match radeon_device_match[] = { ATI_DEVICE_MATCH( PCI_CHIP_CEDAR_68F2, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_CEDAR_68F8, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_CEDAR_68F9, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_CEDAR_68FA, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_CEDAR_68FE, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_CAYMAN_6700, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_CAYMAN_6701, 0 ), @@ -476,8 +481,11 @@ static const struct pci_id_match radeon_device_match[] = { ATI_DEVICE_MATCH( PCI_CHIP_TURKS_6748, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_TURKS_6749, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_TURKS_6750, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_TURKS_6751, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_TURKS_6758, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_TURKS_6759, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_TURKS_675B, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_TURKS_675D, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_TURKS_675F, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_TURKS_6840, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_TURKS_6841, 0 ), @@ -497,7 +505,9 @@ static const struct pci_id_match radeon_device_match[] = { ATI_DEVICE_MATCH( PCI_CHIP_CAICOS_6767, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_CAICOS_6768, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_CAICOS_6770, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_CAICOS_6772, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_CAICOS_6778, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_CAICOS_6779, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_CAICOS_677B, 0 ), { 0, 0, 0 } }; commit aac10a1cdfac8db5c757bb2da1c60b0973d025ad Author: Cyril Brulebois <[email protected]> Date: Sun Dec 11 12:14:33 2011 +0100 Upload to unstable. diff --git a/debian/changelog b/debian/changelog index d8c7ff2..a22f71b 100644 --- a/debian/changelog +++ b/debian/changelog @@ -1,9 +1,9 @@ -xserver-xorg-video-ati (1:6.14.3-2) UNRELEASED; urgency=low +xserver-xorg-video-ati (1:6.14.3-2) unstable; urgency=low * Fix xinerama by cherry-picking: - 82069bae6f: “fixup xinerama since 9151f3b1c2” (Closes: #649495). - -- Cyril Brulebois <[email protected]> Sun, 11 Dec 2011 12:11:47 +0100 + -- Cyril Brulebois <[email protected]> Sun, 11 Dec 2011 12:14:23 +0100 xserver-xorg-video-ati (1:6.14.3-1) unstable; urgency=low commit d87f563baef371badd8899fcfa9ae9ef1d719427 Author: Cyril Brulebois <[email protected]> Date: Sun Dec 11 12:14:17 2011 +0100 Fix xinerama by cherry-picking 82069bae6f (Closes: #649495). diff --git a/debian/changelog b/debian/changelog index 53dc805..d8c7ff2 100644 --- a/debian/changelog +++ b/debian/changelog @@ -1,3 +1,10 @@ +xserver-xorg-video-ati (1:6.14.3-2) UNRELEASED; urgency=low + + * Fix xinerama by cherry-picking: + - 82069bae6f: “fixup xinerama since 9151f3b1c2” (Closes: #649495). + + -- Cyril Brulebois <[email protected]> Sun, 11 Dec 2011 12:11:47 +0100 + xserver-xorg-video-ati (1:6.14.3-1) unstable; urgency=low * New upstream release. Some highlights follow: commit 82069bae6f4d390164f313eef63a1ce442b3904e Author: Dave Airlie <[email protected]> Date: Mon Nov 28 18:38:30 2011 +0000 fixup xinerama since 9151f3b1c2ebcc34e63195888ba696f2183ba5e2 since the driver would call RRFirstOutput without checking if randr has been enabled, and it would crash in privates code. reported by vereteran on #radeon Signed-off-by: Dave Airlie <[email protected]> Acked-on-irc-by: Michel Dänzer <[email protected]> (cherry picked from commit 3853c3020d05175ae180b9a188dec7c425bdd0b8) diff --git a/src/radeon_video.c b/src/radeon_video.c index 834f924..0e2c127 100644 --- a/src/radeon_video.c +++ b/src/radeon_video.c @@ -142,7 +142,7 @@ radeon_pick_best_crtc(ScrnInfoPtr pScrn, xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); int coverage, best_coverage, c; BoxRec box, crtc_box, cover_box; - RROutputPtr primary_output; + RROutputPtr primary_output = NULL; xf86CrtcPtr best_crtc = NULL, primary_crtc = NULL; box.x1 = x1; @@ -152,7 +152,9 @@ radeon_pick_best_crtc(ScrnInfoPtr pScrn, best_coverage = 0; /* Prefer the CRTC of the primary output */ - primary_output = RRFirstOutput(pScrn->pScreen); + if (dixPrivateKeyRegistered(rrPrivKey)) { + primary_output = RRFirstOutput(pScrn->pScreen); + } if (primary_output && primary_output->crtc) primary_crtc = primary_output->crtc->devPrivate; commit bc54e415e2fd344939c5c788ea0686133a7e2c69 Author: Dave Airlie <[email protected]> Date: Tue Dec 6 15:47:45 2011 +0000 radeon: add original radeon to always tiled. and actually enable it for M7, previous commit only did one function. Signed-off-by: Dave Airlie <[email protected]> diff --git a/src/radeon_dri2.c b/src/radeon_dri2.c index 5463791..52f2b82 100644 --- a/src/radeon_dri2.c +++ b/src/radeon_dri2.c @@ -121,7 +121,7 @@ radeon_dri2_create_buffers(DrawablePtr drawable, flags = RADEON_CREATE_PIXMAP_TILING_MICRO; else flags = RADEON_CREATE_PIXMAP_TILING_MACRO | RADEON_CREATE_PIXMAP_TILING_MICRO; - if (IS_R200_3D || info->ChipFamiy == CHIP_FAMILY_RV200) + if (IS_R200_3D || info->ChipFamily == CHIP_FAMILY_RV200 || info->ChipFamily == CHIP_FAMILY_RADEON) flags |= RADEON_CREATE_PIXMAP_DEPTH; break; case DRI2BufferDepthStencil: @@ -134,7 +134,7 @@ radeon_dri2_create_buffers(DrawablePtr drawable, need_enlarge = 1; } else flags = RADEON_CREATE_PIXMAP_TILING_MACRO | RADEON_CREATE_PIXMAP_TILING_MICRO; - if (IS_R200_3D || info->ChipFamily == CHIP_FAMILY_RV200) + if (IS_R200_3D || info->ChipFamily == CHIP_FAMILY_RV200 || info->ChipFamily == CHIP_FAMILY_RADEON) flags |= RADEON_CREATE_PIXMAP_DEPTH; break; case DRI2BufferBackLeft: @@ -275,7 +275,7 @@ radeon_dri2_create_buffer(DrawablePtr drawable, flags = RADEON_CREATE_PIXMAP_TILING_MICRO; else flags = RADEON_CREATE_PIXMAP_TILING_MACRO | RADEON_CREATE_PIXMAP_TILING_MICRO; - if (IS_R200_3D) + if (IS_R200_3D || info->ChipFamily == CHIP_FAMILY_RV200 || info->ChipFamily == CHIP_FAMILY_RADEON) flags |= RADEON_CREATE_PIXMAP_DEPTH; break; case DRI2BufferDepthStencil: @@ -288,7 +288,7 @@ radeon_dri2_create_buffer(DrawablePtr drawable, need_enlarge = 1; } else flags = RADEON_CREATE_PIXMAP_TILING_MACRO | RADEON_CREATE_PIXMAP_TILING_MICRO; - if (IS_R200_3D) + if (IS_R200_3D || info->ChipFamily == CHIP_FAMILY_RV200 || info->ChipFamily == CHIP_FAMILY_RADEON) flags |= RADEON_CREATE_PIXMAP_DEPTH; break; case DRI2BufferBackLeft: commit ba46c7b0cf72d157748981eb3224d5eefb6200aa Author: Dave Airlie <[email protected]> Date: Tue Dec 6 13:42:49 2011 +0000 radeon: refine always tiled depth check So it appears the M7 family always tiles its depth buffer also. Signed-off-by: Dave Airlie <[email protected]> diff --git a/src/radeon_dri2.c b/src/radeon_dri2.c index 9fd3658..5463791 100644 --- a/src/radeon_dri2.c +++ b/src/radeon_dri2.c @@ -121,7 +121,7 @@ radeon_dri2_create_buffers(DrawablePtr drawable, flags = RADEON_CREATE_PIXMAP_TILING_MICRO; else flags = RADEON_CREATE_PIXMAP_TILING_MACRO | RADEON_CREATE_PIXMAP_TILING_MICRO; - if (IS_R200_3D) + if (IS_R200_3D || info->ChipFamiy == CHIP_FAMILY_RV200) flags |= RADEON_CREATE_PIXMAP_DEPTH; break; case DRI2BufferDepthStencil: @@ -134,7 +134,7 @@ radeon_dri2_create_buffers(DrawablePtr drawable, need_enlarge = 1; } else flags = RADEON_CREATE_PIXMAP_TILING_MACRO | RADEON_CREATE_PIXMAP_TILING_MICRO; - if (IS_R200_3D) + if (IS_R200_3D || info->ChipFamily == CHIP_FAMILY_RV200) flags |= RADEON_CREATE_PIXMAP_DEPTH; break; case DRI2BufferBackLeft: diff --git a/src/radeon_exa.c b/src/radeon_exa.c index 95646ab..554af36 100644 --- a/src/radeon_exa.c +++ b/src/radeon_exa.c @@ -473,7 +473,7 @@ void *RADEONEXACreatePixmap2(ScreenPtr pScreen, int width, int height, if (usage_hint & RADEON_CREATE_PIXMAP_TILING_MICRO) tiling |= RADEON_TILING_MICRO; } - if ((usage_hint & RADEON_CREATE_PIXMAP_DEPTH) && IS_R200_3D) + if (usage_hint & RADEON_CREATE_PIXMAP_DEPTH) tiling |= RADEON_TILING_MACRO | RADEON_TILING_MICRO; } commit 98b2d5fe1722a43c4bbe7711ed7180a3fb65305f Author: Dave Airlie <[email protected]> Date: Mon Dec 5 18:44:28 2011 +0000 radeon: r200 depth buffers are always tiled When we do the allocations we need to make sure the always tiled nature is taken into account. Signed-off-by: Dave Airlie <[email protected]> diff --git a/src/radeon.h b/src/radeon.h index 34f6f53..91c7b62 100644 --- a/src/radeon.h +++ b/src/radeon.h @@ -1667,6 +1667,7 @@ static __inline__ int radeon_timedout(const struct timeval *endtime) enum { RADEON_CREATE_PIXMAP_TILING_MACRO = 0x10000000, RADEON_CREATE_PIXMAP_TILING_MICRO = 0x20000000, + RADEON_CREATE_PIXMAP_DEPTH = 0x40000000, /* for r200 */ }; #endif /* _RADEON_H_ */ diff --git a/src/radeon_dri2.c b/src/radeon_dri2.c index 8789d73..9fd3658 100644 --- a/src/radeon_dri2.c +++ b/src/radeon_dri2.c @@ -121,6 +121,8 @@ radeon_dri2_create_buffers(DrawablePtr drawable, flags = RADEON_CREATE_PIXMAP_TILING_MICRO; else flags = RADEON_CREATE_PIXMAP_TILING_MACRO | RADEON_CREATE_PIXMAP_TILING_MICRO; + if (IS_R200_3D) + flags |= RADEON_CREATE_PIXMAP_DEPTH; break; case DRI2BufferDepthStencil: if (info->ChipFamily >= CHIP_FAMILY_R600) { @@ -132,6 +134,8 @@ radeon_dri2_create_buffers(DrawablePtr drawable, need_enlarge = 1; } else flags = RADEON_CREATE_PIXMAP_TILING_MACRO | RADEON_CREATE_PIXMAP_TILING_MICRO; + if (IS_R200_3D) + flags |= RADEON_CREATE_PIXMAP_DEPTH; break; case DRI2BufferBackLeft: case DRI2BufferBackRight: @@ -271,6 +275,8 @@ radeon_dri2_create_buffer(DrawablePtr drawable, flags = RADEON_CREATE_PIXMAP_TILING_MICRO; else flags = RADEON_CREATE_PIXMAP_TILING_MACRO | RADEON_CREATE_PIXMAP_TILING_MICRO; + if (IS_R200_3D) + flags |= RADEON_CREATE_PIXMAP_DEPTH; break; case DRI2BufferDepthStencil: /* macro is the preferred setting, but the 2D detiling for software @@ -282,6 +288,8 @@ radeon_dri2_create_buffer(DrawablePtr drawable, need_enlarge = 1; } else flags = RADEON_CREATE_PIXMAP_TILING_MACRO | RADEON_CREATE_PIXMAP_TILING_MICRO; + if (IS_R200_3D) + flags |= RADEON_CREATE_PIXMAP_DEPTH; break; case DRI2BufferBackLeft: case DRI2BufferBackRight: diff --git a/src/radeon_exa.c b/src/radeon_exa.c index f3daec0..95646ab 100644 --- a/src/radeon_exa.c +++ b/src/radeon_exa.c @@ -473,6 +473,9 @@ void *RADEONEXACreatePixmap2(ScreenPtr pScreen, int width, int height, if (usage_hint & RADEON_CREATE_PIXMAP_TILING_MICRO) tiling |= RADEON_TILING_MICRO; } + if ((usage_hint & RADEON_CREATE_PIXMAP_DEPTH) && IS_R200_3D) + tiling |= RADEON_TILING_MACRO | RADEON_TILING_MICRO; + } /* Small pixmaps must not be macrotiled on R300, hw cannot sample them commit 7dcefc69d9fbceae27cd03083c815e01a19b527e Author: Alex Deucher <[email protected]> Date: Mon Dec 5 09:21:48 2011 -0500 Xv: Evergreen+ asics support 16k surfaces Signed-off-by: Alex Deucher <[email protected]> diff --git a/src/radeon_textured_video.c b/src/radeon_textured_video.c index e49575d..ff2bb9f 100644 --- a/src/radeon_textured_video.c +++ b/src/radeon_textured_video.c @@ -66,6 +66,9 @@ R600CopyToVRAM(ScrnInfoPtr pScrn, #define IMAGE_MAX_WIDTH_R600 8192 #define IMAGE_MAX_HEIGHT_R600 8192 +#define IMAGE_MAX_WIDTH_EG 16384 +#define IMAGE_MAX_HEIGHT_EG 16384 + static Bool RADEONTilingEnabled(ScrnInfoPtr pScrn, PixmapPtr pPix) { @@ -554,6 +557,16 @@ static XF86VideoEncodingRec DummyEncodingR600[1] = } }; +static XF86VideoEncodingRec DummyEncodingEG[1] = +{ + { + 0, + "XV_IMAGE", + IMAGE_MAX_WIDTH_EG, IMAGE_MAX_HEIGHT_EG, + {1, 1} + } +}; + #define NUM_FORMATS 3 static XF86VideoFormatRec Formats[NUM_FORMATS] = @@ -824,7 +837,9 @@ RADEONSetupImageTexturedVideo(ScreenPtr pScreen) adapt->flags = 0; adapt->name = "Radeon Textured Video"; adapt->nEncodings = 1; - if (IS_R600_3D) + if (IS_EVERGREEN_3D) + adapt->pEncodings = DummyEncodingEG; + else if (IS_R600_3D) adapt->pEncodings = DummyEncodingR600; else if (IS_R500_3D) adapt->pEncodings = DummyEncodingR500; commit 72e386d42516e7cd3c2cbf2fffc9174cd3ec8451 Author: Alex Deucher <[email protected]> Date: Wed Nov 30 19:38:35 2011 -0500 radeon: add some new pci ids Signed-off-by: Alex Deucher <[email protected]> diff --git a/src/ati_pciids_gen.h b/src/ati_pciids_gen.h index 1548569..88f0c22 100644 --- a/src/ati_pciids_gen.h +++ b/src/ati_pciids_gen.h @@ -559,6 +559,14 @@ #define PCI_CHIP_TURKS_6758 0x6758 #define PCI_CHIP_TURKS_6759 0x6759 #define PCI_CHIP_TURKS_675F 0x675F +#define PCI_CHIP_TURKS_6840 0x6840 +#define PCI_CHIP_TURKS_6841 0x6841 +#define PCI_CHIP_TURKS_6842 0x6842 +#define PCI_CHIP_TURKS_6843 0x6843 +#define PCI_CHIP_TURKS_6849 0x6849 +#define PCI_CHIP_TURKS_6850 0x6850 +#define PCI_CHIP_TURKS_6858 0x6858 +#define PCI_CHIP_TURKS_6859 0x6859 #define PCI_CHIP_CAICOS_6760 0x6760 #define PCI_CHIP_CAICOS_6761 0x6761 #define PCI_CHIP_CAICOS_6762 0x6762 diff --git a/src/pcidb/ati_pciids.csv b/src/pcidb/ati_pciids.csv index e8a3578..44c3ecb 100644 --- a/src/pcidb/ati_pciids.csv +++ b/src/pcidb/ati_pciids.csv @@ -560,6 +560,14 @@ "0x6758","TURKS_6758","TURKS",,,,,,"TURKS" "0x6759","TURKS_6759","TURKS",,,,,,"TURKS" "0x675F","TURKS_675F","TURKS",,,,,,"TURKS" +"0x6840","TURKS_6840","TURKS",1,,,,,"TURKS" +"0x6841","TURKS_6841","TURKS",1,,,,,"TURKS" +"0x6842","TURKS_6842","TURKS",1,,,,,"TURKS" +"0x6843","TURKS_6843","TURKS",1,,,,,"TURKS" +"0x6849","TURKS_6849","TURKS",,,,,,"TURKS" +"0x6850","TURKS_6850","TURKS",,,,,,"TURKS" +"0x6858","TURKS_6858","TURKS",,,,,,"TURKS" +"0x6859","TURKS_6859","TURKS",,,,,,"TURKS" "0x6760","CAICOS_6760","CAICOS",1,,,,,"CAICOS" "0x6761","CAICOS_6761","CAICOS",1,,,,,"CAICOS" "0x6762","CAICOS_6762","CAICOS",,,,,,"CAICOS" diff --git a/src/radeon_chipinfo_gen.h b/src/radeon_chipinfo_gen.h index 51a106b..5511d7e 100644 --- a/src/radeon_chipinfo_gen.h +++ b/src/radeon_chipinfo_gen.h @@ -479,6 +479,14 @@ static RADEONCardInfo RADEONCards[] = { { 0x6758, CHIP_FAMILY_TURKS, 0, 0, 0, 0, 0 }, { 0x6759, CHIP_FAMILY_TURKS, 0, 0, 0, 0, 0 }, { 0x675F, CHIP_FAMILY_TURKS, 0, 0, 0, 0, 0 }, + { 0x6840, CHIP_FAMILY_TURKS, 1, 0, 0, 0, 0 }, + { 0x6841, CHIP_FAMILY_TURKS, 1, 0, 0, 0, 0 }, + { 0x6842, CHIP_FAMILY_TURKS, 1, 0, 0, 0, 0 }, + { 0x6843, CHIP_FAMILY_TURKS, 1, 0, 0, 0, 0 }, + { 0x6849, CHIP_FAMILY_TURKS, 0, 0, 0, 0, 0 }, + { 0x6850, CHIP_FAMILY_TURKS, 0, 0, 0, 0, 0 }, + { 0x6858, CHIP_FAMILY_TURKS, 0, 0, 0, 0, 0 }, + { 0x6859, CHIP_FAMILY_TURKS, 0, 0, 0, 0, 0 }, { 0x6760, CHIP_FAMILY_CAICOS, 1, 0, 0, 0, 0 }, { 0x6761, CHIP_FAMILY_CAICOS, 1, 0, 0, 0, 0 }, { 0x6762, CHIP_FAMILY_CAICOS, 0, 0, 0, 0, 0 }, diff --git a/src/radeon_chipset_gen.h b/src/radeon_chipset_gen.h index 5228f06..ac2c0a8 100644 --- a/src/radeon_chipset_gen.h +++ b/src/radeon_chipset_gen.h @@ -479,6 +479,14 @@ static SymTabRec RADEONChipsets[] = { { PCI_CHIP_TURKS_6758, "TURKS" }, { PCI_CHIP_TURKS_6759, "TURKS" }, { PCI_CHIP_TURKS_675F, "TURKS" }, + { PCI_CHIP_TURKS_6840, "TURKS" }, + { PCI_CHIP_TURKS_6841, "TURKS" }, + { PCI_CHIP_TURKS_6842, "TURKS" }, + { PCI_CHIP_TURKS_6843, "TURKS" }, + { PCI_CHIP_TURKS_6849, "TURKS" }, + { PCI_CHIP_TURKS_6850, "TURKS" }, + { PCI_CHIP_TURKS_6858, "TURKS" }, + { PCI_CHIP_TURKS_6859, "TURKS" }, { PCI_CHIP_CAICOS_6760, "CAICOS" }, { PCI_CHIP_CAICOS_6761, "CAICOS" }, { PCI_CHIP_CAICOS_6762, "CAICOS" }, diff --git a/src/radeon_pci_chipset_gen.h b/src/radeon_pci_chipset_gen.h index 9af0c9c..73e2dce 100644 --- a/src/radeon_pci_chipset_gen.h +++ b/src/radeon_pci_chipset_gen.h @@ -479,6 +479,14 @@ PciChipsets RADEONPciChipsets[] = { { PCI_CHIP_TURKS_6758, PCI_CHIP_TURKS_6758, RES_SHARED_VGA }, { PCI_CHIP_TURKS_6759, PCI_CHIP_TURKS_6759, RES_SHARED_VGA }, { PCI_CHIP_TURKS_675F, PCI_CHIP_TURKS_675F, RES_SHARED_VGA }, + { PCI_CHIP_TURKS_6840, PCI_CHIP_TURKS_6840, RES_SHARED_VGA }, + { PCI_CHIP_TURKS_6841, PCI_CHIP_TURKS_6841, RES_SHARED_VGA }, + { PCI_CHIP_TURKS_6842, PCI_CHIP_TURKS_6842, RES_SHARED_VGA }, + { PCI_CHIP_TURKS_6843, PCI_CHIP_TURKS_6843, RES_SHARED_VGA }, + { PCI_CHIP_TURKS_6849, PCI_CHIP_TURKS_6849, RES_SHARED_VGA }, + { PCI_CHIP_TURKS_6850, PCI_CHIP_TURKS_6850, RES_SHARED_VGA }, + { PCI_CHIP_TURKS_6858, PCI_CHIP_TURKS_6858, RES_SHARED_VGA }, + { PCI_CHIP_TURKS_6859, PCI_CHIP_TURKS_6859, RES_SHARED_VGA }, { PCI_CHIP_CAICOS_6760, PCI_CHIP_CAICOS_6760, RES_SHARED_VGA }, { PCI_CHIP_CAICOS_6761, PCI_CHIP_CAICOS_6761, RES_SHARED_VGA }, { PCI_CHIP_CAICOS_6762, PCI_CHIP_CAICOS_6762, RES_SHARED_VGA }, diff --git a/src/radeon_pci_device_match_gen.h b/src/radeon_pci_device_match_gen.h index 0e018fa..121b331 100644 --- a/src/radeon_pci_device_match_gen.h +++ b/src/radeon_pci_device_match_gen.h @@ -479,6 +479,14 @@ static const struct pci_id_match radeon_device_match[] = { ATI_DEVICE_MATCH( PCI_CHIP_TURKS_6758, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_TURKS_6759, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_TURKS_675F, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_TURKS_6840, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_TURKS_6841, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_TURKS_6842, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_TURKS_6843, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_TURKS_6849, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_TURKS_6850, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_TURKS_6858, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_TURKS_6859, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_CAICOS_6760, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_CAICOS_6761, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_CAICOS_6762, 0 ), commit 3853c3020d05175ae180b9a188dec7c425bdd0b8 Author: Dave Airlie <[email protected]> Date: Mon Nov 28 18:38:30 2011 +0000 fixup xinerama since 9151f3b1c2ebcc34e63195888ba696f2183ba5e2 since the driver would call RRFirstOutput without checking if randr has been enabled, and it would crash in privates code. reported by vereteran on #radeon Signed-off-by: Dave Airlie <[email protected]> Acked-on-irc-by: Michel Dänzer <[email protected]> diff --git a/src/radeon_video.c b/src/radeon_video.c index 834f924..0e2c127 100644 --- a/src/radeon_video.c +++ b/src/radeon_video.c @@ -142,7 +142,7 @@ radeon_pick_best_crtc(ScrnInfoPtr pScrn, xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); int coverage, best_coverage, c; BoxRec box, crtc_box, cover_box; - RROutputPtr primary_output; + RROutputPtr primary_output = NULL; xf86CrtcPtr best_crtc = NULL, primary_crtc = NULL; box.x1 = x1; @@ -152,7 +152,9 @@ radeon_pick_best_crtc(ScrnInfoPtr pScrn, best_coverage = 0; /* Prefer the CRTC of the primary output */ - primary_output = RRFirstOutput(pScrn->pScreen); + if (dixPrivateKeyRegistered(rrPrivKey)) { + primary_output = RRFirstOutput(pScrn->pScreen); + } if (primary_output && primary_output->crtc) primary_crtc = primary_output->crtc->devPrivate; commit d669c34f140c000f88c4b4e464e44e6c8694f581 Author: Benjamin Herrenschmidt <[email protected]> Date: Mon Nov 21 11:35:40 2011 +1100 ddx/evergreen: Fix endian of ALU constants The constants are written directly into a buffer object shared with the card and we "forget" to swap them. This patch fixes it by doing the swap in evergreen_set_alu_consts() in-place (ie, it modifies the buffer), which should be fine with the way we use it in the ddx. This makes everything work fine on my caicos card on a G5 including some quik tests with Xv, gnome3 shell, etc... Thanks a lot to Jerome Glisse for holding my hand through debugging that (and finding the actual bug). Signed-off-by: Benjamin Herrenschmidt <[email protected]> Signed-off-by: Alex Deucher <[email protected]> diff --git a/src/evergreen_accel.c b/src/evergreen_accel.c index 5c95e20..83320c8 100644 --- a/src/evergreen_accel.c +++ b/src/evergreen_accel.c @@ -479,6 +479,17 @@ evergreen_set_alu_consts(ScrnInfoPtr pScrn, const_config_t *const_conf, uint32_t if (size == 0) size = 1; +#if X_BYTE_ORDER == X_BIG_ENDIAN + { + uint32_t count = size << 4, *p = const_conf->cpu_ptr; + + while(count--) { + *p = cpu_to_le32(*p); + p++; + } + } +#endif + /* flush SQ cache */ evergreen_cp_set_surface_sync(pScrn, SH_ACTION_ENA_bit, const_conf->size_bytes, const_conf->const_addr, diff --git a/src/evergreen_exa.c b/src/evergreen_exa.c index 6becbb3..603d854 100644 --- a/src/evergreen_exa.c +++ b/src/evergreen_exa.c @@ -172,6 +172,7 @@ EVERGREENPrepareSolid(PixmapPtr pPix, int alu, Pixel pm, Pixel fg) ps_alu_consts = radeon_vbo_space(pScrn, &accel_state->cbuf, 256); ps_const_conf.bo = accel_state->cbuf.vb_bo; ps_const_conf.const_addr = accel_state->cbuf.vb_mc_addr + accel_state->cbuf.vb_offset; + ps_const_conf.cpu_ptr = (uint32_t *)(char *)ps_alu_consts; if (accel_state->dst_obj.bpp == 16) { r = (fg >> 11) & 0x1f; g = (fg >> 5) & 0x3f; @@ -1320,6 +1321,7 @@ static Bool EVERGREENPrepareComposite(int op, PicturePtr pSrcPicture, vs_const_conf.bo = accel_state->cbuf.vb_bo; vs_const_conf.const_addr = accel_state->cbuf.vb_mc_addr + accel_state->cbuf.vb_offset; + vs_const_conf.cpu_ptr = (uint32_t *)(char *)cbuf; EVERGREENXFormSetup(pSrcPicture, pSrc, 0, cbuf); if (pMask) EVERGREENXFormSetup(pMaskPicture, pMask, 1, cbuf); diff --git a/src/evergreen_state.h b/src/evergreen_state.h index 40fec22..5fd85f8 100644 --- a/src/evergreen_state.h +++ b/src/evergreen_state.h @@ -120,6 +120,7 @@ typedef struct { int size_bytes; uint64_t const_addr; struct radeon_bo *bo; + uint32_t *cpu_ptr; } const_config_t; -- To UNSUBSCRIBE, email to [email protected] with a subject of "unsubscribe". Trouble? Contact [email protected] Archive: http://lists.debian.org/[email protected]
