configure.ac | 8 +- man/amdgpu.man | 2 src/amdgpu_bo_helper.c | 48 +++++++++++----- src/amdgpu_bo_helper.h | 20 ++++++- src/amdgpu_chipinfo_gen.h | 108 +++++++++++++++++++++++++++++++++++++- src/amdgpu_chipset_gen.h | 108 +++++++++++++++++++++++++++++++++++++- src/amdgpu_dri2.c | 73 +++---------------------- src/amdgpu_glamor.c | 80 +++++++++++++++++++++++++++- src/amdgpu_glamor.h | 1 src/amdgpu_glamor_wrappers.c | 18 ------ src/amdgpu_kms.c | 42 +++++++++----- src/amdgpu_pci_chipset_gen.h | 108 +++++++++++++++++++++++++++++++++++++- src/amdgpu_pci_device_match_gen.h | 108 +++++++++++++++++++++++++++++++++++++- src/amdgpu_pixmap.h | 2 src/amdgpu_probe.h | 6 ++ src/ati_pciids_gen.h | 108 +++++++++++++++++++++++++++++++++++++- src/drmmode_display.c | 57 ++++++++++++++++---- src/pcidb/ati_pciids.csv | 108 +++++++++++++++++++++++++++++++++++++- 18 files changed, 861 insertions(+), 144 deletions(-)
New commits: commit 6eb2b507d9ec8dcde2482a5ebf59c001933e10ea Author: Michel Dänzer <michel.daen...@amd.com> Date: Wed Sep 14 18:26:50 2016 +0900 Bump version for the 1.1.1 release diff --git a/configure.ac b/configure.ac index 9d646f1..ed45aaa 100644 --- a/configure.ac +++ b/configure.ac @@ -23,7 +23,7 @@ # Initialize Autoconf AC_PREREQ([2.60]) AC_INIT([xf86-video-amdgpu], - [1.1.0], + [1.1.1], [https://bugs.freedesktop.org/enter_bug.cgi?product=xorg], [xf86-video-amdgpu]) commit 8761c46babe0ec01da784dd27db3dd9e769acbca Author: Michel Dänzer <michel.daen...@amd.com> Date: Thu Sep 15 15:28:12 2016 +0900 Use --with-xorg-conf-dir=$prefix/share/X11/xorg.conf.d by default We were using the result of `pkg-config --variable=sysconfigdir xorg-server` before, which may not be inside $prefix, so make install might fail for 10-amdgpu.conf . Fixes make distcheck in that case, and possibly also 10-amdgpu.conf seemingly missing from some distribution packages. This matches what some (though not all) input drivers are doing for their xorg.conf.d snippets. (Cherry picked from commit cd3acb75718dfd42dd25d58b4e7bd4db27b659d8) diff --git a/configure.ac b/configure.ac index 824467d..9d646f1 100644 --- a/configure.ac +++ b/configure.ac @@ -89,9 +89,9 @@ PKG_CHECK_EXISTS([xorg-server >= 1.16], [sysconfigdir=""]) AC_ARG_WITH(xorg-conf-dir, AS_HELP_STRING([--with-xorg-conf-dir=DIR], - [Default xorg.conf.d directory [[default=from $PKG_CONFIG xorg-server]]]), - [configdir="$withval"], - [configdir="$sysconfigdir"]) + [Default xorg.conf.d directory [[default=$prefix/share/X11/xorg.conf.d/]]]), + [xorgconfdir="$withval"], + [xorgconfdir="$prefix/share/X11/xorg.conf.d"]) AC_SUBST(configdir) AM_CONDITIONAL(HAS_XORG_CONF_DIR, [test "x$sysconfigdir" != "x"]) commit ca1cf24d4eb773f7380c0da3fa942a5c85074422 Author: Marek Olšák <marek.ol...@amd.com> Date: Wed Sep 14 17:30:19 2016 +0900 Fix cursor size for SI Reviewed-by: Michel Dänzer <michel.daen...@amd.com> Acked-by: Edward O'Callaghan <funfunc...@folklore1984.net> (Cherry picked from commit c4364520691d18961f0a6b77071baeeffaa80a11) diff --git a/src/amdgpu_kms.c b/src/amdgpu_kms.c index 9c1d16a..23e275d 100644 --- a/src/amdgpu_kms.c +++ b/src/amdgpu_kms.c @@ -939,8 +939,14 @@ Bool AMDGPUPreInit_KMS(ScrnInfoPtr pScrn, int flags) else pAMDGPUEnt->HasCRTC2 = TRUE; - info->cursor_w = CURSOR_WIDTH_CIK; - info->cursor_h = CURSOR_HEIGHT_CIK; + if (info->ChipFamily >= CHIP_FAMILY_TAHITI && + info->ChipFamily <= CHIP_FAMILY_HAINAN) { + info->cursor_w = CURSOR_WIDTH; + info->cursor_h = CURSOR_HEIGHT; + } else { + info->cursor_w = CURSOR_WIDTH_CIK; + info->cursor_h = CURSOR_HEIGHT_CIK; + } amdgpu_query_heap_size(pAMDGPUEnt->pDev, AMDGPU_GEM_DOMAIN_GTT, &heap_size, &max_allocation); commit ca84c49c88235e1909d11e192eada816b782f041 Author: Ronie Salgado <ronies...@gmail.com> Date: Wed Sep 14 17:30:30 2016 +0900 Add SI PCI IDs Reviewed-by: Michel Dänzer <michel.daen...@amd.com> (Cherry picked from commit 2eb5d77b841e55e7328df4b95c0d41fec30ce10f) diff --git a/man/amdgpu.man b/man/amdgpu.man index 0100400..4d96866 100644 --- a/man/amdgpu.man +++ b/man/amdgpu.man @@ -29,7 +29,7 @@ RandR support up to version 1.4; .SH SUPPORTED HARDWARE The .B amdgpu -driver supports CI and newer families' video cards. +driver supports SI and newer families' video cards. .PD .SH CONFIGURATION DETAILS Please refer to __xconfigfile__(__filemansuffix__) for general configuration diff --git a/src/amdgpu_chipinfo_gen.h b/src/amdgpu_chipinfo_gen.h index 1eec8a8..90b13bb 100644 --- a/src/amdgpu_chipinfo_gen.h +++ b/src/amdgpu_chipinfo_gen.h @@ -1,5 +1,78 @@ /* This file is autogenerated please do not edit */ static AMDGPUCardInfo AMDGPUCards[] = { + { 0x6600, CHIP_FAMILY_OLAND }, + { 0x6601, CHIP_FAMILY_OLAND }, + { 0x6602, CHIP_FAMILY_OLAND }, + { 0x6603, CHIP_FAMILY_OLAND }, + { 0x6604, CHIP_FAMILY_OLAND }, + { 0x6605, CHIP_FAMILY_OLAND }, + { 0x6606, CHIP_FAMILY_OLAND }, + { 0x6607, CHIP_FAMILY_OLAND }, + { 0x6608, CHIP_FAMILY_OLAND }, + { 0x6610, CHIP_FAMILY_OLAND }, + { 0x6611, CHIP_FAMILY_OLAND }, + { 0x6613, CHIP_FAMILY_OLAND }, + { 0x6617, CHIP_FAMILY_OLAND }, + { 0x6620, CHIP_FAMILY_OLAND }, + { 0x6621, CHIP_FAMILY_OLAND }, + { 0x6623, CHIP_FAMILY_OLAND }, + { 0x6631, CHIP_FAMILY_OLAND }, + { 0x6660, CHIP_FAMILY_HAINAN }, + { 0x6663, CHIP_FAMILY_HAINAN }, + { 0x6664, CHIP_FAMILY_HAINAN }, + { 0x6665, CHIP_FAMILY_HAINAN }, + { 0x6667, CHIP_FAMILY_HAINAN }, + { 0x666F, CHIP_FAMILY_HAINAN }, + { 0x6780, CHIP_FAMILY_TAHITI }, + { 0x6784, CHIP_FAMILY_TAHITI }, + { 0x6788, CHIP_FAMILY_TAHITI }, + { 0x678A, CHIP_FAMILY_TAHITI }, + { 0x6790, CHIP_FAMILY_TAHITI }, + { 0x6791, CHIP_FAMILY_TAHITI }, + { 0x6792, CHIP_FAMILY_TAHITI }, + { 0x6798, CHIP_FAMILY_TAHITI }, + { 0x6799, CHIP_FAMILY_TAHITI }, + { 0x679A, CHIP_FAMILY_TAHITI }, + { 0x679B, CHIP_FAMILY_TAHITI }, + { 0x679E, CHIP_FAMILY_TAHITI }, + { 0x679F, CHIP_FAMILY_TAHITI }, + { 0x6800, CHIP_FAMILY_PITCAIRN }, + { 0x6801, CHIP_FAMILY_PITCAIRN }, + { 0x6802, CHIP_FAMILY_PITCAIRN }, + { 0x6806, CHIP_FAMILY_PITCAIRN }, + { 0x6808, CHIP_FAMILY_PITCAIRN }, + { 0x6809, CHIP_FAMILY_PITCAIRN }, + { 0x6810, CHIP_FAMILY_PITCAIRN }, + { 0x6811, CHIP_FAMILY_PITCAIRN }, + { 0x6816, CHIP_FAMILY_PITCAIRN }, + { 0x6817, CHIP_FAMILY_PITCAIRN }, + { 0x6818, CHIP_FAMILY_PITCAIRN }, + { 0x6819, CHIP_FAMILY_PITCAIRN }, + { 0x6820, CHIP_FAMILY_VERDE }, + { 0x6821, CHIP_FAMILY_VERDE }, + { 0x6822, CHIP_FAMILY_VERDE }, + { 0x6823, CHIP_FAMILY_VERDE }, + { 0x6824, CHIP_FAMILY_VERDE }, + { 0x6825, CHIP_FAMILY_VERDE }, + { 0x6826, CHIP_FAMILY_VERDE }, + { 0x6827, CHIP_FAMILY_VERDE }, + { 0x6828, CHIP_FAMILY_VERDE }, + { 0x6829, CHIP_FAMILY_VERDE }, + { 0x682A, CHIP_FAMILY_VERDE }, + { 0x682B, CHIP_FAMILY_VERDE }, + { 0x682C, CHIP_FAMILY_VERDE }, + { 0x682D, CHIP_FAMILY_VERDE }, + { 0x682F, CHIP_FAMILY_VERDE }, + { 0x6830, CHIP_FAMILY_VERDE }, + { 0x6831, CHIP_FAMILY_VERDE }, + { 0x6835, CHIP_FAMILY_VERDE }, + { 0x6837, CHIP_FAMILY_VERDE }, + { 0x6838, CHIP_FAMILY_VERDE }, + { 0x6839, CHIP_FAMILY_VERDE }, + { 0x683B, CHIP_FAMILY_VERDE }, + { 0x683D, CHIP_FAMILY_VERDE }, + { 0x683F, CHIP_FAMILY_VERDE }, + { 0x684C, CHIP_FAMILY_PITCAIRN }, { 0x6640, CHIP_FAMILY_BONAIRE }, { 0x6641, CHIP_FAMILY_BONAIRE }, { 0x6646, CHIP_FAMILY_BONAIRE }, diff --git a/src/amdgpu_chipset_gen.h b/src/amdgpu_chipset_gen.h index d33de19..30e5d24 100644 --- a/src/amdgpu_chipset_gen.h +++ b/src/amdgpu_chipset_gen.h @@ -1,5 +1,78 @@ /* This file is autogenerated please do not edit */ SymTabRec AMDGPUChipsets[] = { + { PCI_CHIP_OLAND_6600, "OLAND" }, + { PCI_CHIP_OLAND_6601, "OLAND" }, + { PCI_CHIP_OLAND_6602, "OLAND" }, + { PCI_CHIP_OLAND_6603, "OLAND" }, + { PCI_CHIP_OLAND_6604, "OLAND" }, + { PCI_CHIP_OLAND_6605, "OLAND" }, + { PCI_CHIP_OLAND_6606, "OLAND" }, + { PCI_CHIP_OLAND_6607, "OLAND" }, + { PCI_CHIP_OLAND_6608, "OLAND" }, + { PCI_CHIP_OLAND_6610, "OLAND" }, + { PCI_CHIP_OLAND_6611, "OLAND" }, + { PCI_CHIP_OLAND_6613, "OLAND" }, + { PCI_CHIP_OLAND_6617, "OLAND" }, + { PCI_CHIP_OLAND_6620, "OLAND" }, + { PCI_CHIP_OLAND_6621, "OLAND" }, + { PCI_CHIP_OLAND_6623, "OLAND" }, + { PCI_CHIP_OLAND_6631, "OLAND" }, + { PCI_CHIP_HAINAN_6660, "HAINAN" }, + { PCI_CHIP_HAINAN_6663, "HAINAN" }, + { PCI_CHIP_HAINAN_6664, "HAINAN" }, + { PCI_CHIP_HAINAN_6665, "HAINAN" }, + { PCI_CHIP_HAINAN_6667, "HAINAN" }, + { PCI_CHIP_HAINAN_666F, "HAINAN" }, + { PCI_CHIP_TAHITI_6780, "TAHITI" }, + { PCI_CHIP_TAHITI_6784, "TAHITI" }, + { PCI_CHIP_TAHITI_6788, "TAHITI" }, + { PCI_CHIP_TAHITI_678A, "TAHITI" }, + { PCI_CHIP_TAHITI_6790, "TAHITI" }, + { PCI_CHIP_TAHITI_6791, "TAHITI" }, + { PCI_CHIP_TAHITI_6792, "TAHITI" }, + { PCI_CHIP_TAHITI_6798, "TAHITI" }, + { PCI_CHIP_TAHITI_6799, "TAHITI" }, + { PCI_CHIP_TAHITI_679A, "TAHITI" }, + { PCI_CHIP_TAHITI_679B, "TAHITI" }, + { PCI_CHIP_TAHITI_679E, "TAHITI" }, + { PCI_CHIP_TAHITI_679F, "TAHITI" }, + { PCI_CHIP_PITCAIRN_6800, "PITCAIRN" }, + { PCI_CHIP_PITCAIRN_6801, "PITCAIRN" }, + { PCI_CHIP_PITCAIRN_6802, "PITCAIRN" }, + { PCI_CHIP_PITCAIRN_6806, "PITCAIRN" }, + { PCI_CHIP_PITCAIRN_6808, "PITCAIRN" }, + { PCI_CHIP_PITCAIRN_6809, "PITCAIRN" }, + { PCI_CHIP_PITCAIRN_6810, "PITCAIRN" }, + { PCI_CHIP_PITCAIRN_6811, "PITCAIRN" }, + { PCI_CHIP_PITCAIRN_6816, "PITCAIRN" }, + { PCI_CHIP_PITCAIRN_6817, "PITCAIRN" }, + { PCI_CHIP_PITCAIRN_6818, "PITCAIRN" }, + { PCI_CHIP_PITCAIRN_6819, "PITCAIRN" }, + { PCI_CHIP_VERDE_6820, "VERDE" }, + { PCI_CHIP_VERDE_6821, "VERDE" }, + { PCI_CHIP_VERDE_6822, "VERDE" }, + { PCI_CHIP_VERDE_6823, "VERDE" }, + { PCI_CHIP_VERDE_6824, "VERDE" }, + { PCI_CHIP_VERDE_6825, "VERDE" }, + { PCI_CHIP_VERDE_6826, "VERDE" }, + { PCI_CHIP_VERDE_6827, "VERDE" }, + { PCI_CHIP_VERDE_6828, "VERDE" }, + { PCI_CHIP_VERDE_6829, "VERDE" }, + { PCI_CHIP_VERDE_682A, "VERDE" }, + { PCI_CHIP_VERDE_682B, "VERDE" }, + { PCI_CHIP_VERDE_682C, "VERDE" }, + { PCI_CHIP_VERDE_682D, "VERDE" }, + { PCI_CHIP_VERDE_682F, "VERDE" }, + { PCI_CHIP_VERDE_6830, "VERDE" }, + { PCI_CHIP_VERDE_6831, "VERDE" }, + { PCI_CHIP_VERDE_6835, "VERDE" }, + { PCI_CHIP_VERDE_6837, "VERDE" }, + { PCI_CHIP_VERDE_6838, "VERDE" }, + { PCI_CHIP_VERDE_6839, "VERDE" }, + { PCI_CHIP_VERDE_683B, "VERDE" }, + { PCI_CHIP_VERDE_683D, "VERDE" }, + { PCI_CHIP_VERDE_683F, "VERDE" }, + { PCI_CHIP_PITCAIRN_684C, "PITCAIRN" }, { PCI_CHIP_BONAIRE_6640, "BONAIRE" }, { PCI_CHIP_BONAIRE_6641, "BONAIRE" }, { PCI_CHIP_BONAIRE_6646, "BONAIRE" }, diff --git a/src/amdgpu_pci_chipset_gen.h b/src/amdgpu_pci_chipset_gen.h index 6e7a979..3d54a02 100644 --- a/src/amdgpu_pci_chipset_gen.h +++ b/src/amdgpu_pci_chipset_gen.h @@ -1,5 +1,78 @@ /* This file is autogenerated please do not edit */ static PciChipsets AMDGPUPciChipsets[] = { + { PCI_CHIP_OLAND_6600, PCI_CHIP_OLAND_6600, RES_SHARED_VGA }, + { PCI_CHIP_OLAND_6601, PCI_CHIP_OLAND_6601, RES_SHARED_VGA }, + { PCI_CHIP_OLAND_6602, PCI_CHIP_OLAND_6602, RES_SHARED_VGA }, + { PCI_CHIP_OLAND_6603, PCI_CHIP_OLAND_6603, RES_SHARED_VGA }, + { PCI_CHIP_OLAND_6604, PCI_CHIP_OLAND_6604, RES_SHARED_VGA }, + { PCI_CHIP_OLAND_6605, PCI_CHIP_OLAND_6605, RES_SHARED_VGA }, + { PCI_CHIP_OLAND_6606, PCI_CHIP_OLAND_6606, RES_SHARED_VGA }, + { PCI_CHIP_OLAND_6607, PCI_CHIP_OLAND_6607, RES_SHARED_VGA }, + { PCI_CHIP_OLAND_6608, PCI_CHIP_OLAND_6608, RES_SHARED_VGA }, + { PCI_CHIP_OLAND_6610, PCI_CHIP_OLAND_6610, RES_SHARED_VGA }, + { PCI_CHIP_OLAND_6611, PCI_CHIP_OLAND_6611, RES_SHARED_VGA }, + { PCI_CHIP_OLAND_6613, PCI_CHIP_OLAND_6613, RES_SHARED_VGA }, + { PCI_CHIP_OLAND_6617, PCI_CHIP_OLAND_6617, RES_SHARED_VGA }, + { PCI_CHIP_OLAND_6620, PCI_CHIP_OLAND_6620, RES_SHARED_VGA }, + { PCI_CHIP_OLAND_6621, PCI_CHIP_OLAND_6621, RES_SHARED_VGA }, + { PCI_CHIP_OLAND_6623, PCI_CHIP_OLAND_6623, RES_SHARED_VGA }, + { PCI_CHIP_OLAND_6631, PCI_CHIP_OLAND_6631, RES_SHARED_VGA }, + { PCI_CHIP_HAINAN_6660, PCI_CHIP_HAINAN_6660, RES_SHARED_VGA }, + { PCI_CHIP_HAINAN_6663, PCI_CHIP_HAINAN_6663, RES_SHARED_VGA }, + { PCI_CHIP_HAINAN_6664, PCI_CHIP_HAINAN_6664, RES_SHARED_VGA }, + { PCI_CHIP_HAINAN_6665, PCI_CHIP_HAINAN_6665, RES_SHARED_VGA }, + { PCI_CHIP_HAINAN_6667, PCI_CHIP_HAINAN_6667, RES_SHARED_VGA }, + { PCI_CHIP_HAINAN_666F, PCI_CHIP_HAINAN_666F, RES_SHARED_VGA }, + { PCI_CHIP_TAHITI_6780, PCI_CHIP_TAHITI_6780, RES_SHARED_VGA }, + { PCI_CHIP_TAHITI_6784, PCI_CHIP_TAHITI_6784, RES_SHARED_VGA }, + { PCI_CHIP_TAHITI_6788, PCI_CHIP_TAHITI_6788, RES_SHARED_VGA }, + { PCI_CHIP_TAHITI_678A, PCI_CHIP_TAHITI_678A, RES_SHARED_VGA }, + { PCI_CHIP_TAHITI_6790, PCI_CHIP_TAHITI_6790, RES_SHARED_VGA }, + { PCI_CHIP_TAHITI_6791, PCI_CHIP_TAHITI_6791, RES_SHARED_VGA }, + { PCI_CHIP_TAHITI_6792, PCI_CHIP_TAHITI_6792, RES_SHARED_VGA }, + { PCI_CHIP_TAHITI_6798, PCI_CHIP_TAHITI_6798, RES_SHARED_VGA }, + { PCI_CHIP_TAHITI_6799, PCI_CHIP_TAHITI_6799, RES_SHARED_VGA }, + { PCI_CHIP_TAHITI_679A, PCI_CHIP_TAHITI_679A, RES_SHARED_VGA }, + { PCI_CHIP_TAHITI_679B, PCI_CHIP_TAHITI_679B, RES_SHARED_VGA }, + { PCI_CHIP_TAHITI_679E, PCI_CHIP_TAHITI_679E, RES_SHARED_VGA }, + { PCI_CHIP_TAHITI_679F, PCI_CHIP_TAHITI_679F, RES_SHARED_VGA }, + { PCI_CHIP_PITCAIRN_6800, PCI_CHIP_PITCAIRN_6800, RES_SHARED_VGA }, + { PCI_CHIP_PITCAIRN_6801, PCI_CHIP_PITCAIRN_6801, RES_SHARED_VGA }, + { PCI_CHIP_PITCAIRN_6802, PCI_CHIP_PITCAIRN_6802, RES_SHARED_VGA }, + { PCI_CHIP_PITCAIRN_6806, PCI_CHIP_PITCAIRN_6806, RES_SHARED_VGA }, + { PCI_CHIP_PITCAIRN_6808, PCI_CHIP_PITCAIRN_6808, RES_SHARED_VGA }, + { PCI_CHIP_PITCAIRN_6809, PCI_CHIP_PITCAIRN_6809, RES_SHARED_VGA }, + { PCI_CHIP_PITCAIRN_6810, PCI_CHIP_PITCAIRN_6810, RES_SHARED_VGA }, + { PCI_CHIP_PITCAIRN_6811, PCI_CHIP_PITCAIRN_6811, RES_SHARED_VGA }, + { PCI_CHIP_PITCAIRN_6816, PCI_CHIP_PITCAIRN_6816, RES_SHARED_VGA }, + { PCI_CHIP_PITCAIRN_6817, PCI_CHIP_PITCAIRN_6817, RES_SHARED_VGA }, + { PCI_CHIP_PITCAIRN_6818, PCI_CHIP_PITCAIRN_6818, RES_SHARED_VGA }, + { PCI_CHIP_PITCAIRN_6819, PCI_CHIP_PITCAIRN_6819, RES_SHARED_VGA }, + { PCI_CHIP_VERDE_6820, PCI_CHIP_VERDE_6820, RES_SHARED_VGA }, + { PCI_CHIP_VERDE_6821, PCI_CHIP_VERDE_6821, RES_SHARED_VGA }, + { PCI_CHIP_VERDE_6822, PCI_CHIP_VERDE_6822, RES_SHARED_VGA }, + { PCI_CHIP_VERDE_6823, PCI_CHIP_VERDE_6823, RES_SHARED_VGA }, + { PCI_CHIP_VERDE_6824, PCI_CHIP_VERDE_6824, RES_SHARED_VGA }, + { PCI_CHIP_VERDE_6825, PCI_CHIP_VERDE_6825, RES_SHARED_VGA }, + { PCI_CHIP_VERDE_6826, PCI_CHIP_VERDE_6826, RES_SHARED_VGA }, + { PCI_CHIP_VERDE_6827, PCI_CHIP_VERDE_6827, RES_SHARED_VGA }, + { PCI_CHIP_VERDE_6828, PCI_CHIP_VERDE_6828, RES_SHARED_VGA }, + { PCI_CHIP_VERDE_6829, PCI_CHIP_VERDE_6829, RES_SHARED_VGA }, + { PCI_CHIP_VERDE_682A, PCI_CHIP_VERDE_682A, RES_SHARED_VGA }, + { PCI_CHIP_VERDE_682B, PCI_CHIP_VERDE_682B, RES_SHARED_VGA }, + { PCI_CHIP_VERDE_682C, PCI_CHIP_VERDE_682C, RES_SHARED_VGA }, + { PCI_CHIP_VERDE_682D, PCI_CHIP_VERDE_682D, RES_SHARED_VGA }, + { PCI_CHIP_VERDE_682F, PCI_CHIP_VERDE_682F, RES_SHARED_VGA }, + { PCI_CHIP_VERDE_6830, PCI_CHIP_VERDE_6830, RES_SHARED_VGA }, + { PCI_CHIP_VERDE_6831, PCI_CHIP_VERDE_6831, RES_SHARED_VGA }, + { PCI_CHIP_VERDE_6835, PCI_CHIP_VERDE_6835, RES_SHARED_VGA }, + { PCI_CHIP_VERDE_6837, PCI_CHIP_VERDE_6837, RES_SHARED_VGA }, + { PCI_CHIP_VERDE_6838, PCI_CHIP_VERDE_6838, RES_SHARED_VGA }, + { PCI_CHIP_VERDE_6839, PCI_CHIP_VERDE_6839, RES_SHARED_VGA }, + { PCI_CHIP_VERDE_683B, PCI_CHIP_VERDE_683B, RES_SHARED_VGA }, + { PCI_CHIP_VERDE_683D, PCI_CHIP_VERDE_683D, RES_SHARED_VGA }, + { PCI_CHIP_VERDE_683F, PCI_CHIP_VERDE_683F, RES_SHARED_VGA }, + { PCI_CHIP_PITCAIRN_684C, PCI_CHIP_PITCAIRN_684C, RES_SHARED_VGA }, { PCI_CHIP_BONAIRE_6640, PCI_CHIP_BONAIRE_6640, RES_SHARED_VGA }, { PCI_CHIP_BONAIRE_6641, PCI_CHIP_BONAIRE_6641, RES_SHARED_VGA }, { PCI_CHIP_BONAIRE_6646, PCI_CHIP_BONAIRE_6646, RES_SHARED_VGA }, diff --git a/src/amdgpu_pci_device_match_gen.h b/src/amdgpu_pci_device_match_gen.h index 1f2e044..721397c 100644 --- a/src/amdgpu_pci_device_match_gen.h +++ b/src/amdgpu_pci_device_match_gen.h @@ -1,5 +1,78 @@ /* This file is autogenerated please do not edit */ static const struct pci_id_match amdgpu_device_match[] = { + ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6600, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6601, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6602, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6603, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6604, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6605, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6606, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6607, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6608, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6610, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6611, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6613, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6617, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6620, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6621, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6623, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_OLAND_6631, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_HAINAN_6660, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_HAINAN_6663, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_HAINAN_6664, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_HAINAN_6665, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_HAINAN_6667, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_HAINAN_666F, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_TAHITI_6780, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_TAHITI_6784, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_TAHITI_6788, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_TAHITI_678A, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_TAHITI_6790, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_TAHITI_6791, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_TAHITI_6792, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_TAHITI_6798, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_TAHITI_6799, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_TAHITI_679A, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_TAHITI_679B, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_TAHITI_679E, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_TAHITI_679F, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_PITCAIRN_6800, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_PITCAIRN_6801, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_PITCAIRN_6802, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_PITCAIRN_6806, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_PITCAIRN_6808, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_PITCAIRN_6809, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_PITCAIRN_6810, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_PITCAIRN_6811, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_PITCAIRN_6816, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_PITCAIRN_6817, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_PITCAIRN_6818, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_PITCAIRN_6819, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_VERDE_6820, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_VERDE_6821, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_VERDE_6822, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_VERDE_6823, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_VERDE_6824, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_VERDE_6825, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_VERDE_6826, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_VERDE_6827, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_VERDE_6828, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_VERDE_6829, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_VERDE_682A, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_VERDE_682B, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_VERDE_682C, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_VERDE_682D, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_VERDE_682F, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_VERDE_6830, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_VERDE_6831, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_VERDE_6835, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_VERDE_6837, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_VERDE_6838, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_VERDE_6839, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_VERDE_683B, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_VERDE_683D, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_VERDE_683F, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_PITCAIRN_684C, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_BONAIRE_6640, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_BONAIRE_6641, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_BONAIRE_6646, 0 ), diff --git a/src/amdgpu_probe.h b/src/amdgpu_probe.h index df10874..e6af3a2 100644 --- a/src/amdgpu_probe.h +++ b/src/amdgpu_probe.h @@ -58,6 +58,11 @@ typedef enum { CHIP_FAMILY_UNKNOW, CHIP_FAMILY_LEGACY, CHIP_FAMILY_AMDGPU, + CHIP_FAMILY_TAHITI, + CHIP_FAMILY_PITCAIRN, + CHIP_FAMILY_VERDE, + CHIP_FAMILY_OLAND, + CHIP_FAMILY_HAINAN, CHIP_FAMILY_BONAIRE, CHIP_FAMILY_KAVERI, CHIP_FAMILY_KABINI, diff --git a/src/ati_pciids_gen.h b/src/ati_pciids_gen.h index 96c3295..08fd12c 100644 --- a/src/ati_pciids_gen.h +++ b/src/ati_pciids_gen.h @@ -1,3 +1,76 @@ +#define PCI_CHIP_OLAND_6600 0x6600 +#define PCI_CHIP_OLAND_6601 0x6601 +#define PCI_CHIP_OLAND_6602 0x6602 +#define PCI_CHIP_OLAND_6603 0x6603 +#define PCI_CHIP_OLAND_6604 0x6604 +#define PCI_CHIP_OLAND_6605 0x6605 +#define PCI_CHIP_OLAND_6606 0x6606 +#define PCI_CHIP_OLAND_6607 0x6607 +#define PCI_CHIP_OLAND_6608 0x6608 +#define PCI_CHIP_OLAND_6610 0x6610 +#define PCI_CHIP_OLAND_6611 0x6611 +#define PCI_CHIP_OLAND_6613 0x6613 +#define PCI_CHIP_OLAND_6617 0x6617 +#define PCI_CHIP_OLAND_6620 0x6620 +#define PCI_CHIP_OLAND_6621 0x6621 +#define PCI_CHIP_OLAND_6623 0x6623 +#define PCI_CHIP_OLAND_6631 0x6631 +#define PCI_CHIP_HAINAN_6660 0x6660 +#define PCI_CHIP_HAINAN_6663 0x6663 +#define PCI_CHIP_HAINAN_6664 0x6664 +#define PCI_CHIP_HAINAN_6665 0x6665 +#define PCI_CHIP_HAINAN_6667 0x6667 +#define PCI_CHIP_HAINAN_666F 0x666F +#define PCI_CHIP_TAHITI_6780 0x6780 +#define PCI_CHIP_TAHITI_6784 0x6784 +#define PCI_CHIP_TAHITI_6788 0x6788 +#define PCI_CHIP_TAHITI_678A 0x678A +#define PCI_CHIP_TAHITI_6790 0x6790 +#define PCI_CHIP_TAHITI_6791 0x6791 +#define PCI_CHIP_TAHITI_6792 0x6792 +#define PCI_CHIP_TAHITI_6798 0x6798 +#define PCI_CHIP_TAHITI_6799 0x6799 +#define PCI_CHIP_TAHITI_679A 0x679A +#define PCI_CHIP_TAHITI_679B 0x679B +#define PCI_CHIP_TAHITI_679E 0x679E +#define PCI_CHIP_TAHITI_679F 0x679F +#define PCI_CHIP_PITCAIRN_6800 0x6800 +#define PCI_CHIP_PITCAIRN_6801 0x6801 +#define PCI_CHIP_PITCAIRN_6802 0x6802 +#define PCI_CHIP_PITCAIRN_6806 0x6806 +#define PCI_CHIP_PITCAIRN_6808 0x6808 +#define PCI_CHIP_PITCAIRN_6809 0x6809 +#define PCI_CHIP_PITCAIRN_6810 0x6810 +#define PCI_CHIP_PITCAIRN_6811 0x6811 +#define PCI_CHIP_PITCAIRN_6816 0x6816 +#define PCI_CHIP_PITCAIRN_6817 0x6817 +#define PCI_CHIP_PITCAIRN_6818 0x6818 +#define PCI_CHIP_PITCAIRN_6819 0x6819 +#define PCI_CHIP_VERDE_6820 0x6820 +#define PCI_CHIP_VERDE_6821 0x6821 +#define PCI_CHIP_VERDE_6822 0x6822 +#define PCI_CHIP_VERDE_6823 0x6823 +#define PCI_CHIP_VERDE_6824 0x6824 +#define PCI_CHIP_VERDE_6825 0x6825 +#define PCI_CHIP_VERDE_6826 0x6826 +#define PCI_CHIP_VERDE_6827 0x6827 +#define PCI_CHIP_VERDE_6828 0x6828 +#define PCI_CHIP_VERDE_6829 0x6829 +#define PCI_CHIP_VERDE_682A 0x682A +#define PCI_CHIP_VERDE_682B 0x682B +#define PCI_CHIP_VERDE_682C 0x682C +#define PCI_CHIP_VERDE_682D 0x682D +#define PCI_CHIP_VERDE_682F 0x682F +#define PCI_CHIP_VERDE_6830 0x6830 +#define PCI_CHIP_VERDE_6831 0x6831 +#define PCI_CHIP_VERDE_6835 0x6835 +#define PCI_CHIP_VERDE_6837 0x6837 +#define PCI_CHIP_VERDE_6838 0x6838 +#define PCI_CHIP_VERDE_6839 0x6839 +#define PCI_CHIP_VERDE_683B 0x683B +#define PCI_CHIP_VERDE_683D 0x683D +#define PCI_CHIP_VERDE_683F 0x683F +#define PCI_CHIP_PITCAIRN_684C 0x684C #define PCI_CHIP_BONAIRE_6640 0x6640 #define PCI_CHIP_BONAIRE_6641 0x6641 #define PCI_CHIP_BONAIRE_6646 0x6646 diff --git a/src/pcidb/ati_pciids.csv b/src/pcidb/ati_pciids.csv index 5c7a9a7..3c572bf 100644 --- a/src/pcidb/ati_pciids.csv +++ b/src/pcidb/ati_pciids.csv @@ -1,4 +1,77 @@ "#pciid","define","family","name" +"0x6600","OLAND_6600","OLAND","OLAND" +"0x6601","OLAND_6601","OLAND","OLAND" +"0x6602","OLAND_6602","OLAND","OLAND" +"0x6603","OLAND_6603","OLAND","OLAND" +"0x6604","OLAND_6604","OLAND","OLAND" +"0x6605","OLAND_6605","OLAND","OLAND" +"0x6606","OLAND_6606","OLAND","OLAND" +"0x6607","OLAND_6607","OLAND","OLAND" +"0x6608","OLAND_6608","OLAND","OLAND" +"0x6610","OLAND_6610","OLAND","OLAND" +"0x6611","OLAND_6611","OLAND","OLAND" +"0x6613","OLAND_6613","OLAND","OLAND" +"0x6617","OLAND_6617","OLAND","OLAND" +"0x6620","OLAND_6620","OLAND","OLAND" +"0x6621","OLAND_6621","OLAND","OLAND" +"0x6623","OLAND_6623","OLAND","OLAND" +"0x6631","OLAND_6631","OLAND","OLAND" +"0x6660","HAINAN_6660","HAINAN","HAINAN" +"0x6663","HAINAN_6663","HAINAN","HAINAN" +"0x6664","HAINAN_6664","HAINAN","HAINAN" +"0x6665","HAINAN_6665","HAINAN","HAINAN" +"0x6667","HAINAN_6667","HAINAN","HAINAN" +"0x666F","HAINAN_666F","HAINAN","HAINAN" +"0x6780","TAHITI_6780","TAHITI","TAHITI" +"0x6784","TAHITI_6784","TAHITI","TAHITI" +"0x6788","TAHITI_6788","TAHITI","TAHITI" +"0x678A","TAHITI_678A","TAHITI","TAHITI" +"0x6790","TAHITI_6790","TAHITI","TAHITI" +"0x6791","TAHITI_6791","TAHITI","TAHITI" +"0x6792","TAHITI_6792","TAHITI","TAHITI" +"0x6798","TAHITI_6798","TAHITI","TAHITI" +"0x6799","TAHITI_6799","TAHITI","TAHITI" +"0x679A","TAHITI_679A","TAHITI","TAHITI" +"0x679B","TAHITI_679B","TAHITI","TAHITI" +"0x679E","TAHITI_679E","TAHITI","TAHITI" +"0x679F","TAHITI_679F","TAHITI","TAHITI" +"0x6800","PITCAIRN_6800","PITCAIRN","PITCAIRN" +"0x6801","PITCAIRN_6801","PITCAIRN","PITCAIRN" +"0x6802","PITCAIRN_6802","PITCAIRN","PITCAIRN" +"0x6806","PITCAIRN_6806","PITCAIRN","PITCAIRN" +"0x6808","PITCAIRN_6808","PITCAIRN","PITCAIRN" +"0x6809","PITCAIRN_6809","PITCAIRN","PITCAIRN" +"0x6810","PITCAIRN_6810","PITCAIRN","PITCAIRN" +"0x6811","PITCAIRN_6811","PITCAIRN","PITCAIRN" +"0x6816","PITCAIRN_6816","PITCAIRN","PITCAIRN" +"0x6817","PITCAIRN_6817","PITCAIRN","PITCAIRN" +"0x6818","PITCAIRN_6818","PITCAIRN","PITCAIRN" +"0x6819","PITCAIRN_6819","PITCAIRN","PITCAIRN" +"0x6820","VERDE_6820","VERDE","VERDE" +"0x6821","VERDE_6821","VERDE","VERDE" +"0x6822","VERDE_6822","VERDE","VERDE" +"0x6823","VERDE_6823","VERDE","VERDE" +"0x6824","VERDE_6824","VERDE","VERDE" +"0x6825","VERDE_6825","VERDE","VERDE" +"0x6826","VERDE_6826","VERDE","VERDE" +"0x6827","VERDE_6827","VERDE","VERDE" +"0x6828","VERDE_6828","VERDE","VERDE" +"0x6829","VERDE_6829","VERDE","VERDE" +"0x682A","VERDE_682A","VERDE","VERDE" +"0x682B","VERDE_682B","VERDE","VERDE" +"0x682C","VERDE_682C","VERDE","VERDE" +"0x682D","VERDE_682D","VERDE","VERDE" +"0x682F","VERDE_682F","VERDE","VERDE" +"0x6830","VERDE_6830","VERDE","VERDE" +"0x6831","VERDE_6831","VERDE","VERDE" +"0x6835","VERDE_6835","VERDE","VERDE" +"0x6837","VERDE_6837","VERDE","VERDE" +"0x6838","VERDE_6838","VERDE","VERDE" +"0x6839","VERDE_6839","VERDE","VERDE" +"0x683B","VERDE_683B","VERDE","VERDE" +"0x683D","VERDE_683D","VERDE","VERDE" +"0x683F","VERDE_683F","VERDE","VERDE" +"0x684C","PITCAIRN_684C","PITCAIRN","PITCAIRN" "0x6640","BONAIRE_6640","BONAIRE","BONAIRE" "0x6641","BONAIRE_6641","BONAIRE","BONAIRE" "0x6646","BONAIRE_6646","BONAIRE","BONAIRE" commit e80321016f7cab9d46f83b785d576d7f02e680ed Author: Michel Dänzer <michel.daen...@amd.com> Date: Wed Sep 14 17:20:28 2016 +0900 Add missing Kaveri PCI ID (1318) Found by comparing src/pcidb/ati_pciids.csv with xf86-video-ati. Reviewed-by: Alex Deucher <alexander.deuc...@amd.com> (Cherry picked from commit 7d050d15d49ef25e86e7abe88dafb52370715640) diff --git a/src/amdgpu_chipinfo_gen.h b/src/amdgpu_chipinfo_gen.h index 3d3d6cd..1eec8a8 100644 --- a/src/amdgpu_chipinfo_gen.h +++ b/src/amdgpu_chipinfo_gen.h @@ -61,6 +61,7 @@ static AMDGPUCardInfo AMDGPUCards[] = { { 0x1315, CHIP_FAMILY_KAVERI }, { 0x1316, CHIP_FAMILY_KAVERI }, { 0x1317, CHIP_FAMILY_KAVERI }, + { 0x1318, CHIP_FAMILY_KAVERI }, { 0x131B, CHIP_FAMILY_KAVERI }, { 0x131C, CHIP_FAMILY_KAVERI }, { 0x131D, CHIP_FAMILY_KAVERI }, diff --git a/src/amdgpu_chipset_gen.h b/src/amdgpu_chipset_gen.h index 80e5279..d33de19 100644 --- a/src/amdgpu_chipset_gen.h +++ b/src/amdgpu_chipset_gen.h @@ -61,6 +61,7 @@ SymTabRec AMDGPUChipsets[] = { { PCI_CHIP_KAVERI_1315, "KAVERI" }, { PCI_CHIP_KAVERI_1316, "KAVERI" }, { PCI_CHIP_KAVERI_1317, "KAVERI" }, + { PCI_CHIP_KAVERI_1318, "KAVERI" }, { PCI_CHIP_KAVERI_131B, "KAVERI" }, { PCI_CHIP_KAVERI_131C, "KAVERI" }, { PCI_CHIP_KAVERI_131D, "KAVERI" }, diff --git a/src/amdgpu_pci_chipset_gen.h b/src/amdgpu_pci_chipset_gen.h index 42bf0ea..6e7a979 100644 --- a/src/amdgpu_pci_chipset_gen.h +++ b/src/amdgpu_pci_chipset_gen.h @@ -61,6 +61,7 @@ static PciChipsets AMDGPUPciChipsets[] = { { PCI_CHIP_KAVERI_1315, PCI_CHIP_KAVERI_1315, RES_SHARED_VGA }, { PCI_CHIP_KAVERI_1316, PCI_CHIP_KAVERI_1316, RES_SHARED_VGA }, { PCI_CHIP_KAVERI_1317, PCI_CHIP_KAVERI_1317, RES_SHARED_VGA }, + { PCI_CHIP_KAVERI_1318, PCI_CHIP_KAVERI_1318, RES_SHARED_VGA }, { PCI_CHIP_KAVERI_131B, PCI_CHIP_KAVERI_131B, RES_SHARED_VGA }, { PCI_CHIP_KAVERI_131C, PCI_CHIP_KAVERI_131C, RES_SHARED_VGA }, { PCI_CHIP_KAVERI_131D, PCI_CHIP_KAVERI_131D, RES_SHARED_VGA }, diff --git a/src/amdgpu_pci_device_match_gen.h b/src/amdgpu_pci_device_match_gen.h index f434113..1f2e044 100644 --- a/src/amdgpu_pci_device_match_gen.h +++ b/src/amdgpu_pci_device_match_gen.h @@ -61,6 +61,7 @@ static const struct pci_id_match amdgpu_device_match[] = { ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_1315, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_1316, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_1317, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_1318, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_131B, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_131C, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_131D, 0 ), diff --git a/src/ati_pciids_gen.h b/src/ati_pciids_gen.h index 3c1f5a9..96c3295 100644 --- a/src/ati_pciids_gen.h +++ b/src/ati_pciids_gen.h @@ -59,6 +59,7 @@ #define PCI_CHIP_KAVERI_1315 0x1315 #define PCI_CHIP_KAVERI_1316 0x1316 #define PCI_CHIP_KAVERI_1317 0x1317 +#define PCI_CHIP_KAVERI_1318 0x1318 #define PCI_CHIP_KAVERI_131B 0x131B #define PCI_CHIP_KAVERI_131C 0x131C #define PCI_CHIP_KAVERI_131D 0x131D diff --git a/src/pcidb/ati_pciids.csv b/src/pcidb/ati_pciids.csv index d25244d..5c7a9a7 100644 --- a/src/pcidb/ati_pciids.csv +++ b/src/pcidb/ati_pciids.csv @@ -60,6 +60,7 @@ "0x1315","KAVERI_1315","KAVERI","KAVERI" "0x1316","KAVERI_1316","KAVERI","KAVERI" "0x1317","KAVERI_1317","KAVERI","KAVERI" +"0x1318","KAVERI_1318","KAVERI","KAVERI" "0x131B","KAVERI_131B","KAVERI","KAVERI" "0x131C","KAVERI_131C","KAVERI","KAVERI" "0x131D","KAVERI_131D","KAVERI","KAVERI" commit 772e43d3e890b193ba24274bf629c8304f17cebc Author: Michel Dänzer <michel.daen...@amd.com> Date: Wed Sep 14 17:19:58 2016 +0900 Add Mullins PCI IDs Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97472 Reviewed-by: Alex Deucher <alexander.deuc...@amd.com> (Cherry picked from commit aa5492660958e359bdc2107cba9a211ff988c90e) diff --git a/src/amdgpu_chipinfo_gen.h b/src/amdgpu_chipinfo_gen.h index 97506c6..3d3d6cd 100644 --- a/src/amdgpu_chipinfo_gen.h +++ b/src/amdgpu_chipinfo_gen.h @@ -27,6 +27,22 @@ static AMDGPUCardInfo AMDGPUCards[] = { { 0x983D, CHIP_FAMILY_KABINI }, { 0x983E, CHIP_FAMILY_KABINI }, { 0x983F, CHIP_FAMILY_KABINI }, + { 0x9850, CHIP_FAMILY_MULLINS }, + { 0x9851, CHIP_FAMILY_MULLINS }, + { 0x9852, CHIP_FAMILY_MULLINS }, + { 0x9853, CHIP_FAMILY_MULLINS }, + { 0x9854, CHIP_FAMILY_MULLINS }, + { 0x9855, CHIP_FAMILY_MULLINS }, + { 0x9856, CHIP_FAMILY_MULLINS }, + { 0x9857, CHIP_FAMILY_MULLINS }, + { 0x9858, CHIP_FAMILY_MULLINS }, + { 0x9859, CHIP_FAMILY_MULLINS }, + { 0x985A, CHIP_FAMILY_MULLINS }, + { 0x985B, CHIP_FAMILY_MULLINS }, + { 0x985C, CHIP_FAMILY_MULLINS }, + { 0x985D, CHIP_FAMILY_MULLINS }, + { 0x985E, CHIP_FAMILY_MULLINS }, + { 0x985F, CHIP_FAMILY_MULLINS }, { 0x1304, CHIP_FAMILY_KAVERI }, { 0x1305, CHIP_FAMILY_KAVERI }, { 0x1306, CHIP_FAMILY_KAVERI }, diff --git a/src/amdgpu_chipset_gen.h b/src/amdgpu_chipset_gen.h index 8a19a09..80e5279 100644 --- a/src/amdgpu_chipset_gen.h +++ b/src/amdgpu_chipset_gen.h @@ -27,6 +27,22 @@ SymTabRec AMDGPUChipsets[] = { { PCI_CHIP_KABINI_983D, "KABINI" }, { PCI_CHIP_KABINI_983E, "KABINI" }, { PCI_CHIP_KABINI_983F, "KABINI" }, + { PCI_CHIP_MULLINS_9850, "MULLINS" }, + { PCI_CHIP_MULLINS_9851, "MULLINS" }, + { PCI_CHIP_MULLINS_9852, "MULLINS" }, + { PCI_CHIP_MULLINS_9853, "MULLINS" }, + { PCI_CHIP_MULLINS_9854, "MULLINS" }, + { PCI_CHIP_MULLINS_9855, "MULLINS" }, + { PCI_CHIP_MULLINS_9856, "MULLINS" }, + { PCI_CHIP_MULLINS_9857, "MULLINS" }, + { PCI_CHIP_MULLINS_9858, "MULLINS" }, + { PCI_CHIP_MULLINS_9859, "MULLINS" }, + { PCI_CHIP_MULLINS_985A, "MULLINS" }, + { PCI_CHIP_MULLINS_985B, "MULLINS" }, + { PCI_CHIP_MULLINS_985C, "MULLINS" }, + { PCI_CHIP_MULLINS_985D, "MULLINS" }, + { PCI_CHIP_MULLINS_985E, "MULLINS" }, + { PCI_CHIP_MULLINS_985F, "MULLINS" }, { PCI_CHIP_KAVERI_1304, "KAVERI" }, { PCI_CHIP_KAVERI_1305, "KAVERI" }, { PCI_CHIP_KAVERI_1306, "KAVERI" }, diff --git a/src/amdgpu_pci_chipset_gen.h b/src/amdgpu_pci_chipset_gen.h index 9ac2739..42bf0ea 100644 --- a/src/amdgpu_pci_chipset_gen.h +++ b/src/amdgpu_pci_chipset_gen.h @@ -27,6 +27,22 @@ static PciChipsets AMDGPUPciChipsets[] = { { PCI_CHIP_KABINI_983D, PCI_CHIP_KABINI_983D, RES_SHARED_VGA }, { PCI_CHIP_KABINI_983E, PCI_CHIP_KABINI_983E, RES_SHARED_VGA }, { PCI_CHIP_KABINI_983F, PCI_CHIP_KABINI_983F, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_9850, PCI_CHIP_MULLINS_9850, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_9851, PCI_CHIP_MULLINS_9851, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_9852, PCI_CHIP_MULLINS_9852, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_9853, PCI_CHIP_MULLINS_9853, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_9854, PCI_CHIP_MULLINS_9854, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_9855, PCI_CHIP_MULLINS_9855, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_9856, PCI_CHIP_MULLINS_9856, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_9857, PCI_CHIP_MULLINS_9857, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_9858, PCI_CHIP_MULLINS_9858, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_9859, PCI_CHIP_MULLINS_9859, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_985A, PCI_CHIP_MULLINS_985A, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_985B, PCI_CHIP_MULLINS_985B, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_985C, PCI_CHIP_MULLINS_985C, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_985D, PCI_CHIP_MULLINS_985D, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_985E, PCI_CHIP_MULLINS_985E, RES_SHARED_VGA }, + { PCI_CHIP_MULLINS_985F, PCI_CHIP_MULLINS_985F, RES_SHARED_VGA }, { PCI_CHIP_KAVERI_1304, PCI_CHIP_KAVERI_1304, RES_SHARED_VGA }, { PCI_CHIP_KAVERI_1305, PCI_CHIP_KAVERI_1305, RES_SHARED_VGA }, { PCI_CHIP_KAVERI_1306, PCI_CHIP_KAVERI_1306, RES_SHARED_VGA }, diff --git a/src/amdgpu_pci_device_match_gen.h b/src/amdgpu_pci_device_match_gen.h index d46be91..f434113 100644 --- a/src/amdgpu_pci_device_match_gen.h +++ b/src/amdgpu_pci_device_match_gen.h @@ -27,6 +27,22 @@ static const struct pci_id_match amdgpu_device_match[] = { ATI_DEVICE_MATCH( PCI_CHIP_KABINI_983D, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_KABINI_983E, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_KABINI_983F, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_9850, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_9851, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_9852, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_9853, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_9854, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_9855, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_9856, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_9857, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_9858, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_9859, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_985A, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_985B, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_985C, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_985D, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_985E, 0 ), + ATI_DEVICE_MATCH( PCI_CHIP_MULLINS_985F, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_1304, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_1305, 0 ), ATI_DEVICE_MATCH( PCI_CHIP_KAVERI_1306, 0 ), diff --git a/src/amdgpu_probe.h b/src/amdgpu_probe.h index 1e6b99e..df10874 100644 --- a/src/amdgpu_probe.h +++ b/src/amdgpu_probe.h @@ -62,6 +62,7 @@ typedef enum { CHIP_FAMILY_KAVERI, CHIP_FAMILY_KABINI, CHIP_FAMILY_HAWAII, + CHIP_FAMILY_MULLINS, CHIP_FAMILY_TOPAZ, CHIP_FAMILY_TONGA, CHIP_FAMILY_CARRIZO, diff --git a/src/ati_pciids_gen.h b/src/ati_pciids_gen.h index 9474e37..3c1f5a9 100644 --- a/src/ati_pciids_gen.h +++ b/src/ati_pciids_gen.h @@ -25,6 +25,22 @@ #define PCI_CHIP_KABINI_983D 0x983D #define PCI_CHIP_KABINI_983E 0x983E #define PCI_CHIP_KABINI_983F 0x983F +#define PCI_CHIP_MULLINS_9850 0x9850 +#define PCI_CHIP_MULLINS_9851 0x9851 +#define PCI_CHIP_MULLINS_9852 0x9852 +#define PCI_CHIP_MULLINS_9853 0x9853 +#define PCI_CHIP_MULLINS_9854 0x9854 +#define PCI_CHIP_MULLINS_9855 0x9855 +#define PCI_CHIP_MULLINS_9856 0x9856 +#define PCI_CHIP_MULLINS_9857 0x9857 +#define PCI_CHIP_MULLINS_9858 0x9858 +#define PCI_CHIP_MULLINS_9859 0x9859 +#define PCI_CHIP_MULLINS_985A 0x985A +#define PCI_CHIP_MULLINS_985B 0x985B +#define PCI_CHIP_MULLINS_985C 0x985C +#define PCI_CHIP_MULLINS_985D 0x985D +#define PCI_CHIP_MULLINS_985E 0x985E +#define PCI_CHIP_MULLINS_985F 0x985F #define PCI_CHIP_KAVERI_1304 0x1304 #define PCI_CHIP_KAVERI_1305 0x1305 #define PCI_CHIP_KAVERI_1306 0x1306 diff --git a/src/pcidb/ati_pciids.csv b/src/pcidb/ati_pciids.csv index cbe93cd..d25244d 100644 --- a/src/pcidb/ati_pciids.csv +++ b/src/pcidb/ati_pciids.csv @@ -26,6 +26,22 @@ "0x983D","KABINI_983D","KABINI","KABINI" "0x983E","KABINI_983E","KABINI","KABINI" "0x983F","KABINI_983F","KABINI","KABINI" +"0x9850","MULLINS_9850","MULLINS","MULLINS" +"0x9851","MULLINS_9851","MULLINS","MULLINS" +"0x9852","MULLINS_9852","MULLINS","MULLINS" +"0x9853","MULLINS_9853","MULLINS","MULLINS" +"0x9854","MULLINS_9854","MULLINS","MULLINS" +"0x9855","MULLINS_9855","MULLINS","MULLINS" +"0x9856","MULLINS_9856","MULLINS","MULLINS" +"0x9857","MULLINS_9857","MULLINS","MULLINS" +"0x9858","MULLINS_9858","MULLINS","MULLINS" +"0x9859","MULLINS_9859","MULLINS","MULLINS" +"0x985A","MULLINS_985A","MULLINS","MULLINS" +"0x985B","MULLINS_985B","MULLINS","MULLINS" +"0x985C","MULLINS_985C","MULLINS","MULLINS" +"0x985D","MULLINS_985D","MULLINS","MULLINS" +"0x985E","MULLINS_985E","MULLINS","MULLINS" +"0x985F","MULLINS_985F","MULLINS","MULLINS" "0x1304","KAVERI_1304","KAVERI","KAVERI" "0x1305","KAVERI_1305","KAVERI","KAVERI" "0x1306","KAVERI_1306","KAVERI","KAVERI" commit 3edf690d391b290066a3f39eb24695b8c8a0aaab Author: Qiang Yu <qiang...@amd.com> Date: Wed Sep 14 17:19:29 2016 +0900 DRI2: Fix amdgpu_dri2_exchange_buffers width/height copy'n'paste error Signed-off-by: Qiang Yu <qiang...@amd.com> Reviewed-by: Alex Deucher <alexander.deuc...@amd.com> Reviewed-by: Michel Dänzer <michel.daen...@amd.com> (Cherry picked from commit 73c8dc000ad6b2b53ba3aa7155f5e8f6b55623b7) diff --git a/src/amdgpu_dri2.c b/src/amdgpu_dri2.c index 4a39ef8..74d969b 100644 --- a/src/amdgpu_dri2.c +++ b/src/amdgpu_dri2.c @@ -657,7 +657,7 @@ amdgpu_dri2_exchange_buffers(DrawablePtr draw, DRI2BufferPtr front, region.extents.x1 = region.extents.y1 = 0; region.extents.x2 = front_priv->pixmap->drawable.width; - region.extents.y2 = front_priv->pixmap->drawable.width; + region.extents.y2 = front_priv->pixmap->drawable.height; region.data = NULL; DamageRegionAppend(&front_priv->pixmap->drawable, ®ion); commit 0b3bde7f9e42577b6720cb290d03fab3b05614b4 Author: Michel Dänzer <michel.daen...@amd.com> Date: Wed Sep 14 17:18:51 2016 +0900 DRI2: Add interpolated_vblanks in amdgpu_dri2_get_crtc_msc We need that in amdgpu_dri2_drawable_crtc as well for priv->vblank_delta to work as intended. amdgpu_dri2_get_msc was already doing this. Fixes hangs in some cases when using VDPAU via DRI2 and moving the window between CRTCs. Reviewed-by: Alex Deucher <alexander.deuc...@amd.com> (Cherry picked from commit abd1a7901c95e4bc78415cf1b7923623b9177152) diff --git a/src/amdgpu_dri2.c b/src/amdgpu_dri2.c index 06294fd..4a39ef8 100644 --- a/src/amdgpu_dri2.c +++ b/src/amdgpu_dri2.c @@ -402,10 +402,11 @@ static uint32_t amdgpu_get_msc_delta(DrawablePtr pDraw, xf86CrtcPtr crtc) */ static Bool amdgpu_dri2_get_crtc_msc(xf86CrtcPtr crtc, CARD64 *ust, CARD64 *msc) { + drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private; + if (!amdgpu_crtc_is_enabled(crtc) || drmmode_crtc_get_ust_msc(crtc, ust, msc) != Success) { /* CRTC is not running, extrapolate MSC and timestamp */ - drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private; ScrnInfoPtr scrn = crtc->scrn; AMDGPUEntPtr pAMDGPUEnt = AMDGPUEntPriv(scrn); CARD64 now, delta_t, delta_seq; @@ -430,6 +431,8 @@ static Bool amdgpu_dri2_get_crtc_msc(xf86CrtcPtr crtc, CARD64 *ust, CARD64 *msc) *msc += delta_seq; } + *msc += drmmode_crtc->interpolated_vblanks; + return TRUE; } @@ -880,7 +883,8 @@ static int amdgpu_dri2_get_msc(DrawablePtr draw, CARD64 * ust, CARD64 * msc) if (!amdgpu_dri2_get_crtc_msc(crtc, ust, msc)) return FALSE; - *msc += amdgpu_get_msc_delta(draw, crtc); + if (draw && draw->type == DRAWABLE_WINDOW) + *msc += get_dri2_window_priv((WindowPtr)draw)->vblank_delta; *msc &= 0xffffffff; return TRUE; } commit 2e6e81aa8d4b33eb326e674dca4e29b3d638cac0 Author: Michel Dänzer <michel.daen...@amd.com> Date: Wed Sep 14 17:17:39 2016 +0900 Only use RandR APIs if RandR is enabled Fixes crash with Xinerama enabled, which disables RandR. Fixes: https://bugs.debian.org/827984