.gitignore | 1 autogen.sh | 4 configure.ac | 18 debian/changelog | 97 ++++ debian/compat | 2 debian/control | 18 debian/copyright | 3 debian/rules | 6 debian/source/lintian-overrides | 2 debian/source/local-options | 1 debian/upstream/signing-key.asc | 250 +++++++++++ debian/watch | 1 man/nouveau.man | 38 + src/Makefile.am | 47 ++ src/compat-api.h | 9 src/drmmode_display.c | 537 +++++++++++++++--------- src/hwdefs/gm107_texture.xml.h | 365 ++++++++++++++++ src/hwdefs/nvc0_3d.xml.h | 867 ++++++++++++++++++++++++---------------- src/nouveau_copy.c | 140 ++++++ src/nouveau_copy.h | 18 src/nouveau_copy85b5.c | 104 ++++ src/nouveau_copy90b5.c | 100 ++++ src/nouveau_copya0b5.c | 97 ++++ src/nouveau_dri2.c | 636 ++++++++++++++++++++++------- src/nouveau_exa.c | 54 +- src/nouveau_local.h | 2 src/nouveau_present.c | 302 +++++++++++++ src/nouveau_present.h | 19 src/nouveau_sync.c | 117 +++++ src/nouveau_sync.h | 34 + src/nouveau_wfb.c | 6 src/nouveau_xv.c | 162 ++++++- src/nv04_exa.c | 5 src/nv10_exa.c | 22 - src/nv30_exa.c | 20 src/nv40_exa.c | 8 src/nv50_accel.c | 265 +++++------- src/nv50_accel.h | 1 src/nv50_exa.c | 115 +---- src/nv50_xv.c | 5 src/nv_accel_common.c | 183 +++++--- src/nv_const.h | 4 src/nv_dma.c | 139 ------ src/nv_driver.c | 312 ++++++++++---- src/nv_proto.h | 34 - src/nv_type.h | 39 + src/nvc0_accel.c | 145 ++++-- src/nvc0_accel.h | 59 ++ src/nvc0_exa.c | 231 +++------- src/nvc0_xv.c | 115 +++-- src/shader/Makefile | 37 + src/shader/exac8nv110.fp | 47 ++ src/shader/exac8nv110.fpc | 38 + src/shader/exac8nvf0.fp | 42 + src/shader/exac8nvf0.fpc | 28 + src/shader/exacanv110.fp | 47 ++ src/shader/exacanv110.fpc | 38 + src/shader/exacanve0.fp | 1 src/shader/exacanve0.fpc | 2 src/shader/exacanvf0.fp | 42 + src/shader/exacanvf0.fpc | 28 + src/shader/exacmnv110.fp | 47 ++ src/shader/exacmnv110.fpc | 38 + src/shader/exacmnve0.fp | 1 src/shader/exacmnve0.fpc | 2 src/shader/exacmnvf0.fp | 42 + src/shader/exacmnvf0.fpc | 28 + src/shader/exas8nv110.fp | 42 + src/shader/exas8nv110.fpc | 28 + src/shader/exas8nvf0.fp | 38 + src/shader/exas8nvf0.fpc | 20 src/shader/exasanv110.fp | 47 ++ src/shader/exasanv110.fpc | 38 + src/shader/exasanve0.fp | 1 src/shader/exasanve0.fpc | 2 src/shader/exasanvf0.fp | 42 + src/shader/exasanvf0.fpc | 28 + src/shader/exascnv110.fp | 38 + src/shader/exascnv110.fpc | 20 src/shader/exascnvf0.fp | 35 + src/shader/exascnvf0.fpc | 14 src/shader/videonv110.fp | 54 ++ src/shader/videonv110.fpc | 52 ++ src/shader/videonvf0.fp | 47 ++ src/shader/videonvf0.fpc | 38 + src/shader/xfrm2nv110.vp | 82 +++ src/shader/xfrm2nv110.vpc | 102 ++++ src/shader/xfrm2nvf0.vp | 82 +++ src/shader/xfrm2nvf0.vpc | 90 ++++ 89 files changed, 5594 insertions(+), 1613 deletions(-)
New commits: commit 3108362450c1520aac14c3d6b05c188c414b3a17 Author: Sven Joachim <[email protected]> Date: Mon Mar 13 20:54:53 2017 +0100 Add Lyude's key C5469FB8758F9C2B diff --git a/debian/changelog b/debian/changelog index b6c8e8e..f06b282 100644 --- a/debian/changelog +++ b/debian/changelog @@ -2,6 +2,7 @@ xserver-xorg-video-nouveau (1:1.0.14-1) UNRELEASED; urgency=medium * New upstream release. - Provide acceleration support for Maxwell cards. + * Add Lyude's key C5469FB8758F9C2B to debian/upstream/signing-key.asc. -- Sven Joachim <[email protected]> Mon, 13 Mar 2017 20:52:13 +0100 diff --git a/debian/upstream/signing-key.asc b/debian/upstream/signing-key.asc index df45a3e..623a108 100644 --- a/debian/upstream/signing-key.asc +++ b/debian/upstream/signing-key.asc @@ -173,3 +173,78 @@ hZ30sS7aoLrtIXPV1nVyIDSPZkW6dk7t7Tl7nEYhCYBaweCqTtVhx2huESbq4oog GtLp6sJi2Q0t9a2IMD62a+dAj74J =Gywi -----END PGP PUBLIC KEY BLOCK----- +-----BEGIN PGP PUBLIC KEY BLOCK----- + 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a/debian/changelog +++ b/debian/changelog @@ -1,3 +1,10 @@ +xserver-xorg-video-nouveau (1:1.0.14-1) UNRELEASED; urgency=medium + + * New upstream release. + - Provide acceleration support for Maxwell cards. + + -- Sven Joachim <[email protected]> Mon, 13 Mar 2017 20:52:13 +0100 + xserver-xorg-video-nouveau (1:1.0.13-2) unstable; urgency=medium * Team upload. commit 56e08a642fd0479868b414837263d4e7031b1aee Author: Sven Joachim <[email protected]> Date: Sat Mar 11 09:02:54 2017 +0100 Upload to unstable diff --git a/debian/changelog b/debian/changelog index 1e1ba4d..7fa9a76 100644 --- a/debian/changelog +++ b/debian/changelog @@ -1,9 +1,10 @@ -xserver-xorg-video-nouveau (1:1.0.13-2) UNRELEASED; urgency=medium +xserver-xorg-video-nouveau (1:1.0.13-2) unstable; urgency=medium + * Team upload. * Cherry-pick commit 924083938c ("Consider CRTCs disabled when DPMS is off") from upstream. - -- Sven Joachim <[email protected]> Thu, 09 Mar 2017 16:43:23 +0100 + -- Sven Joachim <[email protected]> Sat, 11 Mar 2017 09:00:49 +0100 xserver-xorg-video-nouveau (1:1.0.13-1) unstable; urgency=medium commit c6494a85f139c788f020b10409a1b2f78bd77368 Author: Sven Joachim <[email protected]> Date: Thu Mar 9 16:58:08 2017 +0100 Document the cherry-pick diff --git a/debian/changelog b/debian/changelog index 94230bd..1e1ba4d 100644 --- a/debian/changelog +++ b/debian/changelog @@ -1,3 +1,10 @@ +xserver-xorg-video-nouveau (1:1.0.13-2) UNRELEASED; urgency=medium + + * Cherry-pick commit 924083938c ("Consider CRTCs disabled when DPMS is + off") from upstream. + + -- Sven Joachim <[email protected]> Thu, 09 Mar 2017 16:43:23 +0100 + xserver-xorg-video-nouveau (1:1.0.13-1) unstable; urgency=medium * Team upload. commit 6479221636db0a81eba5adfed8d494535da85321 Author: Lyude <[email protected]> Date: Fri Mar 3 18:27:42 2017 -0500 Consider CRTCs disabled when DPMS is off It turns out there's a difference in X between a CRTC being "disabled" and simply having it's DPMS turned off. This is problematic though, because if DPMS is turned off you can't really use the CRTC as a normal CRTC anyway since page flipping and vblanks will be non-functional. As a result, we've been considering DPMS-on CRTCs as enabled and attempt to perform pageflips, vblank waits, etc. on them which inevitably fails. and usually breaks the display the first time any of the CRTCs have their DPMS turned on. This was a problem that didn't really show itself until kernel 4.10 when atomic modesetting was added which caused nouveau to stop trying to fulfill pageflips and vblank waits on disabled CRTCs. I'm not sure how pageflipping disabled CRTCs ever worked in the first place, but since not doing so is the proper behavior anyway I haven't investigated any further. So, copy the ms_crtc_on() function from the modesetting driver and add it here as drmmode_crtc_on(), then use that in all of the places where we should be checking for both DPMS off and disabled CRTCs. This fixes issues with the X ceasing to function (usually) after the first time a CRTC has it's DPMS turned on. Reproduction recipe: - Load up gnome-shell on a machine - Wait for the display to timeout from inactivity and turn itself off - Shake the cursor or press something on the keyboard. Chances are the monitor will come back on, but the display remains black until the next time the X server is restarted. Signed-off-by: Lyude <[email protected]> Reviewed-by: Adam Jackson <[email protected]> (cherry picked from commit 924083938c8f209d8f6ff472caf8692a644f7e78) diff --git a/src/drmmode_display.c b/src/drmmode_display.c index b6c9bb9..dd9fa27 100644 --- a/src/drmmode_display.c +++ b/src/drmmode_display.c @@ -65,6 +65,7 @@ typedef struct { uint32_t rotate_fb_id; Bool cursor_visible; int scanout_pixmap_x; + int dpms_mode; } drmmode_crtc_private_rec, *drmmode_crtc_private_ptr; typedef struct { @@ -114,6 +115,14 @@ drmmode_crtc(xf86CrtcPtr crtc) return drmmode_crtc->mode_crtc->crtc_id; } +Bool +drmmode_crtc_on(xf86CrtcPtr crtc) +{ + drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private; + + return crtc->enabled && drmmode_crtc->dpms_mode == DPMSModeOn; +} + int drmmode_head(xf86CrtcPtr crtc) { @@ -313,9 +322,10 @@ drmmode_ConvertToKMode(ScrnInfoPtr scrn, drmModeModeInfo *kmode, } static void -drmmode_crtc_dpms(xf86CrtcPtr drmmode_crtc, int mode) +drmmode_crtc_dpms(xf86CrtcPtr crtc, int mode) { - + drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private; + drmmode_crtc->dpms_mode = mode; } void diff --git a/src/nouveau_dri2.c b/src/nouveau_dri2.c index 81ee9be..cbb7b2a 100644 --- a/src/nouveau_dri2.c +++ b/src/nouveau_dri2.c @@ -279,23 +279,27 @@ can_exchange(DrawablePtr draw, PixmapPtr dst_pix, PixmapPtr src_pix) ScrnInfoPtr scrn = xf86ScreenToScrn(draw->pScreen); xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn); NVPtr pNv = NVPTR(scrn); - int i; + int i, active_crtc_count = 0; if (!xf86_config->num_crtc) return FALSE; for (i = 0; i < xf86_config->num_crtc; i++) { xf86CrtcPtr crtc = xf86_config->crtc[i]; - if (crtc->enabled && crtc->rotatedData) - return FALSE; + if (drmmode_crtc_on(crtc)) { + if (crtc->rotatedData) + return FALSE; + active_crtc_count++; + } } return ((DRI2CanFlip(draw) && pNv->has_pageflip)) && dst_pix->drawable.width == src_pix->drawable.width && dst_pix->drawable.height == src_pix->drawable.height && dst_pix->drawable.bitsPerPixel == src_pix->drawable.bitsPerPixel && - dst_pix->devKind == src_pix->devKind; + dst_pix->devKind == src_pix->devKind && + active_crtc_count; } static Bool @@ -475,7 +479,7 @@ dri2_page_flip(DrawablePtr draw, PixmapPtr back, void *priv, int head = drmmode_crtc(config->crtc[i]); void *token; - if (!config->crtc[i]->enabled) + if (!drmmode_crtc_on(config->crtc[i])) continue; flipdata->flip_count++; diff --git a/src/nouveau_present.c b/src/nouveau_present.c index 482ac6e..ebd5fcf 100644 --- a/src/nouveau_present.c +++ b/src/nouveau_present.c @@ -152,7 +152,7 @@ nouveau_present_flip_check(RRCrtcPtr rrcrtc, WindowPtr window, ScrnInfoPtr scrn = xf86ScreenToScrn(window->drawable.pScreen); xf86CrtcPtr crtc = rrcrtc->devPrivate; - if (!scrn->vtSema || !crtc->enabled) + if (!scrn->vtSema || !drmmode_crtc_on(crtc)) return FALSE; return TRUE; @@ -199,7 +199,7 @@ nouveau_present_flip_exec(ScrnInfoPtr scrn, uint64_t event_id, int sync, flip->msc = target_msc; for (i = 0; i < config->num_crtc; i++) { - if (config->crtc[i]->enabled) + if (drmmode_crtc_on(config->crtc[i])) last = i; } @@ -208,7 +208,7 @@ nouveau_present_flip_exec(ScrnInfoPtr scrn, uint64_t event_id, int sync, int crtc = drmmode_crtc(config->crtc[i]); void *user = NULL; - if (!config->crtc[i]->enabled) + if (!drmmode_crtc_on(config->crtc[i])) continue; if (token && ((crtc == sync) || (i == last))) { diff --git a/src/nouveau_xv.c b/src/nouveau_xv.c index d514dbf..df3112c 100644 --- a/src/nouveau_xv.c +++ b/src/nouveau_xv.c @@ -299,7 +299,7 @@ nv_window_belongs_to_crtc(ScrnInfoPtr pScrn, int x, int y, int w, int h) for (i = 0; i < xf86_config->num_crtc; i++) { xf86CrtcPtr crtc = xf86_config->crtc[i]; - if (!crtc->enabled) + if (!drmmode_crtc_on(crtc)) continue; if ((x < (crtc->x + crtc->mode.HDisplay)) && diff --git a/src/nv_proto.h b/src/nv_proto.h index 122ede5..4a57406 100644 --- a/src/nv_proto.h +++ b/src/nv_proto.h @@ -13,6 +13,7 @@ void drmmode_screen_init(ScreenPtr pScreen); void drmmode_screen_fini(ScreenPtr pScreen); int drmmode_crtc(xf86CrtcPtr crtc); +Bool drmmode_crtc_on(xf86CrtcPtr crtc); int drmmode_head(xf86CrtcPtr crtc); void drmmode_swap(ScrnInfoPtr, uint32_t, uint32_t *); commit b71de83b7fae0abeb311251e6144294d319062cf Author: Lyude <[email protected]> Date: Tue Mar 7 18:44:43 2017 -0500 Bump version to 1.0.14 Signed-off-by: Lyude <[email protected]> diff --git a/configure.ac b/configure.ac index 0e004d7..e494300 100644 --- a/configure.ac +++ b/configure.ac @@ -22,7 +22,7 @@ AC_PREREQ([2.60]) AC_INIT([xf86-video-nouveau], - [1.0.13], + [1.0.14], [https://bugs.freedesktop.org/enter_bug.cgi?product=xorg], [xf86-video-nouveau]) commit 924083938c8f209d8f6ff472caf8692a644f7e78 Author: Lyude <[email protected]> Date: Fri Mar 3 18:27:42 2017 -0500 Consider CRTCs disabled when DPMS is off It turns out there's a difference in X between a CRTC being "disabled" and simply having it's DPMS turned off. This is problematic though, because if DPMS is turned off you can't really use the CRTC as a normal CRTC anyway since page flipping and vblanks will be non-functional. As a result, we've been considering DPMS-on CRTCs as enabled and attempt to perform pageflips, vblank waits, etc. on them which inevitably fails. and usually breaks the display the first time any of the CRTCs have their DPMS turned on. This was a problem that didn't really show itself until kernel 4.10 when atomic modesetting was added which caused nouveau to stop trying to fulfill pageflips and vblank waits on disabled CRTCs. I'm not sure how pageflipping disabled CRTCs ever worked in the first place, but since not doing so is the proper behavior anyway I haven't investigated any further. So, copy the ms_crtc_on() function from the modesetting driver and add it here as drmmode_crtc_on(), then use that in all of the places where we should be checking for both DPMS off and disabled CRTCs. This fixes issues with the X ceasing to function (usually) after the first time a CRTC has it's DPMS turned on. Reproduction recipe: - Load up gnome-shell on a machine - Wait for the display to timeout from inactivity and turn itself off - Shake the cursor or press something on the keyboard. Chances are the monitor will come back on, but the display remains black until the next time the X server is restarted. Signed-off-by: Lyude <[email protected]> Reviewed-by: Adam Jackson <[email protected]> diff --git a/src/drmmode_display.c b/src/drmmode_display.c index b6c9bb9..dd9fa27 100644 --- a/src/drmmode_display.c +++ b/src/drmmode_display.c @@ -65,6 +65,7 @@ typedef struct { uint32_t rotate_fb_id; Bool cursor_visible; int scanout_pixmap_x; + int dpms_mode; } drmmode_crtc_private_rec, *drmmode_crtc_private_ptr; typedef struct { @@ -114,6 +115,14 @@ drmmode_crtc(xf86CrtcPtr crtc) return drmmode_crtc->mode_crtc->crtc_id; } +Bool +drmmode_crtc_on(xf86CrtcPtr crtc) +{ + drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private; + + return crtc->enabled && drmmode_crtc->dpms_mode == DPMSModeOn; +} + int drmmode_head(xf86CrtcPtr crtc) { @@ -313,9 +322,10 @@ drmmode_ConvertToKMode(ScrnInfoPtr scrn, drmModeModeInfo *kmode, } static void -drmmode_crtc_dpms(xf86CrtcPtr drmmode_crtc, int mode) +drmmode_crtc_dpms(xf86CrtcPtr crtc, int mode) { - + drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private; + drmmode_crtc->dpms_mode = mode; } void diff --git a/src/nouveau_dri2.c b/src/nouveau_dri2.c index 81ee9be..cbb7b2a 100644 --- a/src/nouveau_dri2.c +++ b/src/nouveau_dri2.c @@ -279,23 +279,27 @@ can_exchange(DrawablePtr draw, PixmapPtr dst_pix, PixmapPtr src_pix) ScrnInfoPtr scrn = xf86ScreenToScrn(draw->pScreen); xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn); NVPtr pNv = NVPTR(scrn); - int i; + int i, active_crtc_count = 0; if (!xf86_config->num_crtc) return FALSE; for (i = 0; i < xf86_config->num_crtc; i++) { xf86CrtcPtr crtc = xf86_config->crtc[i]; - if (crtc->enabled && crtc->rotatedData) - return FALSE; + if (drmmode_crtc_on(crtc)) { + if (crtc->rotatedData) + return FALSE; + active_crtc_count++; + } } return ((DRI2CanFlip(draw) && pNv->has_pageflip)) && dst_pix->drawable.width == src_pix->drawable.width && dst_pix->drawable.height == src_pix->drawable.height && dst_pix->drawable.bitsPerPixel == src_pix->drawable.bitsPerPixel && - dst_pix->devKind == src_pix->devKind; + dst_pix->devKind == src_pix->devKind && + active_crtc_count; } static Bool @@ -475,7 +479,7 @@ dri2_page_flip(DrawablePtr draw, PixmapPtr back, void *priv, int head = drmmode_crtc(config->crtc[i]); void *token; - if (!config->crtc[i]->enabled) + if (!drmmode_crtc_on(config->crtc[i])) continue; flipdata->flip_count++; diff --git a/src/nouveau_present.c b/src/nouveau_present.c index 482ac6e..ebd5fcf 100644 --- a/src/nouveau_present.c +++ b/src/nouveau_present.c @@ -152,7 +152,7 @@ nouveau_present_flip_check(RRCrtcPtr rrcrtc, WindowPtr window, ScrnInfoPtr scrn = xf86ScreenToScrn(window->drawable.pScreen); xf86CrtcPtr crtc = rrcrtc->devPrivate; - if (!scrn->vtSema || !crtc->enabled) + if (!scrn->vtSema || !drmmode_crtc_on(crtc)) return FALSE; return TRUE; @@ -199,7 +199,7 @@ nouveau_present_flip_exec(ScrnInfoPtr scrn, uint64_t event_id, int sync, flip->msc = target_msc; for (i = 0; i < config->num_crtc; i++) { - if (config->crtc[i]->enabled) + if (drmmode_crtc_on(config->crtc[i])) last = i; } @@ -208,7 +208,7 @@ nouveau_present_flip_exec(ScrnInfoPtr scrn, uint64_t event_id, int sync, int crtc = drmmode_crtc(config->crtc[i]); void *user = NULL; - if (!config->crtc[i]->enabled) + if (!drmmode_crtc_on(config->crtc[i])) continue; if (token && ((crtc == sync) || (i == last))) { diff --git a/src/nouveau_xv.c b/src/nouveau_xv.c index 716b18d..4b939f7 100644 --- a/src/nouveau_xv.c +++ b/src/nouveau_xv.c @@ -299,7 +299,7 @@ nv_window_belongs_to_crtc(ScrnInfoPtr pScrn, int x, int y, int w, int h) for (i = 0; i < xf86_config->num_crtc; i++) { xf86CrtcPtr crtc = xf86_config->crtc[i]; - if (!crtc->enabled) + if (!drmmode_crtc_on(crtc)) continue; if ((x < (crtc->x + crtc->mode.HDisplay)) && diff --git a/src/nv_proto.h b/src/nv_proto.h index 122ede5..4a57406 100644 --- a/src/nv_proto.h +++ b/src/nv_proto.h @@ -13,6 +13,7 @@ void drmmode_screen_init(ScreenPtr pScreen); void drmmode_screen_fini(ScreenPtr pScreen); int drmmode_crtc(xf86CrtcPtr crtc); +Bool drmmode_crtc_on(xf86CrtcPtr crtc); int drmmode_head(xf86CrtcPtr crtc); void drmmode_swap(ScrnInfoPtr, uint32_t, uint32_t *); commit 1516d35b06c9cda399bef01d992805d6e63dcbae Author: Ilia Mirkin <[email protected]> Date: Sun Oct 16 15:10:10 2016 -0400 recognize and accelerate GM20x Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> diff --git a/src/nv_driver.c b/src/nv_driver.c index fff83f8..61940a8 100644 --- a/src/nv_driver.c +++ b/src/nv_driver.c @@ -390,6 +390,7 @@ NVHasKMS(struct pci_device *pci_dev, struct xf86_platform_device *platform_dev) case 0xf0: case 0x100: case 0x110: + case 0x120: break; default: xf86DrvMsg(-1, X_ERROR, "Unknown chipset: NV%02X\n", chipset); @@ -941,6 +942,7 @@ NVPreInit(ScrnInfoPtr pScrn, int flags) pNv->Architecture = NV_KEPLER; break; case 0x110: + case 0x120: pNv->Architecture = NV_MAXWELL; break; default: diff --git a/src/nvc0_accel.c b/src/nvc0_accel.c index d0a835e..6c2bae8 100644 --- a/src/nvc0_accel.c +++ b/src/nvc0_accel.c @@ -244,9 +244,17 @@ NVAccelInit3D_NVC0(ScrnInfoPtr pScrn) } else if (pNv->dev->chipset < 0x110) { class = 0xa197; handle = 0x0000906e; - } else { + } else if (pNv->dev->chipset < 0x120) { class = 0xb097; handle = 0x0000906e; + } else if (pNv->dev->chipset < 0x130) { + class = 0xb197; + handle = 0x0000906e; + } else { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "No 3D acceleration support for NV%X\n", + pNv->dev->chipset); + return FALSE; } ret = nouveau_object_new(pNv->channel, class, class, commit b00b73c3aa0da1d4cee5c9f580ca65a7bd344e0f Author: Ilia Mirkin <[email protected]> Date: Mon Oct 17 23:23:41 2016 -0400 copy: add maxwell/pascal copy engine classes Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> diff --git a/src/nouveau_copy.c b/src/nouveau_copy.c index c139de6..7118a7a 100644 --- a/src/nouveau_copy.c +++ b/src/nouveau_copy.c @@ -42,6 +42,8 @@ nouveau_copy_init(ScreenPtr pScreen) int engine; Bool (*init)(NVPtr); } methods[] = { + { 0xc0b5, 0, nouveau_copya0b5_init }, + { 0xb0b5, 0, nouveau_copya0b5_init }, { 0xa0b5, 0, nouveau_copya0b5_init }, { 0x90b8, 5, nouveau_copy90b5_init }, { 0x90b5, 4, nouveau_copy90b5_init }, diff --git a/src/nvc0_accel.c b/src/nvc0_accel.c index 8da5051..d0a835e 100644 --- a/src/nvc0_accel.c +++ b/src/nvc0_accel.c @@ -156,9 +156,17 @@ NVAccelInitCOPY_NVE0(ScrnInfoPtr pScrn) { NVPtr pNv = NVPTR(pScrn); struct nouveau_pushbuf *push = pNv->pushbuf; + uint32_t class; int ret; - ret = nouveau_object_new(pNv->channel, 0x0000a0b5, 0xa0b5, + if (pNv->dev->chipset < 0x110) + class = 0xa0b5; + else if (pNv->dev->chipset < 0x130) + class = 0xb0b5; + else + class = 0xc0b5; + + ret = nouveau_object_new(pNv->channel, class, class, NULL, 0, &pNv->NvCOPY); if (ret) return FALSE; commit 5a3ada3b0ff3d89441faf35d331bb8b6cf5e51c0 Author: Ilia Mirkin <[email protected]> Date: Sun Oct 16 15:03:35 2016 -0400 nvc0: refactor TIC uploads to allow different specifics per generation This flips GM10x to using the updated format, which is what I tested with. However GM20x and GP10x also use this TIC format. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> diff --git a/src/nvc0_accel.c b/src/nvc0_accel.c index 0682806..8da5051 100644 --- a/src/nvc0_accel.c +++ b/src/nvc0_accel.c @@ -322,6 +322,17 @@ NVAccelInit3D_NVC0(ScrnInfoPtr pScrn) PUSH_DATA (push, (bo->offset + MISC_OFFSET) >> 32); PUSH_DATA (push, (bo->offset + MISC_OFFSET)); PUSH_DATA (push, 1); + } else { + /* Use new TIC format. Not strictly necessary for GM20x+ */ + IMMED_NVC0(push, SUBC_3D(0x0f10), 1); + if (pNv->dev->chipset >= 0x120) { + /* Use center sample locations. */ + BEGIN_NVC0(push, SUBC_3D(0x11e0), 4); + PUSH_DATA (push, 0x88888888); + PUSH_DATA (push, 0x88888888); + PUSH_DATA (push, 0x88888888); + PUSH_DATA (push, 0x88888888); + } } BEGIN_NVC0(push, NVC0_3D(CODE_ADDRESS_HIGH), 2); diff --git a/src/nvc0_accel.h b/src/nvc0_accel.h index 607e97b..959f67f 100644 --- a/src/nvc0_accel.h +++ b/src/nvc0_accel.h @@ -7,6 +7,7 @@ #include "hwdefs/nvc0_m2mf.xml.h" #include "hwdefs/nv50_defs.xml.h" #include "hwdefs/nv50_texture.h" +#include "hwdefs/gm107_texture.xml.h" #include "hwdefs/nv_3ddefs.xml.h" /* subchannel assignments, compatible with kepler's fixed layout */ @@ -108,4 +109,59 @@ PUSH_DATAu(struct nouveau_pushbuf *push, struct nouveau_bo *bo, } } +static __inline__ void +PUSH_TIC(struct nouveau_pushbuf *push, struct nouveau_bo *bo, unsigned offset, + unsigned width, unsigned height, unsigned pitch, unsigned format) +{ + if (push->client->device->chipset < 0x110) { + unsigned tic2 = 0xd0001000; + if (pitch == 0) + tic2 |= 0x00004000; + else + tic2 |= 0x0005c000; + PUSH_DATA(push, format); + PUSH_DATA(push, bo->offset + offset); + PUSH_DATA(push, ((bo->offset + offset) >> 32) | + (bo->config.nvc0.tile_mode << 18) | + tic2); + PUSH_DATA(push, 0x00300000); + PUSH_DATA(push, 0x80000000 | width); + PUSH_DATA(push, 0x00010000 | height); + PUSH_DATA(push, 0x03000000); + PUSH_DATA(push, 0x00000000); + } else { + unsigned tile_mode = bo->config.nvc0.tile_mode; + PUSH_DATA(push, (format & 0x3f) | ((format & ~0x3f) << 1)); + PUSH_DATA(push, bo->offset + offset); + if (pitch == 0) { + PUSH_DATA(push, ((bo->offset + offset) >> 32) | + GM107_TIC2_2_HEADER_VERSION_BLOCKLINEAR); + PUSH_DATA(push, GM107_TIC2_3_LOD_ANISO_QUALITY_2 | + ((tile_mode & 0x007)) | + ((tile_mode & 0x070) >> (4 - 3)) | + ((tile_mode & 0x700) >> (8 - 6))); + PUSH_DATA(push, GM107_TIC2_4_SECTOR_PROMOTION_PROMOTE_TO_2_V | + GM107_TIC2_4_BORDER_SIZE_SAMPLER_COLOR | + GM107_TIC2_4_TEXTURE_TYPE_TWO_D | + (width - 1)); + PUSH_DATA(push, GM107_TIC2_5_NORMALIZED_COORDS | + ((height - 1) & 0xffff)); + PUSH_DATA(push, GM107_TIC2_6_ANISO_FINE_SPREAD_FUNC_TWO | + GM107_TIC2_6_ANISO_COARSE_SPREAD_FUNC_ONE); + PUSH_DATA(push, 0x00000000); + } else { + PUSH_DATA(push, ((bo->offset + offset) >> 32) | + GM107_TIC2_2_HEADER_VERSION_PITCH); + PUSH_DATA(push, GM107_TIC2_3_LOD_ANISO_QUALITY_2 | + (pitch >> 5)); + PUSH_DATA(push, GM107_TIC2_4_BORDER_SIZE_SAMPLER_COLOR | + GM107_TIC2_4_TEXTURE_TYPE_TWO_D_NO_MIPMAP | + (width - 1)); + PUSH_DATA(push, GM107_TIC2_5_NORMALIZED_COORDS | (height - 1)); + PUSH_DATA(push, 0x000000000); + PUSH_DATA(push, 0x000000000); + } + } +} + #endif diff --git a/src/nvc0_exa.c b/src/nvc0_exa.c index d3fd316..b396079 100644 --- a/src/nvc0_exa.c +++ b/src/nvc0_exa.c @@ -532,20 +532,13 @@ NVC0EXACheckTexture(PicturePtr ppict, PicturePtr pdpict, int op) static Bool NVC0EXAPictSolid(NVPtr pNv, PicturePtr ppict, unsigned unit) { - uint64_t offset = pNv->scratch->offset + SOLID(unit); struct nouveau_pushbuf *push = pNv->pushbuf; PUSH_DATAu(push, pNv->scratch, SOLID(unit), 1); PUSH_DATA (push, ppict->pSourcePict->solidFill.color); PUSH_DATAu(push, pNv->scratch, TIC_OFFSET + (unit * 32), 8); - PUSH_DATA (push, _(B_C0, G_C1, R_C2, A_C3, 8_8_8_8)); - PUSH_DATA (push, offset); - PUSH_DATA (push, (offset >> 32) | 0xd005d000); - PUSH_DATA (push, 0x00300000); - PUSH_DATA (push, 0x00000001); - PUSH_DATA (push, 0x00010001); - PUSH_DATA (push, 0x03000000); - PUSH_DATA (push, 0x00000000); + PUSH_TIC (push, pNv->scratch, SOLID(unit), 1, 1, 4, + _(B_C0, G_C1, R_C2, A_C3, 8_8_8_8)); PUSH_DATAu(push, pNv->scratch, TSC_OFFSET + (unit * 32), 8); PUSH_DATA (push, NV50TSC_1_0_WRAPS_REPEAT | NV50TSC_1_0_WRAPT_REPEAT | @@ -651,16 +644,8 @@ NVC0EXAPictTexture(NVPtr pNv, PixmapPtr ppix, PicturePtr ppict, unsigned unit) PUSH_REFN (push, bo, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); PUSH_DATAu(push, pNv->scratch, TIC_OFFSET + (unit * 32), 8); - PUSH_DATA (push, format); - PUSH_DATA (push, bo->offset); - PUSH_DATA (push, (bo->offset >> 32) | - (bo->config.nvc0.tile_mode << 18) | - 0xd0005000); - PUSH_DATA (push, 0x00300000); - PUSH_DATA (push, (1 << 31) | ppix->drawable.width); - PUSH_DATA (push, (1 << 16) | ppix->drawable.height); - PUSH_DATA (push, 0x03000000); - PUSH_DATA (push, 0x00000000); + PUSH_TIC (push, bo, 0, ppix->drawable.width, ppix->drawable.height, 0, + format); PUSH_DATAu(push, pNv->scratch, TSC_OFFSET + (unit * 32), 8); if (ppict->repeat) { diff --git a/src/nvc0_xv.c b/src/nvc0_xv.c index 2d66fa8..5cecbf5 100644 --- a/src/nvc0_xv.c +++ b/src/nvc0_xv.c @@ -74,7 +74,6 @@ nvc0_xv_image_put(ScrnInfoPtr pScrn, { dst, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR }, }; struct nouveau_pushbuf *push = pNv->pushbuf; - uint32_t mode = 0xd0005000 | (src->config.nvc0.tile_mode << 18); float X1, X2, Y1, Y2; BoxPtr pbox; int nbox; @@ -105,71 +104,49 @@ nvc0_xv_image_put(ScrnInfoPtr pScrn, PUSH_DATAu(push, pNv->scratch, TIC_OFFSET, 16); if (id == FOURCC_YV12 || id == FOURCC_I420) { - PUSH_DATA (push, NV50TIC_0_0_MAPA_C0 | NV50TIC_0_0_TYPEA_UNORM | + PUSH_TIC(push, src, packed_y, width, height, 0, + NV50TIC_0_0_MAPA_C0 | NV50TIC_0_0_TYPEA_UNORM | NV50TIC_0_0_MAPB_ZERO | NV50TIC_0_0_TYPEB_UNORM | NV50TIC_0_0_MAPG_ZERO | NV50TIC_0_0_TYPEG_UNORM | NV50TIC_0_0_MAPR_ZERO | NV50TIC_0_0_TYPER_UNORM | NV50TIC_0_0_FMT_8); - PUSH_DATA (push, ((src->offset + packed_y))); - PUSH_DATA (push, ((src->offset + packed_y) >> 32) | mode); - PUSH_DATA (push, 0x00300000); - PUSH_DATA (push, width); - PUSH_DATA (push, (1 << NV50TIC_0_5_DEPTH_SHIFT) | height); - PUSH_DATA (push, 0x03000000); - PUSH_DATA (push, 0x00000000); - PUSH_DATA (push, NV50TIC_0_0_MAPA_C1 | NV50TIC_0_0_TYPEA_UNORM | + PUSH_TIC(push, src, uv, width >> 1, height >> 1, 0, + NV50TIC_0_0_MAPA_C1 | NV50TIC_0_0_TYPEA_UNORM | NV50TIC_0_0_MAPB_C0 | NV50TIC_0_0_TYPEB_UNORM | NV50TIC_0_0_MAPG_ZERO | NV50TIC_0_0_TYPEG_UNORM | NV50TIC_0_0_MAPR_ZERO | NV50TIC_0_0_TYPER_UNORM | NV50TIC_0_0_FMT_8_8); - PUSH_DATA (push, ((src->offset + uv))); - PUSH_DATA (push, ((src->offset + uv) >> 32) | mode); - PUSH_DATA (push, 0x00300000); - PUSH_DATA (push, width >> 1); - PUSH_DATA (push, (1 << NV50TIC_0_5_DEPTH_SHIFT) | (height >> 1)); - PUSH_DATA (push, 0x03000000); - PUSH_DATA (push, 0x00000000); } else { - if (id == FOURCC_UYVY) { - PUSH_DATA (push, NV50TIC_0_0_MAPA_C1 | NV50TIC_0_0_TYPEA_UNORM | + unsigned format; + if (id == FOURCC_UYVY) { + format = NV50TIC_0_0_MAPA_C1 | NV50TIC_0_0_TYPEA_UNORM | NV50TIC_0_0_MAPB_ZERO | NV50TIC_0_0_TYPEB_UNORM | NV50TIC_0_0_MAPG_ZERO | NV50TIC_0_0_TYPEG_UNORM | NV50TIC_0_0_MAPR_ZERO | NV50TIC_0_0_TYPER_UNORM | - NV50TIC_0_0_FMT_8_8); - } else { - PUSH_DATA (push, NV50TIC_0_0_MAPA_C0 | NV50TIC_0_0_TYPEA_UNORM | + NV50TIC_0_0_FMT_8_8; + } else { + format = NV50TIC_0_0_MAPA_C0 | NV50TIC_0_0_TYPEA_UNORM | NV50TIC_0_0_MAPB_ZERO | NV50TIC_0_0_TYPEB_UNORM | NV50TIC_0_0_MAPG_ZERO | NV50TIC_0_0_TYPEG_UNORM | NV50TIC_0_0_MAPR_ZERO | NV50TIC_0_0_TYPER_UNORM | - NV50TIC_0_0_FMT_8_8); - } - PUSH_DATA (push, ((src->offset + packed_y))); - PUSH_DATA (push, ((src->offset + packed_y) >> 32) | mode); - PUSH_DATA (push, 0x00300000); - PUSH_DATA (push, width); - PUSH_DATA (push, (1 << NV50TIC_0_5_DEPTH_SHIFT) | height); - PUSH_DATA (push, 0x03000000); - PUSH_DATA (push, 0x00000000); - if (id == FOURCC_UYVY) { - PUSH_DATA (push, NV50TIC_0_0_MAPA_C2 | NV50TIC_0_0_TYPEA_UNORM | + NV50TIC_0_0_FMT_8_8; + } + PUSH_TIC(push, src, packed_y, width, height, 0, format); + + if (id == FOURCC_UYVY) { + format = NV50TIC_0_0_MAPA_C2 | NV50TIC_0_0_TYPEA_UNORM | NV50TIC_0_0_MAPB_C0 | NV50TIC_0_0_TYPEB_UNORM | NV50TIC_0_0_MAPG_ZERO | NV50TIC_0_0_TYPEG_UNORM | NV50TIC_0_0_MAPR_ZERO | NV50TIC_0_0_TYPER_UNORM | - NV50TIC_0_0_FMT_8_8_8_8); - } else { - PUSH_DATA (push, NV50TIC_0_0_MAPA_C3 | NV50TIC_0_0_TYPEA_UNORM | + NV50TIC_0_0_FMT_8_8_8_8; + } else { + format = NV50TIC_0_0_MAPA_C3 | NV50TIC_0_0_TYPEA_UNORM | NV50TIC_0_0_MAPB_C1 | NV50TIC_0_0_TYPEB_UNORM | NV50TIC_0_0_MAPG_ZERO | NV50TIC_0_0_TYPEG_UNORM | NV50TIC_0_0_MAPR_ZERO | NV50TIC_0_0_TYPER_UNORM | - NV50TIC_0_0_FMT_8_8_8_8); - } - PUSH_DATA (push, ((src->offset + packed_y))); - PUSH_DATA (push, ((src->offset + packed_y) >> 32) | mode); - PUSH_DATA (push, 0x00300000); - PUSH_DATA (push, (width >> 1)); - PUSH_DATA (push, (1 << NV50TIC_0_5_DEPTH_SHIFT) | height); - PUSH_DATA (push, 0x03000000); - PUSH_DATA (push, 0x00000000); + NV50TIC_0_0_FMT_8_8_8_8; + } + PUSH_TIC(push, src, packed_y, width >> 1, height, 0, format); }
