Package: libpciaccess0
Version: 0.17-3+b3
Severity: important
Tags: upstream patch

Dear Debian X Strike Force,

## Environment
- Distribution: Debian Trixie 13.5
- Kernel: 6.12.90+deb13.1-amd64
- Motherboard: Wistron JIG31B3 (Fujitsu OEM, Intel G31 chipset)
- BIOS: Fujitsu / Phoenix Technologies 3.06 (02/22/2010)
- CPU: Intel Core 2 Duo E6320 @ 1.86GHz
- GPU: Intel 82G31 integrated graphics, PCI ID 8086:29c2, kernel driver i915
- xserver-xorg-core: 2:21.1.16-1.3+deb13u2
- xserver-xorg-video-intel: 2:2.99.917+git20210115-1
- libpciaccess0: 0.17-3+b3

Kernel-side VGA arbiter works correctly: `vgaarb` module is loaded, the Intel 
G31 GPU is properly registered as the boot VGA device, and the i915 DRM driver 
initializes without errors (confirmed in dmesg). All hardware and kernel layers 
are functional; the crash originates purely from userspace libpciaccess logic.

## Reproduction Steps
1. Boot into LightDM Xorg session with the intel video driver loaded
2. Run command over SSH or local terminal:
   `sudo -E DISPLAY=:0 XAUTHORITY=/var/run/lightdm/root/:0 xset dpms force off`
3. Xorg crashes immediately with SIGSEGV, drops back to LightDM login manager, 
all desktop applications terminate.

## Crash Backtrace (intel driver runtime DPMS crash, /var/log/Xorg.0.log)
[  4975.118] (EE) Backtrace:
[  4975.118] (EE) 0: /usr/lib/xorg/Xorg (OsSigHandler+0x2d)
[  4975.121] (EE) 2: /lib/x86_64-linux-gnu/libpciaccess.so.0 
(pci_device_vgaarb_set_target+0x113)
[  4975.122] (EE) 3: /usr/lib/xorg/Xorg (xf86VGAarbiterLock+0x20)
[  4975.122] (EE) 4: /usr/lib/xorg/Xorg (xf86DPMS+0x38)
[  4975.123] (EE) 5: /usr/lib/xorg/Xorg (DPMSSet+0x66)
[  4975.127] (EE) Segmentation fault at address 0x30

## Live GDB Debug Result (attached to running Xorg process)
#0  0x00007f35d71049b3 in pci_device_vgaarb_set_target (dev=0x55b4da995fd0)
    at ../../src/common_vgaarb.c:235

(gdb) print pci_sys
$1 = (struct pci_system *) 0x0

(gdb) print dev
$2 = (struct pci_device *) 0x55b4da995fd0

The `dev` pointer is fully valid and its members are readable; only the global 
`pci_sys` pointer is NULL when entering the function.

## Additional modesetting-only driver test result
After purging `xserver-xorg-video-intel` to remove the intel DDX driver, Xorg 
loads only the generic modesetting driver. However, X still crashes during 
early output initialization with a different segfault, proving the bug affects 
all VGA arbiter functions in libpciaccess, not only 
`pci_device_vgaarb_set_target`:
(EE) Backtrace:
(EE) 0: /usr/lib/xorg/Xorg (OsSigHandler+0x2d)
(EE) 2: /lib/x86_64-linux-gnu/libpciaccess.so.0 (pci_device_vgaarb_unlock+0x25)
(EE) 3: /usr/lib/xorg/Xorg (InitOutput+0x9a1)
(EE) Segmentation fault at address 0x28

GDB confirms the identical root cause: global `pci_sys` remains NULL inside 
`pci_device_vgaarb_unlock`.

## Root Cause
All VGA arbiter helper functions in `src/common_vgaarb.c` fail to validate the 
global `pci_sys` pointer before dereferencing its members.
For `pci_device_vgaarb_set_target`:
1. DPMS state change triggers xf86DPMS → xf86VGAarbiterLock → 
pci_device_vgaarb_set_target
2. The input `dev` pointer is non-NULL, so the existing `if (!dev)` check is 
skipped entirely
3. The code directly accesses `pci_sys->vgaarb_fd`, `pci_sys->vga_count`, and 
`pci_sys->vga_target` without any NULL guard
4. On this vintage G31 hardware, userspace PCI initialization does not populate 
`pci_sys`, leaving it NULL. Dereferencing memory offset 0x30 triggers the 
SIGSEGV.

This is an independent userspace logic flaw inside libpciaccess; any 
kernel-level vgaarb configuration cannot resolve the NULL pointer dereference.

## Proposed Fix
Add a NULL check for `pci_sys` at the entry of every vgaarb helper function. 
The minimal patch for `pci_device_vgaarb_set_target` is shown below:
int
pci_device_vgaarb_set_target(struct pci_device *dev)
{
    int len;
    char buf[BUFSIZE + 1];
    int ret;

    /* Fix: avoid NULL dereference when PCI system is uninitialized */
    if (!pci_sys)
        return -1;

    if (!dev)
        dev = pci_sys->vga_default_dev;
    if (!dev)
        return -1;

    /* rest of original code unchanged */
}
The same `if (!pci_sys)` guard should be added to `pci_device_vgaarb_lock`,  
`pci_device_vgaarb_unlock` and so on to fix the modesetting initialization 
crash.

## Verified Workarounds
1. Permanent stable workaround: Disable DPMS X extension via xorg.conf
Create /etc/X11/xorg.conf.d/90-nodpms.conf:
Section "ServerFlags"
    Option "DPMS" "false"
EndSection
Section "Device"
    Identifier "IntelGPU"
    Driver "intel"
    Option "DPMS" "off"
EndSection
Restart LightDM/Xorg. The DPMS extension is fully removed from the X server, so 
no vgaarb libpciaccess functions are invoked at any stage, eliminating all 
segfaults.
Important note: Running `xset -dpms` on a live running X session instantly 
crashes the server and cannot be used as a temporary runtime fix. Simple `xset 
s off` only modifies screensaver timeout and does not block DPMS code paths.

2. Partial incomplete workaround: Remove xserver-xorg-video-intel to use 
modesetting driver
This avoids runtime DPMS-triggered crashes but still hits a segfault during X 
initialization via pci_device_vgaarb_unlock. Not recommended for stable daily 
use.

## Ineffective Attempts (no crash mitigation at all)
1. Xorg ServerFlags: Option "NoVGAARB" "true"
2. Intel driver device option: Option "VGAARB" "off"
3. Kernel boot parameter vgaarb.disabled=1 + blacklist vgaarb module

All three options only modify kernel VGA arbiter behavior and do not touch the 
userspace NULL pointer logic in libpciaccess. The segmentation fault still 
reproduces reliably.

## Attached Files List
1. hardware_report.txt: Full hardware DMI, PCI, kernel module, dmesg and 
package version report
2. Xorg-intel-dpms-crash.log: Xorg crash log with backtrace for intel driver 
DPMS trigger
3. Xorg-modesetting-init-crash.log: Xorg early initialization segfault log with 
pure modesetting driver
4. common_vgaarb.c: Unmodified source file from libpciaccess 0.17-3+b3 
containing all faulty vgaarb functions

Please let me know if core dumps, additional GDB traces or test builds are 
required for further debugging.

Regards,
euughost
=== System Basic Info ===
Linux oldpc 6.12.90+deb13.1-amd64 #1 SMP PREEMPT_DYNAMIC Debian 6.12.90-2 
(2026-05-27) x86_64 GNU/Linux
13.5

=== Kernel Boot Cmdline ===
BOOT_IMAGE=/boot/vmlinuz-6.12.90+deb13.1-amd64 
root=UUID=b2f6c005-9b76-441c-a88e-b3a206de2b12 ro quiet

=== Full PCI Device List (with IDs & drivers) ===
00:00.0 Host bridge [0600]: Intel Corporation 82G33/G31/P35/P31 Express DRAM 
Controller [8086:29c0] (rev 0a)
        Subsystem: Fujitsu Limited. Device [10cf:1478]
        Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- 
Stepping- SERR- FastB2B- DisINTx-
        Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- 
<MAbort+ >SERR- <PERR- INTx-
        Latency: 0
        Capabilities: [e0] Vendor Specific Information: Len=0b <?>

00:02.0 VGA compatible controller [0300]: Intel Corporation 82G33/G31 Express 
Integrated Graphics Controller [8086:29c2] (rev 0a) (prog-if 00 [VGA 
controller])
        Subsystem: Fujitsu Limited. Device [10cf:1477]
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- 
Stepping- SERR- FastB2B- DisINTx-
        Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- 
<MAbort- >SERR- <PERR- INTx-
        Latency: 0
        Interrupt: pin A routed to IRQ 16
        Region 0: Memory at f0200000 (32-bit, non-prefetchable) [size=512K]
        Region 1: I/O ports at 18e0 [size=8]
        Region 2: Memory at e0000000 (32-bit, prefetchable) [size=256M]
        Region 3: Memory at f0000000 (32-bit, non-prefetchable) [size=1M]
        Expansion ROM at 000c0000 [virtual] [disabled] [size=128K]
        Capabilities: [90] MSI: Enable- Count=1/1 Maskable- 64bit-
                Address: 00000000  Data: 0000
        Capabilities: [d0] Power Management version 2
                Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA 
PME(D0-,D1-,D2-,D3hot-,D3cold-)
                Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
        Kernel driver in use: i915
        Kernel modules: i915

00:1b.0 Audio device [0403]: Intel Corporation NM10/ICH7 Family High Definition 
Audio Controller [8086:27d8] (rev 01) (prog-if 00 [HDA compatible])
        Subsystem: Fujitsu Limited. Device [10cf:13c2]
        Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- 
Stepping- SERR- FastB2B- DisINTx+
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- 
<MAbort- >SERR- <PERR- INTx-
        Latency: 0, Cache Line Size: 32 bytes
        Interrupt: pin A routed to IRQ 25
        Region 0: Memory at f0280000 (64-bit, non-prefetchable) [size=16K]
        Capabilities: [50] Power Management version 2
                Flags: PMEClk- DSI- D1- D2- AuxCurrent=55mA 
PME(D0+,D1-,D2-,D3hot+,D3cold+)
                Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
        Capabilities: [60] MSI: Enable+ Count=1/1 Maskable- 64bit+
                Address: 00000000fee00000  Data: 0025
        Capabilities: [70] Express (v1) Root Complex Integrated Endpoint, 
IntMsgNum 0
                DevCap: MaxPayload 128 bytes, PhantFunc 0
                        ExtTag- RBE- FLReset- TEE-IO-
                DevCtl: CorrErr- NonFatalErr- FatalErr- UnsupReq-
                        RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop+
                        MaxPayload 128 bytes, MaxReadReq 128 bytes
                DevSta: CorrErr- NonFatalErr- FatalErr- UnsupReq- AuxPwr+ 
TransPend-
        Capabilities: [100 v1] Virtual Channel
                Caps:   LPEVC=0 RefClk=100ns PATEntryBits=1
                Arb:    Fixed- WRR32- WRR64- WRR128-
                Ctrl:   ArbSelect=Fixed
                Status: InProgress-
                VC0:    Caps:   PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
                        Arb:    Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
                        Ctrl:   Enable+ ID=0 ArbSelect=Fixed TC/VC=01
                        Status: NegoPending- InProgress-
                VC1:    Caps:   PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
                        Arb:    Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
                        Ctrl:   Enable+ ID=1 ArbSelect=Fixed TC/VC=80
                        Status: NegoPending- InProgress-
        Capabilities: [130 v1] Root Complex Link
                Desc:   PortNumber=0f ComponentID=02 EltType=Config
                Link0:  Desc:   TargetPort=00 TargetComponent=02 AssocRCRB- 
LinkType=MemMapped LinkValid+
                        Addr:   00000000fed1c000
        Kernel driver in use: snd_hda_intel
        Kernel modules: snd_hda_intel

00:1c.0 PCI bridge [0604]: Intel Corporation NM10/ICH7 Family PCI Express Port 
1 [8086:27d0] (rev 01) (prog-if 00 [Normal decode])
        Subsystem: Fujitsu Limited. Device [10cf:1478]
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- 
Stepping- SERR- FastB2B- DisINTx-
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- 
<MAbort- >SERR- <PERR- INTx-
        Latency: 0, Cache Line Size: 32 bytes
        Interrupt: pin A routed to IRQ 17
        Bus: primary=00, secondary=05, subordinate=05, sec-latency=0
        I/O behind bridge: 2000-2fff [size=4K] [16-bit]
        Memory behind bridge: f0100000-f01fffff [size=1M] [32-bit]
        Prefetchable memory behind bridge: f0500000-f06fffff [size=2M] [32-bit]
        Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- 
<MAbort- <SERR- <PERR-
        BridgeCtl: Parity- SERR+ NoISA+ VGA- VGA16- MAbort- >Reset- FastB2B-
                PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
        Capabilities: [40] Express (v1) Root Port (Slot+), IntMsgNum 0
                DevCap: MaxPayload 128 bytes, PhantFunc 0
                        ExtTag- RBE- TEE-IO-
                DevCtl: CorrErr- NonFatalErr- FatalErr+ UnsupReq-
                        RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop-
                        MaxPayload 128 bytes, MaxReadReq 128 bytes
                DevSta: CorrErr- NonFatalErr- FatalErr- UnsupReq- AuxPwr+ 
TransPend-
                LnkCap: Port #1, Speed 2.5GT/s, Width x1, ASPM not supported
                        ClockPM- Surprise- LLActRep+ BwNot- ASPMOptComp-
                LnkCtl: ASPM Disabled; RCB 64 bytes, LnkDisable- CommClk+
                        ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
                LnkSta: Speed 2.5GT/s, Width x1
                        TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt-
                SltCap: AttnBtn- PwrCtrl- MRL- AttnInd- PwrInd- HotPlug+ 
Surprise+
                        Slot #1, PowerLimit 10W; Interlock- NoCompl-
                SltCtl: Enable: AttnBtn- PwrFlt- MRL- PresDet- CmdCplt- HPIrq- 
LinkChg-
                        Control: AttnInd Unknown, PwrInd Unknown, Power- 
Interlock-
                SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ 
Interlock-
                        Changed: MRL- PresDet+ LinkState+
                RootCap: CRSVisible-
                RootCtl: ErrCorrectable- ErrNon-Fatal- ErrFatal+ PMEIntEna- 
CRSVisible-
                RootSta: PME ReqID 0000, PMEStatus- PMEPending-
        Capabilities: [80] MSI: Enable- Count=1/1 Maskable- 64bit-
                Address: 00000000  Data: 0000
        Capabilities: [90] Subsystem: Fujitsu Limited. Device [10cf:1478]
        Capabilities: [a0] Power Management version 2
                Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA 
PME(D0+,D1-,D2-,D3hot+,D3cold+)
                Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
        Capabilities: [100 v1] Virtual Channel
                Caps:   LPEVC=0 RefClk=100ns PATEntryBits=1
                Arb:    Fixed+ WRR32- WRR64- WRR128-
                Ctrl:   ArbSelect=Fixed
                Status: InProgress-
                VC0:    Caps:   PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
                        Arb:    Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256-
                        Ctrl:   Enable+ ID=0 ArbSelect=Fixed TC/VC=01
                        Status: NegoPending- InProgress-
                VC1:    Caps:   PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
                        Arb:    Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256-
                        Ctrl:   Enable- ID=0 ArbSelect=Fixed TC/VC=00
                        Status: NegoPending- InProgress-
        Capabilities: [180 v1] Root Complex Link
                Desc:   PortNumber=01 ComponentID=02 EltType=Config
                Link0:  Desc:   TargetPort=00 TargetComponent=02 AssocRCRB- 
LinkType=MemMapped LinkValid+
                        Addr:   00000000fed1c001
        Kernel driver in use: pcieport

00:1d.0 USB controller [0c03]: Intel Corporation NM10/ICH7 Family USB UHCI 
Controller #1 [8086:27c8] (rev 01) (prog-if 00 [UHCI])
        Subsystem: Fujitsu Limited. Device [10cf:1478]
        Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- 
Stepping- SERR- FastB2B- DisINTx-
        Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- 
<TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0
        Interrupt: pin A routed to IRQ 23
        Region 4: I/O ports at 1820 [size=32]
        Kernel driver in use: uhci_hcd
        Kernel modules: uhci_hcd

00:1d.1 USB controller [0c03]: Intel Corporation NM10/ICH7 Family USB UHCI 
Controller #2 [8086:27c9] (rev 01) (prog-if 00 [UHCI])
        Subsystem: Fujitsu Limited. Device [10cf:1478]
        Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- 
Stepping- SERR- FastB2B- DisINTx-
        Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- 
<TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0
        Interrupt: pin B routed to IRQ 19
        Region 4: I/O ports at 1840 [size=32]
        Kernel driver in use: uhci_hcd
        Kernel modules: uhci_hcd

00:1d.2 USB controller [0c03]: Intel Corporation NM10/ICH7 Family USB UHCI 
Controller #3 [8086:27ca] (rev 01) (prog-if 00 [UHCI])
        Subsystem: Fujitsu Limited. Device [10cf:1478]
        Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- 
Stepping- SERR- FastB2B- DisINTx-
        Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- 
<TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0
        Interrupt: pin C routed to IRQ 18
        Region 4: I/O ports at 1860 [size=32]
        Kernel driver in use: uhci_hcd
        Kernel modules: uhci_hcd

00:1d.3 USB controller [0c03]: Intel Corporation NM10/ICH7 Family USB UHCI 
Controller #4 [8086:27cb] (rev 01) (prog-if 00 [UHCI])
        Subsystem: Fujitsu Limited. Device [10cf:1478]
        Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- 
Stepping- SERR- FastB2B- DisINTx-
        Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- 
<TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0
        Interrupt: pin D routed to IRQ 16
        Region 4: I/O ports at 1880 [size=32]
        Kernel driver in use: uhci_hcd
        Kernel modules: uhci_hcd

00:1d.7 USB controller [0c03]: Intel Corporation NM10/ICH7 Family USB2 EHCI 
Controller [8086:27cc] (rev 01) (prog-if 20 [EHCI])
        Subsystem: Fujitsu Limited. Device [10cf:1478]
        Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- 
Stepping- SERR- FastB2B- DisINTx-
        Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- 
<TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0
        Interrupt: pin A routed to IRQ 23
        Region 0: Memory at f0484000 (32-bit, non-prefetchable) [size=1K]
        Capabilities: [50] Power Management version 2
                Flags: PMEClk- DSI- D1- D2- AuxCurrent=375mA 
PME(D0+,D1-,D2-,D3hot+,D3cold+)
                Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
        Capabilities: [58] Debug port: BAR=1 offset=00a0
        Kernel driver in use: ehci-pci
        Kernel modules: ehci_pci

00:1e.0 PCI bridge [0604]: Intel Corporation 82801 PCI Bridge [8086:244e] (rev 
e1) (prog-if 01 [Subtractive decode])
        Subsystem: Fujitsu Limited. Device [10cf:1478]
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- 
Stepping- SERR- FastB2B- DisINTx-
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- 
<MAbort- >SERR- <PERR- INTx-
        Latency: 0
        Bus: primary=00, secondary=11, subordinate=11, sec-latency=32
        I/O behind bridge: [disabled] [16-bit]
        Memory behind bridge: [disabled] [32-bit]
        Prefetchable memory behind bridge: [disabled] [64-bit]
        Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- 
<TAbort- <MAbort+ <SERR- <PERR-
        BridgeCtl: Parity- SERR+ NoISA+ VGA- VGA16- MAbort- >Reset- FastB2B-
                PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
        Capabilities: [50] Subsystem: Fujitsu Limited. Device [10cf:1478]

00:1f.0 ISA bridge [0601]: Intel Corporation 82801GB/GR (ICH7 Family) LPC 
Interface Bridge [8086:27b8] (rev 01)
        Subsystem: Fujitsu Limited. Device [10cf:1478]
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- 
Stepping- SERR- FastB2B- DisINTx-
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- 
<TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0
        Capabilities: [e0] Vendor Specific Information: Len=0c <?>
        Kernel driver in use: lpc_ich
        Kernel modules: leds_ss4200, intel_rng, lpc_ich

00:1f.1 IDE interface [0101]: Intel Corporation 82801G (ICH7 Family) IDE 
Controller [8086:27df] (rev 01) (prog-if 8a [ISA Compatibility mode controller, 
supports both channels switched to PCI native mode, supports bus mastering])
        Subsystem: Fujitsu Limited. Device [10cf:1478]
        Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- 
Stepping- SERR- FastB2B- DisINTx-
        Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- 
<TAbort- <MAbort- >SERR- <PERR- INTx+
        Latency: 0
        Interrupt: pin A routed to IRQ 18
        Region 0: I/O ports at 01f0 [size=8]
        Region 1: I/O ports at 03f4
        Region 2: I/O ports at 0170 [size=8]
        Region 3: I/O ports at 0374
        Region 4: I/O ports at 18c0 [size=16]
        Kernel driver in use: ata_piix
        Kernel modules: ata_piix, ata_generic

00:1f.2 IDE interface [0101]: Intel Corporation NM10/ICH7 Family SATA 
Controller [IDE mode] [8086:27c0] (rev 01) (prog-if 8f [PCI native mode 
controller, supports both channels switched to ISA compatibility mode, supports 
bus mastering])
        Subsystem: Fujitsu Limited. Device [10cf:1478]
        Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- 
Stepping- SERR- FastB2B- DisINTx-
        Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- 
<TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0
        Interrupt: pin B routed to IRQ 19
        Region 0: I/O ports at 1c10 [size=8]
        Region 1: I/O ports at 1c04 [size=4]
        Region 2: I/O ports at 1c08 [size=8]
        Region 3: I/O ports at 1c00 [size=4]
        Region 4: I/O ports at 18d0 [size=16]
        Capabilities: [70] Power Management version 2
                Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA 
PME(D0-,D1-,D2-,D3hot+,D3cold-)
                Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
        Kernel driver in use: ata_piix
        Kernel modules: ata_piix, ata_generic

00:1f.3 SMBus [0c05]: Intel Corporation NM10/ICH7 Family SMBus Controller 
[8086:27da] (rev 01)
        Subsystem: Fujitsu Limited. Device [10cf:1478]
        Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- 
Stepping- SERR- FastB2B- DisINTx-
        Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- 
<TAbort- <MAbort- >SERR- <PERR- INTx-
        Interrupt: pin B routed to IRQ 19
        Region 4: I/O ports at 18a0 [size=32]
        Kernel driver in use: i801_smbus
        Kernel modules: i2c_i801

05:00.0 Ethernet controller [0200]: Broadcom Inc. and subsidiaries NetLink 
BCM5786 Gigabit Ethernet PCI Express [14e4:169a] (rev 02)
        Subsystem: Fujitsu Limited. Device [10cf:13ee]
        Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- 
Stepping- SERR- FastB2B- DisINTx+
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- 
<MAbort- >SERR- <PERR- INTx-
        Latency: 0, Cache Line Size: 32 bytes
        Interrupt: pin A routed to IRQ 24
        Region 0: Memory at f0100000 (64-bit, non-prefetchable) [size=64K]
        Expansion ROM at <ignored> [disabled]
        Capabilities: [48] Power Management version 3
                Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA 
PME(D0-,D1-,D2-,D3hot+,D3cold+)
                Status: D0 NoSoftRst+ PME-Enable- DSel=0 DScale=1 PME-
        Capabilities: [50] Vital Product Data
                Product Name: Broadcom NetXtreme Gigabit Ethernet Controller
                Read-only fields:
                        [PN] Part number: BCM95786
                        [EC] Engineering changes: 106679-15
                        [SN] Serial number: 0123456789
                        [MN] Manufacture ID: 14e4
                        [RV] Reserved: checksum good, 28 byte(s) reserved
                Read/write fields:
                        [YA] Asset tag: XYZ01234567
                        [RW] Read-write area: 107 byte(s) free
                End
        Capabilities: [58] Vendor Specific Information: Len=78 <?>
        Capabilities: [e8] MSI: Enable+ Count=1/1 Maskable- 64bit+
                Address: 00000000fee01000  Data: 0025
        Capabilities: [d0] Express (v1) Endpoint, IntMsgNum 0
                DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <4us, L1 
unlimited
                        ExtTag+ AttnBtn- AttnInd- PwrInd- RBE+ FLReset- 
SlotPowerLimit 10W TEE-IO-
                DevCtl: CorrErr- NonFatalErr- FatalErr- UnsupReq-
                        RlxdOrd- ExtTag+ PhantFunc- AuxPwr- NoSnoop-
                        MaxPayload 128 bytes, MaxReadReq 512 bytes
                DevSta: CorrErr- NonFatalErr- FatalErr- UnsupReq- AuxPwr+ 
TransPend-
                LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s, Exit 
Latency L0s <4us
                        ClockPM- Surprise- LLActRep- BwNot- ASPMOptComp-
                LnkCtl: ASPM Disabled; RCB 64 bytes, LnkDisable- CommClk+
                        ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
                LnkSta: Speed 2.5GT/s, Width x1
                        TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
        Capabilities: [100 v1] Advanced Error Reporting
                UESta:  DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- 
RxOF- MalfTLP-
                        ECRC- UnsupReq- ACSViol- UncorrIntErr- BlockedTLP- 
AtomicOpBlocked- TLPBlockedErr-
                        PoisonTLPBlocked- DMWrReqBlocked- IDECheck- MisIDETLP- 
PCRC_CHECK- TLPXlatBlocked-
                UEMsk:  DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- 
RxOF- MalfTLP-
                        ECRC- UnsupReq- ACSViol- UncorrIntErr- BlockedTLP- 
AtomicOpBlocked- TLPBlockedErr-
                        PoisonTLPBlocked- DMWrReqBlocked- IDECheck- MisIDETLP- 
PCRC_CHECK- TLPXlatBlocked-
                UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- 
RxOF+ MalfTLP+
                        ECRC- UnsupReq- ACSViol- UncorrIntErr- BlockedTLP- 
AtomicOpBlocked- TLPBlockedErr-
                        PoisonTLPBlocked- DMWrReqBlocked- IDECheck- MisIDETLP- 
PCRC_CHECK- TLPXlatBlocked-
                CESta:  RxErr- BadTLP- BadDLLP- Rollover- Timeout- 
AdvNonFatalErr+ CorrIntErr- HeaderOF-
                CEMsk:  RxErr- BadTLP- BadDLLP- Rollover- Timeout- 
AdvNonFatalErr+ CorrIntErr- HeaderOF-
                AERCap: First Error Pointer: 00, ECRCGenCap+ ECRCGenEn- 
ECRCChkCap+ ECRCChkEn-
                        MultHdrRecCap- MultHdrRecEn- TLPPfxPres- HdrLogCap-
                HeaderLog: 00000000 00000000 00000000 00000000
        Capabilities: [13c v1] Virtual Channel
                Caps:   LPEVC=0 RefClk=100ns PATEntryBits=1
                Arb:    Fixed- WRR32- WRR64- WRR128-
                Ctrl:   ArbSelect=Fixed
                Status: InProgress-
                VC0:    Caps:   PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
                        Arb:    Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
                        Ctrl:   Enable+ ID=0 ArbSelect=Fixed TC/VC=01
                        Status: NegoPending- InProgress-
        Capabilities: [160 v1] Device Serial Number f8-0f-41-ff-fe-07-cd-bf
        Kernel driver in use: tg3
        Kernel modules: tg3


=== Motherboard & BIOS Info (DMI) ===
# dmidecode 3.6
Getting SMBIOS data from sysfs.
SMBIOS 2.4 present.

Handle 0x0002, DMI type 2, 10 bytes
Base Board Information
        Manufacturer: Wistron Corporation
        Product Name: JIG31B3
        Version:  
        Serial Number:  
        Asset Tag:  
        Features:
                Board is a hosting board
                Board is replaceable

# dmidecode 3.6
Getting SMBIOS data from sysfs.
SMBIOS 2.4 present.

Handle 0x0000, DMI type 0, 24 bytes
BIOS Information
        Vendor: FUJITSU // Phoenix Technologies Ltd.
        Version: 3.06
        Release Date: 02/22/2010
        Address: 0xE5830
        Runtime Size: 108496 bytes
        ROM Size: 1 MB
        Characteristics:
                PCI is supported
                PNP is supported
                BIOS is upgradeable
                BIOS shadowing is allowed
                Boot from CD is supported
                Selectable boot is supported
                EDD is supported
                3.5"/720 kB floppy services are supported (int 13h)
                Print screen service is supported (int 5h)
                8042 keyboard services are supported (int 9h)
                Serial services are supported (int 14h)
                Printer services are supported (int 17h)
                CGA/mono video services are supported (int 10h)
                ACPI is supported
                USB legacy is supported
                BIOS boot specification is supported
                Targeted content distribution is supported
        BIOS Revision: 3.6

Handle 0x0E1B, DMI type 0, 17 bytes
BIOS Information


=== CPU Info ===
Architecture:                            x86_64
CPU op-mode(s):                          32-bit, 64-bit
Address sizes:                           36 bits physical, 48 bits virtual
Byte Order:                              Little Endian
CPU(s):                                  2
On-line CPU(s) list:                     0,1
Vendor ID:                               GenuineIntel
Model name:                              Intel(R) Core(TM)2 CPU          6320  
@ 1.86GHz
CPU family:                              6
Model:                                   15
Thread(s) per core:                      1
Core(s) per socket:                      2
Socket(s):                               1
Stepping:                                6
CPU(s) scaling MHz:                      98%
CPU max MHz:                             1867.0000
CPU min MHz:                             1600.0000
BogoMIPS:                                3724.42
Flags:                                   fpu vme de pse tsc msr pae mce cx8 
apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ht tm 
pbe syscall nx lm constant_tsc arch_perfmon pebs bts rep_good nopl cpuid 
aperfmperf pni dtes64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm lahf_lm 
pti tpr_shadow dtherm
Virtualization:                          VT-x
L1d cache:                               64 KiB (2 instances)
L1i cache:                               64 KiB (2 instances)
L2 cache:                                4 MiB (1 instance)
NUMA node(s):                            1
NUMA node0 CPU(s):                       0,1
Vulnerability Gather data sampling:      Not affected
Vulnerability Indirect target selection: Not affected
Vulnerability Itlb multihit:             KVM: Mitigation: Split huge pages
Vulnerability L1tf:                      Mitigation; PTE Inversion; VMX EPT 
disabled
Vulnerability Mds:                       Vulnerable: Clear CPU buffers 
attempted, no microcode; SMT disabled
Vulnerability Meltdown:                  Mitigation; PTI
Vulnerability Mmio stale data:           Unknown: No mitigations
Vulnerability Reg file data sampling:    Not affected
Vulnerability Retbleed:                  Not affected
Vulnerability Spec rstack overflow:      Not affected
Vulnerability Spec store bypass:         Vulnerable
Vulnerability Spectre v1:                Mitigation; usercopy/swapgs barriers 
and __user pointer sanitization
Vulnerability Spectre v2:                Mitigation; Retpolines; STIBP 
disabled; RSB filling; PBRSB-eIBRS Not affected; BHI Not affected
Vulnerability Srbds:                     Not affected
Vulnerability Tsa:                       Not affected
Vulnerability Tsx async abort:           Not affected
Vulnerability Vmscape:                   Not affected

=== Kernel Modules (GPU/VGA/DRM) ===
i915                 4382720  3
drm_buddy              28672  1 i915
i2c_algo_bit           16384  1 i915
drm_display_helper    274432  1 i915
cec                    69632  2 drm_display_helper,i915
ttm                   106496  1 i915
drm_kms_helper        253952  2 drm_display_helper,i915
drm                   774144  7 
drm_kms_helper,drm_display_helper,drm_buddy,i915,ttm
video                  81920  2 fujitsu_laptop,i915

=== Key Package Versions ===
期望状态=未知(u)/安装(i)/删除(r)/清除(p)/保持(h)
| 状态=未安装(n)/已安装(i)/仅存配置(c)/仅解压缩(U)/é…
ç½®å¤±è´¥(F)/不完全安装(H)/触发器等待(W)/触发器未决(T)
|/ 错误?=(无)/须重装(R) (状态,错误:大写=故障)
||/ 名称                              版本                     体系结构 
    描述
+++-=================================-========================-============-=================================================
ii  libpciaccess0:amd64               0.17-3+b3                amd64        
Generic PCI access library for X
ii  linux-image-6.12.90+deb13.1-amd64 6.12.90-2                amd64        
Linux 6.12 for 64-bit PCs (signed)
ii  xserver-xorg-core                 2:21.1.16-1.3+deb13u2    amd64        
Xorg X server - core server
ii  xserver-xorg-video-intel          2:2.99.917+git20210115-1 amd64        
X.Org X server -- Intel i8xx, i9xx display driver

=== i915/DRM/VGA Kernel Log ===
[    0.221807] Console: colour VGA+ 80x25
[    0.490935] pci 0000:00:02.0: vgaarb: setting as boot VGA device
[    0.490935] pci 0000:00:02.0: vgaarb: bridge control possible
[    0.490935] pci 0000:00:02.0: vgaarb: VGA device added: 
decodes=io+mem,owns=io+mem,locks=none
[    0.490935] vgaarb: loaded
[    2.254660] ACPI: bus type drm_connector registered
[    4.331699] i915 0000:00:02.0: [drm] Found G33 (device ID 29c2) display 
version 3.00 stepping N/A
[    4.332628] i915 0000:00:02.0: vgaarb: deactivate vga console
[    4.334884] i915 0000:00:02.0: vgaarb: VGA decodes changed: 
olddecodes=io+mem,decodes=io+mem:owns=io+mem
[    4.350097] i915 0000:00:02.0: [drm] Initialized overlay support.
[    4.350718] [drm] Initialized i915 1.6.0 for 0000:00:02.0 on minor 0
[    4.380813] fbcon: i915drmfb (fb0) is primary device
[    4.454898] i915 0000:00:02.0: [drm] fb0: i915drmfb frame buffer device
[    6.149513] systemd[1]: Starting [email protected] - Load Kernel Module 
drm...
[    6.311697] systemd[1]: [email protected]: Deactivated successfully.
[    6.312126] systemd[1]: Finished [email protected] - Load Kernel Module 
drm.

=== Xorg Current Driver & DPMS Status ===
[   612.066] (II) LoadModule: "intel"
[   612.067] (II) LoadModule: "modesetting"
[   612.074] (==) intel(0): DPMS enabled

Attachment: Xorg-intel-dpms-crash.log
Description: Xorg-intel-dpms-crash.log

Attachment: Xorg-modesetting-init-crash.log
Description: Xorg-modesetting-init-crash.log

/*
 * Copyright (c) 2007 Paulo R. Zanoni, Tiago Vignatti
 *               2009 Tiago Vignatti
 *
 * Permission is hereby granted, free of charge, to any person
 * obtaining a copy of this software and associated documentation
 * files (the "Software"), to deal in the Software without
 * restriction, including without limitation the rights to use,
 * copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following
 * conditions:
 *
 * The above copyright notice and this permission notice shall be
 * included in all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 */

#ifdef HAVE_CONFIG_H
#include "config.h"
#endif

#include <stdio.h>
#include <string.h>
#include <unistd.h>
#include <fcntl.h>
#include <errno.h>
#include <stdlib.h>
#include <limits.h>

#include "pciaccess.h"
#include "pciaccess_private.h"

#define BUFSIZE 64

static int
parse_string_to_decodes_rsrc(char *input, int *vga_count, struct pci_slot_match 
*match)
{
    char *tok;
    char *input_sp = NULL, *count_sp, *pci_sp;
    char tmp[32];

    tok = strtok_r(input,",",&input_sp);
    if (!tok)
        goto fail;

    strncpy(tmp, input, 15);
    tmp[15] = 0;

    tok = strtok_r(tmp,":",&count_sp);
    if (!tok)
        goto fail;
    tok = strtok_r(NULL, ":",&count_sp);
    if (!tok)
        goto fail;

    *vga_count = strtoul(tok, NULL, 10);
    if (*vga_count == LONG_MAX)
        goto fail;

#ifdef DEBUG
    fprintf(stderr,"vga count is %d\n", *vga_count);
#endif

    tok = strtok_r(NULL, ",",&input_sp);
    if (!tok)
        goto fail;

    if (match) {
        strncpy(tmp, tok, 32);
        tmp[31] = 0;
        tok = strtok_r(tmp, ":", &pci_sp);
        if (!tok)
            goto fail;
        tok = strtok_r(NULL, ":", &pci_sp);
        if (!tok)
            goto fail;
        match->domain = strtoul(tok, NULL, 16);

        tok = strtok_r(NULL, ":", &pci_sp);
        if (!tok)
            goto fail;
        match->bus = strtoul(tok, NULL, 16);

        tok = strtok_r(NULL, ".", &pci_sp);
        if (!tok)
            goto fail;
        match->dev = strtoul(tok, NULL, 16);

        tok = strtok_r(NULL, ".", &pci_sp);
        if (!tok)
            goto fail;
        match->func = strtoul(tok, NULL, 16);
    }

    tok = strtok_r(NULL, ",",&input_sp);
    if (!tok)
        goto fail;
    tok = strtok_r(tok, "=", &input_sp);
    if (!tok)
        goto fail;
    tok = strtok_r(NULL, "=", &input_sp);
    if (!tok)
        goto fail;

    if (!strncmp(tok, "io+mem", 6))
        return VGA_ARB_RSRC_LEGACY_IO | VGA_ARB_RSRC_LEGACY_MEM;
    if (!strncmp(tok, "io", 2))
        return VGA_ARB_RSRC_LEGACY_IO;
    if (!strncmp(tok, "mem", 3))
        return VGA_ARB_RSRC_LEGACY_MEM;
fail:
    return VGA_ARB_RSRC_NONE;
}

int
pci_device_vgaarb_init(void)
{
    struct pci_slot_match match;
    char buf[BUFSIZE + 1]; /* reading BUFSIZE characters, + 1 for NULL */
    int ret, rsrc;

    if (!pci_sys)
        return -1;

    if ((pci_sys->vgaarb_fd = open ("/dev/vga_arbiter", O_RDWR | O_CLOEXEC)) < 
0) {
        return errno;
    }

    ret = read(pci_sys->vgaarb_fd, buf, BUFSIZE);
    if (ret <= 0)
        return -1;

    buf[ret] = 0; /* ret will never be greater than BUFSIZE */

    memset(&match, 0xff, sizeof(match));
    /* need to find the device to go back to and what it was decoding */
    rsrc = parse_string_to_decodes_rsrc(buf, &pci_sys->vga_count, &match);

    pci_sys->vga_default_dev = pci_device_find_by_slot(match.domain, match.bus, 
match.dev, match.func);

    if (pci_sys->vga_default_dev)
        pci_sys->vga_default_dev->vgaarb_rsrc = rsrc;
    return 0;
}

void
pci_device_vgaarb_fini(void)
{
    if (!pci_sys)
        return;

    close(pci_sys->vgaarb_fd);
}

/**
 * Writes message on vga device. The messages are defined by the kernel
 * implementation.
 *
 * \param fd    vga arbiter device.
 * \param buf   message itself.
 * \param len   message length.
 *
 * \return
 * Zero on success, 1 if something gets wrong and 2 if fd is busy (only for
 * 'trylock')
 */
static int
vgaarb_write(int fd, char *buf, int len)
{
    int ret;


    buf[len] = '\0';

    ret = write(fd, buf, len);
    if (ret == -1) {
        /* the user may have called "trylock" and didn't get the lock */
        if (errno == EBUSY)
            return 2;

#ifdef DEBUG
        fprintf(stderr, "write error");
#endif
        return 1;
    }
    else if (ret != len) {
        /* it's need to receive the exactly amount required. */
#ifdef DEBUG
        fprintf(stderr, "write error: wrote different than expected\n");
#endif
        return 1;
    }

#ifdef DEBUG
    fprintf(stderr, "%s: successfully wrote: '%s'\n", __FUNCTION__, buf);
#endif

    return 0;
}


static const char *
rsrc_to_str(int iostate)
{
    switch (iostate) {
    case VGA_ARB_RSRC_LEGACY_IO | VGA_ARB_RSRC_LEGACY_MEM:
        return "io+mem";
    case VGA_ARB_RSRC_LEGACY_IO:
        return "io";
    case VGA_ARB_RSRC_LEGACY_MEM:
        return "mem";
    }

    return "none";
}

int
pci_device_vgaarb_set_target(struct pci_device *dev)
{
    int len;
    char buf[BUFSIZE + 1]; /* reading BUFSIZE characters, + 1 for NULL */
    int ret;

    if (!dev)
        dev = pci_sys->vga_default_dev;
    if (!dev)
        return -1;

    len = snprintf(buf, BUFSIZE, "target PCI:%04x:%02x:%02x.%x",
                   dev->domain, dev->bus, dev->dev, dev->func);

    ret = vgaarb_write(pci_sys->vgaarb_fd, buf, len);
    if (ret)
        return ret;

    ret = read(pci_sys->vgaarb_fd, buf, BUFSIZE);
    if (ret <= 0)
        return -1;

    buf[ret] = 0; /* ret will never be greater than BUFSIZE */

    dev->vgaarb_rsrc = parse_string_to_decodes_rsrc(buf, &pci_sys->vga_count, 
NULL);
    pci_sys->vga_target = dev;
    return 0;
}

int
pci_device_vgaarb_decodes(int new_vgaarb_rsrc)
{
    int len;
    char buf[BUFSIZE + 1]; /* reading BUFSIZE characters, + 1 for NULL */
    int ret;
    struct pci_device *dev = pci_sys->vga_target;

    if (!dev)
        return -1;
    if (dev->vgaarb_rsrc == new_vgaarb_rsrc)
        return 0;

    len = snprintf(buf, BUFSIZE, "decodes %s", rsrc_to_str(new_vgaarb_rsrc));
    ret = vgaarb_write(pci_sys->vgaarb_fd, buf, len);
    if (ret == 0)
        dev->vgaarb_rsrc = new_vgaarb_rsrc;

    ret = read(pci_sys->vgaarb_fd, buf, BUFSIZE);
    if (ret <= 0)
        return -1;

    buf[ret] = 0; /* ret will never be greater than BUFSIZE */

    parse_string_to_decodes_rsrc(buf, &pci_sys->vga_count, NULL);

    return ret;
}

int
pci_device_vgaarb_lock(void)
{
    int len;
    char buf[BUFSIZE];
    struct pci_device *dev = pci_sys->vga_target;

    if (!dev)
        return -1;

    if (dev->vgaarb_rsrc == 0 || pci_sys->vga_count == 1)
        return 0;

    len = snprintf(buf, BUFSIZE, "lock %s", rsrc_to_str(dev->vgaarb_rsrc));

    return vgaarb_write(pci_sys->vgaarb_fd, buf, len);
}

int
pci_device_vgaarb_trylock(void)
{
    int len;
    char buf[BUFSIZE];
    struct pci_device *dev = pci_sys->vga_target;

    if (!dev)
        return -1;

    if (dev->vgaarb_rsrc == 0 || pci_sys->vga_count == 1)
        return 0;

    len = snprintf(buf, BUFSIZE, "trylock %s", rsrc_to_str(dev->vgaarb_rsrc));

    return vgaarb_write(pci_sys->vgaarb_fd, buf, len);
}

int
pci_device_vgaarb_unlock(void)
{
    int len;
    char buf[BUFSIZE];
    struct pci_device *dev = pci_sys->vga_target;

    if (!dev)
        return -1;

    if (dev->vgaarb_rsrc == 0 || pci_sys->vga_count == 1)
        return 0;

    len = snprintf(buf, BUFSIZE, "unlock %s", rsrc_to_str(dev->vgaarb_rsrc));

    return vgaarb_write(pci_sys->vgaarb_fd, buf, len);
}

int pci_device_vgaarb_get_info(struct pci_device *dev, int *vga_count, int 
*rsrc_decodes)
{
    *vga_count = pci_sys->vga_count;
    if (!dev)
        return 0;

    *rsrc_decodes = dev->vgaarb_rsrc;
        return 0;
}

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