Maybe the problem is the modeline. I just don't see how 106.2 kHz * 2160 can give a pixel clock of 162 MHz.
(**) R128(0): Default mode "1600x1200": 162.0 MHz, 106.2 kHz, 85.0 Hz (II) R128(0): Modeline "1600x1200" 162.00 1600 1664 1688 2160 1200 1202 1205 1250 +hsync +vsync Is this a bug or a red herring? Marc
