Author: branden
Date: 2004-05-03 18:29:13 -0500 (Mon, 03 May 2004)
New Revision: 1358
Modified:
trunk/debian/CHANGESETS
trunk/debian/patches/000_stolen_from_HEAD.diff
trunk/debian/patches/042_savage_fix_pci_ids.diff
trunk/debian/patches/453_ia64_zx1_pci_support.diff
Log:
Update XFree86 PCI ID database from CVS HEAD as of 2003-10-30. This lays the
foundation for future updates to drivers and PCI bus handling code.
Resynchronize patches #042 and #453.
(This patch should have no noticeable effect at build or run time.)
Modified: trunk/debian/CHANGESETS
===================================================================
--- trunk/debian/CHANGESETS 2004-05-03 20:29:45 UTC (rev 1357)
+++ trunk/debian/CHANGESETS 2004-05-03 23:29:13 UTC (rev 1358)
@@ -27,4 +27,8 @@
debian/scripts where this was not already the case.
1347
+Update XFree86 PCI ID database from CVS HEAD as of 2003-10-30. This lays the
+foundation for future updates to drivers and PCI bus handling code.
+ 1358
+
vim:set ai et sts=4 sw=4 tw=80:
Modified: trunk/debian/patches/000_stolen_from_HEAD.diff
===================================================================
--- trunk/debian/patches/000_stolen_from_HEAD.diff 2004-05-03 20:29:45 UTC
(rev 1357)
+++ trunk/debian/patches/000_stolen_from_HEAD.diff 2004-05-03 23:29:13 UTC
(rev 1358)
@@ -96,6 +96,41 @@
xc/programs/xkbcomp/symbols/inet @ 1.33 [PARTIAL]
436. Added support for the Compaq Evo keyboard (Stanislav Brabec).
+xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h @ 1.145
+ [Define PCI ID for Intel 440EX bridge. Marc Aurele La France]
+xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h @ 1.146
+ [Define PCI IDs for several ATI RS100 and RV280 chipsets. Hui Yu, Kevin
+ E. Martin]
+xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h @ 1.147
+ Keep ATI IDs in ascending order.
+ Some formtting fixes. [sic; Marc Aurele La France]
+xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h @ 1.148
+ [Define PCI IDs for Intel 430VX and 430TX bridges. Marc Aurele La France]
+xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h @ 1.149
+ [Define PCI IDs for several Radeon chipsets: R350 (9800), RV350 (9600,
+ M10), RS250 (IGP7000), RS300 (IGP9000). Hui Yu, Kevin E. Martin]
+xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h @ 1.150
+ Add/update copyright and license notices. [David Dawes]
+xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h @ 1.151
+ [Undefine several PCI IDs: PCI_VENDOR_ALI_2, PCI_VENDOR_VIA, (Acer
+ Laboratories Inc) PCI_CHIP_M1541, (VIA Technologies) PCI_CHIP_APOLLOVP1
+ and PCI_CHIP_APOLLOPRO133X, (Intel) PCI_CHIP_430HX_BRIDGE,
+ PCI_CHIP_430VX_BRIDGE, PCI_CHIP_430TX_BRIDGE, PCI_CHIP_440EX_BRIDGE,
+ PCI_CHIP_440BX_BRIDGE. Marc Aurele La France]
+xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h @ 1.152
+ add Trident CyberBladeXP4 PCI entry [Alan Hourihane]
+xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h @ 1.153
+ [Define PCI ID for ATI RV280 (5964). Michel Dänzer]
+xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h @ 1.154
+ [Define PCI IDs for several ATI chipsets (9800XT/SE, 9600XT/SE, M11, T2/X2,
+ etc.).
+ Clean up unused/secondary chip PCI IDs. Hui Yu, Kevin E. Martin]
+xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h @ 1.155
+ [Define PCI ID for SiliconMotion Cougar3DR chip. Chris Edgington, Egbert
+ Eich]
+xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h @ 1.156
+ [Define PCI ID for HP ZX1 QuickSilver chipset. Marc Aurele La France]
+
diff -urN xc.orig/config/imake/imake.c xc/config/imake/imake.c
--- xc.orig/config/imake/imake.c 2002-12-17 09:48:27.000000000 +1100
+++ xc/config/imake/imake.c 2003-04-09 01:58:14.000000000 +1000
@@ -1852,3 +1887,226 @@
key <I23> { [ XF86WWW ] };
key <I1F> { [ XF86HomePage ] };
key <I1A> { [ XF86Search ] };
+Index: xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h
+===================================================================
+RCS file: /cvs/xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h,v
+retrieving revision 1.144
+retrieving revision 1.156
+diff -u -r1.144 -r1.156
+--- xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h 7 Feb 2003
20:41:11 -0000 1.144
++++ xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h 30 Oct 2003
15:26:33 -0000 1.156
+@@ -1,7 +1,33 @@
+-/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h,v 1.144
2003/02/07 20:41:11 martin Exp $ */
++/* $XFree86: xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h,v 1.156
2003/10/30 15:26:33 tsi Exp $ */
++
+ /*
+- * Copyright 1995-2002 by The XFree86 Project, Inc.
++ * Copyright (c) 1995-2003 by The XFree86 Project, Inc.
++ *
++ * Permission is hereby granted, free of charge, to any person obtaining a
++ * copy of this software and associated documentation files (the "Software"),
++ * to deal in the Software without restriction, including without limitation
++ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
++ * and/or sell copies of the Software, and to permit persons to whom the
++ * Software is furnished to do so, subject to the following conditions:
++ *
++ * The above copyright notice and this permission notice shall be included in
++ * all copies or substantial portions of the Software.
+ *
++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
++ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
++ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
++ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
++ * OTHER DEALINGS IN THE SOFTWARE.
++ *
++ * Except as contained in this notice, the name of the copyright holder(s)
++ * and author(s) shall not be used in advertising or otherwise to promote
++ * the sale, use or other dealings in this Software without prior written
++ * authorization from the copyright holder(s) and author(s).
++ */
++
++/*
+ * This file contains macros for the PCI Vendor and Device IDs for video
+ * cards plus a few other things that are needed in drivers or elsewhere.
+ * This information is used in several ways:
+@@ -57,12 +83,10 @@
+ #define PCI_VENDOR_SUN 0x108E
+ #define PCI_VENDOR_DIAMOND 0x1092
+ #define PCI_VENDOR_BROOKTREE 0x109E
+-#define PCI_VENDOR_ALI_2 0x10B9
+ #define PCI_VENDOR_NEOMAGIC 0x10C8
+ #define PCI_VENDOR_NVIDIA 0x10DE
+ #define PCI_VENDOR_IMS 0x10E0
+ #define PCI_VENDOR_INTEGRAPHICS 0x10EA
+-#define PCI_VENDOR_VIA 0x1106
+ #define PCI_VENDOR_ALLIANCE 0x1142
+ #define PCI_VENDOR_RENDITION 0x1163
+ #define PCI_VENDOR_3DFX 0x121A
+@@ -89,14 +113,31 @@
+ #define PCI_CHIP_QV1280 0x3033
+
+ /* ATI */
++#define PCI_CHIP_RS100_4136 0x4136
++#define PCI_CHIP_RS200_4137 0x4137
+ #define PCI_CHIP_R300_AD 0x4144
+ #define PCI_CHIP_R300_AE 0x4145
+ #define PCI_CHIP_R300_AF 0x4146
+ #define PCI_CHIP_R300_AG 0x4147
++#define PCI_CHIP_R350_AH 0x4148
++#define PCI_CHIP_R350_AI 0x4149
++#define PCI_CHIP_R350_AJ 0x414A
++#define PCI_CHIP_R350_AK 0x414B
++#define PCI_CHIP_RV350_AP 0x4150
++#define PCI_CHIP_RV350_AQ 0x4151
++#define PCI_CHIP_RV360_AR 0x4152
++#define PCI_CHIP_RV350_AS 0x4153
++#define PCI_CHIP_RV350_AT 0x4154
++#define PCI_CHIP_RV350_AV 0x4156
+ #define PCI_CHIP_MACH32 0x4158
++#define PCI_CHIP_RS250_4237 0x4237
+ #define PCI_CHIP_R200_BB 0x4242
++#define PCI_CHIP_R200_BC 0x4243
++#define PCI_CHIP_RS100_4336 0x4336
++#define PCI_CHIP_RS200_4337 0x4337
+ #define PCI_CHIP_MACH64CT 0x4354
+ #define PCI_CHIP_MACH64CX 0x4358
++#define PCI_CHIP_RS250_4437 0x4437
+ #define PCI_CHIP_MACH64ET 0x4554
+ #define PCI_CHIP_MACH64GB 0x4742
+ #define PCI_CHIP_MACH64GD 0x4744
+@@ -140,12 +181,23 @@
+ #define PCI_CHIP_RV250_Le 0x4C65
+ #define PCI_CHIP_RV250_Lf 0x4C66
+ #define PCI_CHIP_RV250_Lg 0x4C67
++#define PCI_CHIP_RV250_Ln 0x4C6E
+ #define PCI_CHIP_RAGE128MF 0x4D46
+ #define PCI_CHIP_RAGE128ML 0x4D4C
+ #define PCI_CHIP_R300_ND 0x4E44
+ #define PCI_CHIP_R300_NE 0x4E45
+ #define PCI_CHIP_R300_NF 0x4E46
+ #define PCI_CHIP_R300_NG 0x4E47
++#define PCI_CHIP_R350_NH 0x4E48
++#define PCI_CHIP_R350_NI 0x4E49
++#define PCI_CHIP_R360_NJ 0x4E4A
++#define PCI_CHIP_R350_NK 0x4E4B
++#define PCI_CHIP_RV350_NP 0x4E50
++#define PCI_CHIP_RV350_NQ 0x4E51
++#define PCI_CHIP_RV350_NR 0x4E52
++#define PCI_CHIP_RV350_NS 0x4E53
++#define PCI_CHIP_RV350_NT 0x4E54
++#define PCI_CHIP_RV350_NV 0x4E56
+ #define PCI_CHIP_RAGE128PA 0x5041
+ #define PCI_CHIP_RAGE128PB 0x5042
+ #define PCI_CHIP_RAGE128PC 0x5043
+@@ -186,11 +238,6 @@
+ #define PCI_CHIP_RV200_QX 0x5158
+ #define PCI_CHIP_RV100_QY 0x5159
+ #define PCI_CHIP_RV100_QZ 0x515A
+-#define PCI_CHIP_R200_Qh 0x5168
+-#define PCI_CHIP_R200_Qi 0x5169
+-#define PCI_CHIP_R200_Qj 0x516A
+-#define PCI_CHIP_R200_Qk 0x516B
+-#define PCI_CHIP_R200_Ql 0x516C /* Undocumented in all ATI
manuals */
+ #define PCI_CHIP_RAGE128RE 0x5245
+ #define PCI_CHIP_RAGE128RF 0x5246
+ #define PCI_CHIP_RAGE128RG 0x5247
+@@ -213,6 +260,16 @@
+ #define PCI_CHIP_MACH64VT 0x5654
+ #define PCI_CHIP_MACH64VU 0x5655
+ #define PCI_CHIP_MACH64VV 0x5656
++#define PCI_CHIP_RS300_5834 0x5834
++#define PCI_CHIP_RS300_5835 0x5835
++#define PCI_CHIP_RS300_5836 0x5836
++#define PCI_CHIP_RS300_5837 0x5837
++#define PCI_CHIP_RV280_5960 0x5960
++#define PCI_CHIP_RV280_5961 0x5961
++#define PCI_CHIP_RV280_5962 0x5962
++#define PCI_CHIP_RV280_5964 0x5964
++#define PCI_CHIP_RV280_5C61 0x5C61
++#define PCI_CHIP_RV280_5C63 0x5C63
+
+ /* Avance Logic */
+ #define PCI_CHIP_ALG2064 0x2064
+@@ -259,6 +316,7 @@
+ #define PCI_CHIP_AMD761 0x700E
+
+ /* Trident */
++#define PCI_CHIP_2100 0x2100
+ #define PCI_CHIP_8400 0x8400
+ #define PCI_CHIP_8420 0x8420
+ #define PCI_CHIP_8500 0x8500
+@@ -343,20 +401,21 @@
+ #define PCI_CHIP_SIS6326 0x6326
+ #define PCI_CHIP_SIS7001 0x7001
+ #define PCI_CHIP_SIS300 0x0300
+-#define PCI_CHIP_SIS315H 0x0310
+-#define PCI_CHIP_SIS315PRO 0x0325
+-#define PCI_CHIP_SIS330 0x0330
++#define PCI_CHIP_SIS315H 0x0310
++#define PCI_CHIP_SIS315PRO 0x0325
++#define PCI_CHIP_SIS330 0x0330
+ #define PCI_CHIP_SIS630 0x6300
+ #define PCI_CHIP_SIS540 0x5300
+-#define PCI_CHIP_SIS550 0x5315
+-#define PCI_CHIP_SIS650 0x6325
+-#define PCI_CHIP_SIS730 0x7300
++#define PCI_CHIP_SIS550 0x5315
++#define PCI_CHIP_SIS650 0x6325
++#define PCI_CHIP_SIS730 0x7300
+
+ /* Hewlett-Packard */
+ #define PCI_CHIP_ELROY 0x1054
+ #define PCI_CHIP_ZX1_SBA 0x1229
+ #define PCI_CHIP_ZX1_IOC 0x122A
+ #define PCI_CHIP_ZX1_LBA 0x122E /* a.k.a. Mercury */
++#define PCI_CHIP_ZX1_AGP8 0x12B4 /* a.k.a. QuickSilver */
+
+ /* SGS */
+ #define PCI_CHIP_STG2000 0x0008
+@@ -389,9 +448,6 @@
+ #define PCI_CHIP_BT848 0x0350
+ #define PCI_CHIP_BT849 0x0351
+
+-/* Acer Laboratories Inc (ALI_2) */
+-#define PCI_CHIP_M1541 0x1541
+-
+ /* NVIDIA */
+ #define PCI_CHIP_NV1 0x0008
+ #define PCI_CHIP_DAC64 0x0009
+@@ -442,10 +498,6 @@
+ #define PCI_CHIP_IMSTT128 0x9128
+ #define PCI_CHIP_IMSTT3D 0x9135
+
+-/* VIA Technologies */
+-#define PCI_CHIP_APOLLOVP1 0x0585
+-#define PCI_CHIP_APOLLOPRO133X 0x0691
+-
+ /* Alliance Semiconductor */
+ #define PCI_CHIP_AP6410 0x3210
+ #define PCI_CHIP_AP6422 0x6422
+@@ -538,7 +590,6 @@
+ /* Intel */
+ #define PCI_CHIP_I815_BRIDGE 0x1130
+ #define PCI_CHIP_I815 0x1132
+-#define PCI_CHIP_430HX_BRIDGE 0x1250
+ #define PCI_CHIP_82801_P2P 0x244E
+ #define PCI_CHIP_845_G_BRIDGE 0x2560
+ #define PCI_CHIP_845_G 0x2562
+@@ -550,7 +601,6 @@
+ #define PCI_CHIP_I810_DC100 0x7123
+ #define PCI_CHIP_I810_E_BRIDGE 0x7124
+ #define PCI_CHIP_I810_E 0x7125
+-#define PCI_CHIP_440BX_BRIDGE 0x7190
+ #define PCI_CHIP_I740_AGP 0x7800
+ #define PCI_CHIP_460GX_PXB 0x84CB
+ #define PCI_CHIP_460GX_SAC 0x84E0
+@@ -565,6 +615,7 @@
+ #define PCI_CHIP_SMI710 0x0710
+ #define PCI_CHIP_SMI712 0x0712
+ #define PCI_CHIP_SMI720 0x0720
++#define PCI_CHIP_SMI731 0x0730
+
+ /* VMware */
+ #define PCI_CHIP_VMWARE0405 0x0405
Modified: trunk/debian/patches/042_savage_fix_pci_ids.diff
===================================================================
--- trunk/debian/patches/042_savage_fix_pci_ids.diff 2004-05-03 20:29:45 UTC
(rev 1357)
+++ trunk/debian/patches/042_savage_fix_pci_ids.diff 2004-05-03 23:29:13 UTC
(rev 1358)
@@ -1,10 +1,12 @@
$Id$
-This patch from Mike A. Harris.
+This patch by Mike A. Harris.
+Not submitted to XFree86.
+
--- xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h.savage-pci-id-fixes
2003-01-08 04:28:57.000000000 -0500
+++ xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h 2003-01-08
05:28:02.000000000 -0500
-@@ -510,21 +510,34 @@
+@@ -550,21 +550,34 @@
#define PCI_CHIP_TRIO64V2_DXGX 0x8901
#define PCI_CHIP_PLATO_PX 0x8902
#define PCI_CHIP_Trio3D 0x8904
Modified: trunk/debian/patches/453_ia64_zx1_pci_support.diff
===================================================================
--- trunk/debian/patches/453_ia64_zx1_pci_support.diff 2004-05-03 20:29:45 UTC
(rev 1357)
+++ trunk/debian/patches/453_ia64_zx1_pci_support.diff 2004-05-03 23:29:13 UTC
(rev 1358)
@@ -16,21 +16,10 @@
Backported by David Mosberger from XFree86 CVS HEAD as of 2003-10-30.
Revision Changes Path
- 1.156 +2 -1 xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h
1.4 +3 -2
xc/programs/Xserver/hw/xfree86/os-support/bus/zx1PCI.c
-(Those were just the last of several commits implementing this functionality.)
+(That was just the last of several commits implementing this functionality.)
---- xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h 2004-03-15
21:51:16.255713536 -0800
-+++ xc/programs/Xserver/hw/xfree86/common/xf86PciInfo.h 2004-03-15
14:08:39.113145471 -0800
-@@ -372,6 +372,7 @@
- #define PCI_CHIP_ZX1_SBA 0x1229
- #define PCI_CHIP_ZX1_IOC 0x122A
- #define PCI_CHIP_ZX1_LBA 0x122E /* a.k.a. Mercury */
-+#define PCI_CHIP_ZX1_AGP8 0x12B4 /* a.k.a. QuickSilver */
-
- /* SGS */
- #define PCI_CHIP_STG2000 0x0008
--- xc/programs/Xserver/hw/xfree86/os-support/bus/zx1PCI.c 2003-02-23
12:26:49.000000000 -0800
+++ xc/programs/Xserver/hw/xfree86/os-support/bus/zx1PCI.c 2004-03-15
14:56:24.346247527 -0800
@@ -97,7 +97,10 @@
