README | 18 configure.ac | 31 - man/intel.man | 39 - src/Makefile.am | 3 src/bios_reader/Makefile.am | 2 src/bios_reader/bios_dumper.c | 3 src/ch7017/ch7017.c | 75 +- src/ch7017/ch7017_reg.h | 14 src/ch7xxx/ch7xxx.c | 28 src/common.h | 73 +- src/fix.5c | 14 src/i810.h | 13 src/i810_dri.c | 20 src/i810_driver.c | 252 ++++++++ src/i810_reg.h | 26 src/i830.h | 145 +++-- src/i830_accel.c | 6 src/i830_bios.c | 4 src/i830_bios.h | 3 src/i830_common.h | 27 src/i830_crt.c | 140 ++-- src/i830_cursor.c | 58 ++ src/i830_debug.c | 61 ++ src/i830_display.c | 416 +++++++++++--- src/i830_display.h | 4 src/i830_dri.c | 593 ++++++++++----------- src/i830_dri.h | 2 src/i830_driver.c | 858 +++++++++++++++++------------- src/i830_dvo.c | 22 src/i830_exa.c | 150 ++++- src/i830_lvds.c | 139 +++- src/i830_memory.c | 1181 ++++++++++++++++++++++++++---------------- src/i830_quirks.c | 104 +++ src/i830_reg.h | 31 + src/i830_render.c | 3 src/i830_tv.c | 103 ++- src/i830_video.c | 224 ++----- src/i830_video.h | 17 src/i830_xaa.c | 114 ++-- src/i915_render.c | 43 - src/i915_video.c | 20 src/i965_render.c | 42 - src/i965_video.c | 8 src/ivch/ivch.c | 20 src/reg_dumper/main.c | 10 src/scripts/clock-graph.5c | 174 ++++++ src/scripts/clock.5c | 40 + src/scripts/fix.5c | 14 src/scripts/tv.5c | 128 ++++ src/sil164/sil164.c | 20 src/sil164/sil164_reg.h | 1 src/tfp410/tfp410.c | 28 src/tfp410/tfp410_reg.h | 2 src/tv.5c | 128 ---- src/xvmc/I810XvMC.h | 1 55 files changed, 3691 insertions(+), 2004 deletions(-)
New commits: commit 177924e879564b7e9e70fd607141978bfd053fff Author: Jesse Barnes <[EMAIL PROTECTED]> Date: Thu Nov 8 18:16:48 2007 -0800 Bump driver version to 2.1.99 in preparation for 2.2 release diff --git a/configure.ac b/configure.ac index 1e6ffe0..b79aac8 100644 --- a/configure.ac +++ b/configure.ac @@ -22,7 +22,7 @@ AC_PREREQ(2.57) AC_INIT([xf86-video-intel], - 2.1.0, + 2.1.99, [https://bugs.freedesktop.org/enter_bug.cgi?product=xorg], xf86-video-intel) commit cb4e5796f0537ea5e0e646d473930c7b826c85d8 Author: Jesse Barnes <[EMAIL PROTECTED]> Date: Thu Nov 8 18:13:47 2007 -0800 Default to EXA If EXA is compiled into the driver, default to using it for acceleration. Hopefully we can remove XAA entirely one day. diff --git a/src/i830_driver.c b/src/i830_driver.c index e8fe3b4..eacaefc 100644 --- a/src/i830_driver.c +++ b/src/i830_driver.c @@ -1430,17 +1430,17 @@ I830PreInit(ScrnInfoPtr pScrn, int flags) * If either XAA or EXA (exclusive) is compiled in, default to it. * * If both are compiled in, and the user didn't specify noAccel, use the - * config option AccelMethod to determine which to use, defaulting to XAA + * config option AccelMethod to determine which to use, defaulting to EXA * if none is specified, or if the string was unrecognized. * * All this *could* go away if we removed XAA support from this driver, * for example. :) */ if (!pI830->noAccel) { -#if (defined(I830_USE_EXA) && defined(I830_USE_XAA)) || !defined(I830_USE_EXA) - pI830->useEXA = FALSE; -#else +#ifdef I830_USE_EXA pI830->useEXA = TRUE; +#else + pI830->useEXA = FALSE; #endif #if defined(I830_USE_XAA) && defined(I830_USE_EXA) int from = X_DEFAULT; commit 43a59ab26b09fcc24de1ed7bd770bb622f899ceb Author: Jesse Barnes <[EMAIL PROTECTED]> Date: Thu Nov 8 16:52:41 2007 -0800 Clear current video crtc on DPMS off When calling the video DPMS off function, make sure we zero out the current crtc so that it will be properly re-set up next time video is turned on. Fix from Peter Clifton with changes by Keith Packard. diff --git a/src/i830_video.c b/src/i830_video.c index 73ae771..5325bbd 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2832,15 +2832,14 @@ i830_crtc_dpms_video(xf86CrtcPtr crtc, Bool on) if (crtc != pPriv->current_crtc) return; - /* Check if it's the crtc the overlay is on */ - if (on) { - i830_overlay_switch_to_crtc (pScrn, crtc); - } else { + /* Check if it's the crtc the overlay is off */ + if (!on) { /* We stop the video when mode switching, so we don't lock up * the engine. The overlayOK will determine whether we can re-enable * with the current video on completion of the mode switch. */ I830StopVideo(pScrn, pPriv, TRUE); + pPriv->current_crtc = NULL; pPriv->overlayOK = FALSE; pPriv->oneLineMode = FALSE; } commit e784e152a8e84b6e447b55a5c7019e7b47e17621 Author: Jesse Barnes <[EMAIL PROTECTED]> Date: Thu Nov 8 16:37:53 2007 -0800 Fix overlay destination clamping The overlay width & height scaling clamp check was reversed. Fix that and update the comment. diff --git a/src/i830_video.c b/src/i830_video.c index 255444b..73ae771 100644 --- a/src/i830_video.c +++ b/src/i830_video.c @@ -2216,11 +2216,11 @@ I830PutImage(ScrnInfoPtr pScrn, pI830->entityPrivate->XvInUse = i830_crtc_pipe (pPriv->current_crtc);; } - /* overlay limits */ - if(src_w > (drw_w * 7)) + /* Clamp dst width & height to 7x of src (overlay limit) */ + if(drw_w > (src_w * 7)) drw_w = src_w * 7; - if(src_h > (drw_h * 7)) + if(drw_h > (src_h * 7)) drw_h = src_h * 7; /* Clip */ commit b8770f710729d616b3ac72544aa522161a78f819 Author: Jesse Barnes <[EMAIL PROTECTED]> Date: Thu Nov 8 16:19:01 2007 -0800 Setup 3D state at EnterVT time In the absence of full suspend/resume support in the kernel, we have to save/restore state in Enter/LeaveVT. For 8xx chips, 3D state may be lost during suspend/resume, so re-emit the basic setup at EnterVT time. Patch from Peter Clifton. diff --git a/src/i830_driver.c b/src/i830_driver.c index 53c7845..e8fe3b4 100644 --- a/src/i830_driver.c +++ b/src/i830_driver.c @@ -3141,8 +3141,9 @@ I830EnterVT(int scrnIndex, int flags) if (pI830->checkDevices) pI830->devicesTimer = TimerSet(NULL, 0, 1000, I830CheckDevicesTimer, pScrn); - /* Mark 3D state as being clobbered */ + /* Mark 3D state as being clobbered and setup the basics */ *pI830->last_3d = LAST_3D_OTHER; + IntelEmitInvarientState(pScrn); return TRUE; } commit 5f92b4c2db9712496b829ee239468e3d14e27d2f Author: Eric Anholt <[EMAIL PROTECTED]> Date: Thu Nov 8 13:31:51 2007 -0800 Bug #12059: Add ch7019 to the list of supported devices for ch7017. While I'm here, fix the chip description to be LVDS instead of TMDS in i2c device. diff --git a/src/ch7017/ch7017.c b/src/ch7017/ch7017.c index f8e2b31..6fc3422 100644 --- a/src/ch7017/ch7017.c +++ b/src/ch7017/ch7017.c @@ -99,7 +99,7 @@ ch7017_init(I2CBusPtr b, I2CSlaveAddr addr) if (priv == NULL) return NULL; - priv->d.DevName = "CH7017/7018 TMDS Controller"; + priv->d.DevName = "CH7017/7018/7019 LVDS Controller"; priv->d.SlaveAddr = addr; priv->d.pI2CBus = b; priv->d.StartTimeout = b->StartTimeout; @@ -111,9 +111,11 @@ ch7017_init(I2CBusPtr b, I2CSlaveAddr addr) if (!xf86I2CReadByte(&priv->d, CH7017_DEVICE_ID, &val)) goto fail; - if (val != CH7017_DEVICE_ID_VALUE && val != CH7018_DEVICE_ID_VALUE) { + if (val != CH7017_DEVICE_ID_VALUE && + val != CH7018_DEVICE_ID_VALUE && + val != CH7019_DEVICE_ID_VALUE) { xf86DrvMsg(priv->d.pI2CBus->scrnIndex, X_ERROR, - "ch7017 not detected, got %d: from %s Slave %d.\n", + "ch701x not detected, got %d: from %s Slave %d.\n", val, priv->d.pI2CBus->BusName, priv->d.SlaveAddr); goto fail; } diff --git a/src/ch7017/ch7017_reg.h b/src/ch7017/ch7017_reg.h index 3344c4e..7b536bd 100644 --- a/src/ch7017/ch7017_reg.h +++ b/src/ch7017/ch7017_reg.h @@ -69,6 +69,7 @@ #define CH7017_DEVICE_ID 0x4b #define CH7017_DEVICE_ID_VALUE 0x1b #define CH7018_DEVICE_ID_VALUE 0x1a +#define CH7019_DEVICE_ID_VALUE 0x19 #define CH7017_XCLK_D2_ADJUST 0x53 #define CH7017_UP_SCALER_COEFF_0 0x55 commit eecd3ccedee6c4acf101591f7e60673660379e62 Author: Jesse Barnes <[EMAIL PROTECTED]> Date: Thu Nov 8 09:31:08 2007 -0800 Check DPLL status before writing PIPEnCONF regs If the DPLL isn't enabled or is in VGA mode, writing the PIPEnCONF registers may cause a hang or crash. So ensure the DPLL is in the proper state before writing them. Another excellent fix from Peter Clifton. diff --git a/src/i830_driver.c b/src/i830_driver.c index 488232d..53c7845 100644 --- a/src/i830_driver.c +++ b/src/i830_driver.c @@ -2052,7 +2052,13 @@ RestoreHWState(ScrnInfoPtr pScrn) OUTREG(DSPASURF, pI830->saveDSPASURF); OUTREG(DSPATILEOFF, pI830->saveDSPATILEOFF); } - OUTREG(PIPEACONF, pI830->savePIPEACONF); + /* + * Make sure the DPLL is active and not in VGA mode or the + * write of PIPEnCONF may cause a crash + */ + if ((pI830->saveDPLL_B & DPLL_VCO_ENABLE) && + (pI830->saveDPLL_B & DPLL_VGA_MODE_DIS)) + OUTREG(PIPEACONF, pI830->savePIPEACONF); i830WaitForVblank(pScrn); OUTREG(DSPACNTR, pI830->saveDSPACNTR); OUTREG(DSPABASE, INREG(DSPABASE)); @@ -2092,7 +2098,13 @@ RestoreHWState(ScrnInfoPtr pScrn) OUTREG(DSPBSURF, pI830->saveDSPBSURF); OUTREG(DSPBTILEOFF, pI830->saveDSPBTILEOFF); } - OUTREG(PIPEBCONF, pI830->savePIPEBCONF); + + /* + * See PIPEnCONF note above + */ + if ((pI830->saveDPLL_B & DPLL_VCO_ENABLE) && + (pI830->saveDPLL_B & DPLL_VGA_MODE_DIS)) + OUTREG(PIPEBCONF, pI830->savePIPEBCONF); i830WaitForVblank(pScrn); OUTREG(DSPBCNTR, pI830->saveDSPBCNTR); OUTREG(DSPBBASE, INREG(DSPBBASE)); commit b434c1a437c407de88396b219560649c2dae82b2 Author: Jesse Barnes <[EMAIL PROTECTED]> Date: Thu Nov 1 12:06:07 2007 -0700 Framebuffer compression fix: front buffer may not be at fence 0 Fix a long standing bug in the framebuffer compression code (thanks to Pierre Willenbrock!) that prevented FBC from working correctly if the front buffer was anywhere but fence register 0. diff --git a/src/i830_display.c b/src/i830_display.c index a99b4a5..d988b86 100644 --- a/src/i830_display.c +++ b/src/i830_display.c @@ -611,6 +611,7 @@ i830_enable_fb_compression(xf86CrtcPtr crtc) fbc_ctl |= (compressed_stride & 0xff) << FBC_CTL_STRIDE_SHIFT; fbc_ctl |= (interval & 0x2fff) << FBC_CTL_INTERVAL_SHIFT; fbc_ctl |= FBC_CTL_UNCOMPRESSIBLE; + fbc_ctl |= pI830->front_buffer->fence_nr; OUTREG(FBC_CONTROL, fbc_ctl); xf86DrvMsg(pScrn->scrnIndex, X_INFO, "fbc enabled on plane %c\n", plane ? commit 50d3693a6862028e50bc5ba8c788e7ea573c3eb8 Author: Zhenyu Wang <[EMAIL PROTECTED]> Date: Thu Nov 1 22:22:27 2007 +0800 Fix allocation reset for really not free BO allocator diff --git a/src/i830_memory.c b/src/i830_memory.c index d9f8a26..7b89c40 100644 --- a/src/i830_memory.c +++ b/src/i830_memory.c @@ -322,7 +322,7 @@ i830_reset_allocations(ScrnInfoPtr pScrn) } #endif - i830_free_memory(pScrn, pI830->memory_list->next); + i830_free_memory(pScrn, mem); } /* Free any allocations in buffer objects */ commit ecd995d533d28b622afc71a20504d47c33ff5b8d Author: Alan Coopersmith <[EMAIL PROTECTED]> Date: Tue Oct 30 18:20:49 2007 -0700 Fix builds without DRI diff --git a/src/i830_driver.c b/src/i830_driver.c index 0ab7e8f..488232d 100644 --- a/src/i830_driver.c +++ b/src/i830_driver.c @@ -172,6 +172,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #include <stdlib.h> #include <stdio.h> #include <sys/mman.h> +#include <errno.h> #include "xf86.h" #include "xf86_OSproc.h" @@ -202,7 +203,6 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #ifdef XF86DRI #include "dri.h" #include <sys/ioctl.h> -#include <errno.h> #ifdef XF86DRI_MM #include "xf86mm.h" #endif diff --git a/src/i830_memory.c b/src/i830_memory.c index 91d7beb..d9f8a26 100644 --- a/src/i830_memory.c +++ b/src/i830_memory.c @@ -313,12 +313,14 @@ i830_reset_allocations(ScrnInfoPtr pScrn) while (pI830->memory_list->next->next != NULL) { i830_memory *mem = pI830->memory_list->next; +#ifdef XF86DRI /* Don't reset BO allocator, which we set up at init. */ if (pI830->memory_manager == mem) { mem = mem->next; if (mem->next == NULL) break; } +#endif i830_free_memory(pScrn, pI830->memory_list->next); } @@ -825,11 +827,14 @@ i830_allocate_memory(ScrnInfoPtr pScrn, const char *name, I830Ptr pI830 = I830PTR(pScrn); i830_memory *mem; +#ifdef XF86DRI_MM if (pI830->memory_manager && !(flags & NEED_PHYSICAL_ADDR) && !(flags & NEED_LIFETIME_FIXED)) { return i830_allocate_memory_bo(pScrn, name, size, alignment, flags); - } else { + } else +#endif + { mem = i830_allocate_aperture(pScrn, name, size, alignment, flags); if (mem == NULL) return NULL; commit 7c88b58a93fce9fda59b6344acb87af16336e287 Author: Alan Coopersmith <[EMAIL PROTECTED]> Date: Tue Oct 30 18:20:15 2007 -0700 Clear compiler error: "void functions cannot return values" diff --git a/src/i830_display.c b/src/i830_display.c index 292814c..a99b4a5 100644 --- a/src/i830_display.c +++ b/src/i830_display.c @@ -224,9 +224,9 @@ static void i9xx_clock(int refclk, intel_clock_t *clock) static void intel_clock(I830Ptr pI830, int refclk, intel_clock_t *clock) { if (IS_I9XX(pI830)) - return i9xx_clock (refclk, clock); + i9xx_clock (refclk, clock); else - return i8xx_clock (refclk, clock); + i8xx_clock (refclk, clock); } static void commit d2c78f82c20f33fc9c22cab8a7ca161e57a34bf8 Author: Thomas Hellstrom <thomas-at-tungstengraphics-dot-com> Date: Wed Oct 24 19:34:12 2007 +0200 Adapt to DRM Lockfree and setStatus changes. diff --git a/src/i830_driver.c b/src/i830_driver.c index 4407241..0ab7e8f 100644 --- a/src/i830_driver.c +++ b/src/i830_driver.c @@ -3004,8 +3004,8 @@ I830LeaveVT(int scrnIndex, int flags) */ #ifdef XF86DRI_MM if (pI830->directRenderingOpen) { - if (pI830->memory_manager != NULL) { - drmMMLock(pI830->drmSubFD, DRM_BO_MEM_TT); + if (pI830->memory_manager != NULL && pScrn->vtSema) { + drmMMLock(pI830->drmSubFD, DRM_BO_MEM_TT, 1, 0); } } #endif /* XF86DRI_MM */ @@ -3043,8 +3043,8 @@ I830EnterVT(int scrnIndex, int flags) /* Unlock the memory manager first of all so that we can pin our * buffer objects */ - if (pI830->memory_manager != NULL) { - drmMMUnlock(pI830->drmSubFD, DRM_BO_MEM_TT); + if (pI830->memory_manager != NULL && pScrn->vtSema) { + drmMMUnlock(pI830->drmSubFD, DRM_BO_MEM_TT, 1); } } #endif /* XF86DRI_MM */ @@ -3157,6 +3157,14 @@ I830CloseScreen(int scrnIndex, ScreenPtr pScreen) if (pScrn->vtSema == TRUE) { I830LeaveVT(scrnIndex, 0); +#ifdef XF86DRI_MM + if (pI830->directRenderingEnabled) { + if (pI830->memory_manager != NULL) { + drmMMUnlock(pI830->drmSubFD, DRM_BO_MEM_TT, 1); + } + } +#endif /* XF86DRI_MM */ + } if (pI830->devicesTimer) diff --git a/src/i830_memory.c b/src/i830_memory.c index bdfbba6..91d7beb 100644 --- a/src/i830_memory.c +++ b/src/i830_memory.c @@ -165,7 +165,17 @@ i830_bind_memory(ScrnInfoPtr pScrn, i830_memory *mem) I830Ptr pI830 = I830PTR(pScrn); int ret; - ret = drmBOSetPin(pI830->drmSubFD, &mem->bo, 1); + ret = drmBOSetStatus(pI830->drmSubFD, &mem->bo, + DRM_BO_FLAG_MEM_VRAM | + DRM_BO_FLAG_MEM_TT | + DRM_BO_FLAG_READ | + DRM_BO_FLAG_WRITE | + DRM_BO_FLAG_NO_EVICT, + DRM_BO_MASK_MEM | + DRM_BO_FLAG_READ | + DRM_BO_FLAG_WRITE | + DRM_BO_FLAG_NO_EVICT, + 0, 0, 0); if (ret != 0) return FALSE; @@ -226,7 +236,10 @@ i830_unbind_memory(ScrnInfoPtr pScrn, i830_memory *mem) I830Ptr pI830 = I830PTR(pScrn); int ret; - ret = drmBOSetPin(pI830->drmSubFD, &mem->bo, 0); + ret = drmBOSetStatus(pI830->drmSubFD, &mem->bo, + 0, DRM_BO_FLAG_NO_EVICT, + 0, 0, 0); + if (ret == 0) { mem->bound = FALSE; /* Give buffer obviously wrong offset/end until it's re-pinned. */ @@ -739,8 +752,15 @@ i830_allocate_memory_bo(ScrnInfoPtr pScrn, const char *name, return NULL; } + /* + * Create buffers in local memory to avoid having the creation order + * determine the TT offset. Driver acceleration + * cannot handle changed front buffer TT offsets yet , + * so let's keep our fingers crossed. + */ + mask = DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE | DRM_BO_FLAG_MAPPABLE | - DRM_BO_FLAG_MEM_TT; + DRM_BO_FLAG_MEM_LOCAL; if (flags & ALLOW_SHARING) mask |= DRM_BO_FLAG_SHAREABLE; commit 78aaec0ffc711742bf8ad77757ed8c15cc3f7a9f Author: Eric Anholt <[EMAIL PROTECTED]> Date: Wed Oct 24 11:50:54 2007 -0700 Fix typo in my hand-application of rglowery's patch. diff --git a/src/i830_tv.c b/src/i830_tv.c index 678d510..ee2538a 100644 --- a/src/i830_tv.c +++ b/src/i830_tv.c @@ -1453,7 +1453,7 @@ i830_tv_get_modes(xf86OutputPtr output) mode_ptr->next = ret; mode_ptr->prev = NULL; if (ret != NULL) - reg->prev = mode_ptr; + ret->prev = mode_ptr; ret = mode_ptr; } commit 021265fbec9fd4ee31bdc9767c0c0453479ea22c Author: Rob <[EMAIL PROTECTED]> Date: Wed Oct 24 11:06:53 2007 -0700 Fix a crash in TV mode handling by initializing the prev field of modes. diff --git a/src/i830_tv.c b/src/i830_tv.c index 940250e..678d510 100644 --- a/src/i830_tv.c +++ b/src/i830_tv.c @@ -1451,6 +1451,9 @@ i830_tv_get_modes(xf86OutputPtr output) mode_ptr->type = M_T_DRIVER; mode_ptr->next = ret; + mode_ptr->prev = NULL; + if (ret != NULL) + reg->prev = mode_ptr; ret = mode_ptr; } commit 87345e820d20f1a98216c52e156c2e18c15ffa44 Author: Jesse Barnes <[EMAIL PROTECTED]> Date: Mon Oct 22 14:22:37 2007 -0700 intel_reg_dumper - dump VGA AR registers too Add a VGA AR dumping function so we can debug text mode problems too. diff --git a/src/i830_debug.c b/src/i830_debug.c index 8b4b76f..54dff29 100644 --- a/src/i830_debug.c +++ b/src/i830_debug.c @@ -560,6 +560,34 @@ static void i830DumpIndexed (ScrnInfoPtr pScrn, char *name, int id, int val, int } } +static void i830DumpAR(ScrnInfoPtr pScrn) +{ + I830Ptr pI830 = I830PTR(pScrn); + int i; + uint16_t st01, palette_enable = 0; + unsigned char orig_arx, msr; + + msr = INREG8(0x3cc); + if (msr & 1) + st01 = 0x3da; + else + st01 = 0x3ba; + + INREG8(st01); /* make sure index/write register is in index mode */ + orig_arx = INREG8(0x3c0); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "%19.19sX: 0x%02x\n", + "AR", orig_arx); + + for (i = 0; i <= 0x14; i++) { + INREG8(st01); + OUTREG8(0x3c0, i); + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "%18.18s%02x: 0x%02x\n", + "AR", i, INREG8(0x3c1)); + } + INREG8(st01); + OUTREG8(0x3c0, orig_arx); +} + void i830DumpRegs (ScrnInfoPtr pScrn) { I830Ptr pI830 = I830PTR(pScrn); @@ -594,6 +622,7 @@ void i830DumpRegs (ScrnInfoPtr pScrn) xf86DrvMsg (pScrn->scrnIndex, X_INFO, "%20.20s: 0x%02x\n", "MSR", (unsigned int) msr); + i830DumpAR (pScrn); if (msr & 1) crt = 0x3d0; else commit 78e251db671e21bc859c9b505d391b70babee2dc Author: Eric Anholt <[EMAIL PROTECTED]> Date: Fri Oct 19 15:04:10 2007 -0700 In the clock graph, draw the VCO as erasures in the lines representing clocks. This shows one of the reasons for the gaps: with the other settings, the VCO is too low inside the gap. However, it also points out another issue: we aren't using the high end of the VCO range due to some other limits being hit. diff --git a/src/scripts/clock-graph.5c b/src/scripts/clock-graph.5c index 98500e1..e39e559 100644 --- a/src/scripts/clock-graph.5c +++ b/src/scripts/clock-graph.5c @@ -4,12 +4,14 @@ library "examples/sort.5c"; import Sort; int width = 1000, height = 200; - +int min_vco = 1400000000; +int max_vco = 2800000000; int min = 0xffffffff; int max = 0; int max_clocks = 1000; int[4][max_clocks] clocks; +int[4][max_clocks] vcos; int[4] clock_count = {0...}; int[4] p2vals = {5,10,7,14}; @@ -49,8 +51,7 @@ void calc_p2(int p2i) continue; if (m2 > m1) continue; /* won't happen */ - if (vco < 1400000000 || - vco > 2800000000) + if (vco < min_vco || vco > max_vco) continue; /* @@ -61,6 +62,7 @@ void calc_p2(int p2i) */ clocks[p2i][clock_count[p2i]] = clock; + vcos[p2i][clock_count[p2i]] = vco; clock_count[p2i]++; } } @@ -88,6 +90,9 @@ real scale_x(real clock) for (p2i = 0; p2i < dim(p2vals); p2i++) { int p2 = p2vals[p2i]; calc_p2(p2i); + real row_y1 = (p2i + 1) / (dim(p2vals) + 1) * height; + real row_y2 = p2i / (dim(p2vals) + 1) * height; + /*qsort(&p2vals[p2i], sort_p2);*/ switch (p2) { @@ -104,6 +109,8 @@ for (p2i = 0; p2i < dim(p2vals); p2i++) { set_source_rgb(cr, 0,0,0); break; } + + /* draw the line for the clock */ for (int i = 0; i < clock_count[p2i]; i++) { int clock = clocks[p2i][i]; real xpos; @@ -112,8 +119,27 @@ for (p2i = 0; p2i < dim(p2vals); p2i++) { continue; xpos = scale_x(clock); - move_to(cr, xpos, p2i / (dim(p2vals) + 1) * height); - line_to(cr, xpos, (p2i + 1) / (dim(p2vals) + 1) * height); + move_to(cr, xpos, row_y1); + line_to(cr, xpos, row_y2); + stroke(cr); + } + + set_source_rgb(cr, 1, 1, 1); + /* add a mark for the vco value of the clocks at each location */ + for (int i = 0; i < clock_count[p2i]; i++) { + int clock = clocks[p2i][i]; + int vco = vcos[p2i][i]; + real mark_center; + + if (clock < min_rate || clock > max_rate) + continue; + + real xpos = scale_x(clock); + real vcofrac = (vco - min_vco) / (max_vco - min_vco); + real mark_height = (row_y1 + vcofrac * (row_y2 - row_y1)); + + move_to(cr, xpos, mark_height - 1); + line_to(cr, xpos, mark_height + 1); stroke(cr); } commit 9f9b888525b274036d301d6e06351583d0415f9e Author: Eric Anholt <[EMAIL PROTECTED]> Date: Thu Oct 18 11:25:24 2007 -0700 Warn in the log if we choose a PLL clock that's way out of line. diff --git a/src/i830_display.c b/src/i830_display.c index 92e52ed..292814c 100644 --- a/src/i830_display.c +++ b/src/i830_display.c @@ -1025,6 +1025,14 @@ i830_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, if (!ok) FatalError("Couldn't find PLL settings for mode!\n"); + if (fabs(adjusted_mode->Clock - clock.dot) / clock.dot > .02) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "Chosen PLL clock of %.1f Mhz more than 2%% away from " + "desired %.1f Mhz\n", + (float)clock.dot / 1000, + (float)adjusted_mode->Clock / 1000); + } + fp = clock.n << 16 | clock.m1 << 8 | clock.m2; dpll = DPLL_VGA_MODE_DIS; commit 1f8bf110394cc1df66aae9acf5c818145ae19b52 Author: Eric Anholt <[EMAIL PROTECTED]> Date: Thu Oct 18 11:17:38 2007 -0700 Add some nickle scripts for looking at PLL issues. While here, move similar nickle scripts under src/scripts/ diff --git a/src/fix.5c b/src/fix.5c deleted file mode 100644 index b758a43..0000000 --- a/src/fix.5c +++ /dev/null @@ -1,14 +0,0 @@ -/* - * Convert CSC fix point values to floats - */ - -real fixval (int fix) -{ - int exp = fix >> 9; - int mant = fix & ((1 << 9) - 1); - real ret; - if (exp == 0x7) - return 1.0; - ret = (2 ** -exp) * mant / (1 << 9); - return ret; -} diff --git a/src/scripts/clock-graph.5c b/src/scripts/clock-graph.5c new file mode 100644 index 0000000..98500e1 --- /dev/null +++ b/src/scripts/clock-graph.5c @@ -0,0 +1,148 @@ +autoload Cairo; +import Cairo; +library "examples/sort.5c"; +import Sort; + +int width = 1000, height = 200; + +int min = 0xffffffff; +int max = 0; + +int max_clocks = 1000; +int[4][max_clocks] clocks; +int[4] clock_count = {0...}; + +int[4] p2vals = {5,10,7,14}; + +cairo_t cr = Cairo::new(width, height); + +void calc_p2(int p2i) +{ + int p2 = p2vals[p2i]; + int min_p, max_p; + + clocks[p2i] = (int [max_clocks]){0...}; + + if (p2 == 7 || p2 == 14) { + /* LVDS */ + min_p = 7; + max_p = 98; + } else { + /* SDVO/DAC */ + min_p = 5; + max_p = 80; + } + + for (int m1 = 10; m1 <= 20; m1++) { + for (int m2 = 5; m2 <= 9; m2++) { + for (int n = 3; n <= 8; n++) { + for (int p1 = 1; p1 <= 8; p1++) { + int ref = 96000000; + int m = 5 * (m1 + 2) + (m2 + 2); + int p = p1 * p2; + int vco = floor(ref * m / (n + 2)); + int clock = floor(vco / p); + + if (p < min_p || p > max_p) + continue; + if (m < 70 || m > 120) + continue; + if (m2 > m1) + continue; /* won't happen */ + if (vco < 1400000000 || + vco > 2800000000) + continue; + +/* + printf("clock: %d (%d,%d), %d, " + "(%d,%d)\n", + floor(clock / 1000), + m1, m2, n, p1, p2); +*/ + + clocks[p2i][clock_count[p2i]] = clock; + clock_count[p2i]++; + } + } + } + } +} + +bool sort_p2(poly a, poly b) +{ + return a > b; +} + +int min_rate = 25000 * 1000; +int max_rate = 200000 * 1000; + +real scale_x(real clock) +{ + int min_x = 75, max_x = width - 50; + + real frac = (clock - min_rate) / (max_rate - min_rate); + + return min_x + frac * (max_x - min_x); +} + +for (p2i = 0; p2i < dim(p2vals); p2i++) { + int p2 = p2vals[p2i]; + calc_p2(p2i); + /*qsort(&p2vals[p2i], sort_p2);*/ + + switch (p2) { + case 5: + set_source_rgb(cr, 1,0,0); + break; + case 10: + set_source_rgb(cr, 0,1,0); + break; + case 7: + set_source_rgb(cr, 0,0,1); + break; + case 14: + set_source_rgb(cr, 0,0,0); + break; + } + for (int i = 0; i < clock_count[p2i]; i++) { + int clock = clocks[p2i][i]; + real xpos; + + if (clock < min_rate || clock > max_rate) + continue; + + xpos = scale_x(clock); + move_to(cr, xpos, p2i / (dim(p2vals) + 1) * height); + line_to(cr, xpos, (p2i + 1) / (dim(p2vals) + 1) * height); + stroke(cr); + } + + set_source_rgb(cr, 0, 0, 0); + string p2label = sprintf("p2 = %d", p2); + move_to(cr, 5, (p2i + .5) / (dim(p2vals) + 1) * height + 4); + show_text(cr, p2label); +} + +void label_clock(real clock) { + real center_x = scale_x(clock); + string label = sprintf("%d", floor((clock + 500) / 1000000)); + text_extents_t e = text_extents(cr, label); + real left_x = center_x - e.x_advance / 2; + save(cr); + move_to(cr, left_x, height - 20); + show_text(cr, label); + restore(cr); +} + +label_clock(min_rate); +label_clock(max_rate); +label_clock(140 * 1000 * 1000); +label_clock(115 * 1000 * 1000); +label_clock(100 * 1000 * 1000); +label_clock(82 * 1000 * 1000); + +string xlabel = "Clock in Mhz"; +text_extents_t e = text_extents(cr, xlabel); +move_to(cr, width / 2 - e.x_advance / 2, height - 5); +show_text(cr, xlabel); +sleep(10); diff --git a/src/scripts/clock.5c b/src/scripts/clock.5c new file mode 100644 index 0000000..8ee9d90 --- /dev/null +++ b/src/scripts/clock.5c @@ -0,0 +1,40 @@ +int p2 = 14; +int min_p, max_p; + +if (p2 == 7 || p2 == 14) { + /* LVDS */ + min_p = 7; + max_p = 98; +} else { + /* SDVO/DAC */ + min_p = 5; + max_p = 80; +} + +for (int m1 = 10; m1 <= 20; m1++) { + for (int m2 = 5; m2 <= 9; m2++) { + for (int n = 3; n <= 8; n++) { + for (int p1 = 1; p1 <= 8; p1++) { + int ref = 96000000; + int m = 5 * (m1 + 2) + (m2 + 2); + int p = p1 * p2; + int vco = floor(ref * m / (n + 2)); + int clock = floor(vco / p); + + if (p < min_p || p > max_p) + continue; + if (m < 70 || m > 120) + continue; + if (m2 > m1) + continue; /* won't happen */ + if (vco < 1400000000 || + vco > 2800000000) + continue; + + printf("clock: %d (%d,%d),%d,(%d,%d)\n", + floor(clock / 1000), + m1, m2, n, p1, p2); + } + } + } +} diff --git a/src/scripts/fix.5c b/src/scripts/fix.5c new file mode 100644 index 0000000..b758a43 --- /dev/null +++ b/src/scripts/fix.5c @@ -0,0 +1,14 @@ +/* + * Convert CSC fix point values to floats + */ + +real fixval (int fix) +{ + int exp = fix >> 9; + int mant = fix & ((1 << 9) - 1); + real ret; + if (exp == 0x7) + return 1.0; + ret = (2 ** -exp) * mant / (1 << 9); + return ret; +} diff --git a/src/scripts/tv.5c b/src/scripts/tv.5c -- To UNSUBSCRIBE, email to [EMAIL PROTECTED] with a subject of "unsubscribe". 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